5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
35 #include <dev/drm2/drmP.h>
36 #include <dev/drm2/radeon/radeon_drm.h>
37 #include "radeon_drv.h"
38 #include "radeon_gem.h"
39 #include "radeon_kms.h"
40 #include "radeon_irq_kms.h"
42 #include <dev/drm2/drm_pciids.h>
47 * - 2.0.0 - initial interface
48 * - 2.1.0 - add square tiling interface
49 * - 2.2.0 - add r6xx/r7xx const buffer support
50 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
51 * - 2.4.0 - add crtc id query
52 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
53 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
54 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
55 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
56 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
57 * 2.10.0 - fusion 2D tiling
58 * 2.11.0 - backend map, initial compute support for the CS checker
59 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
60 * 2.13.0 - virtual memory support, streamout
61 * 2.14.0 - add evergreen tiling informations
62 * 2.15.0 - add max_pipes query
63 * 2.16.0 - fix evergreen 2D tiled surface calculation
64 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
65 * 2.18.0 - r600-eg: allow "invalid" DB formats
66 * 2.19.0 - r600-eg: MSAA textures
67 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
68 * 2.21.0 - r600-r700: FMASK and CMASK
69 * 2.22.0 - r600 only: RESOLVE_BOX allowed
70 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
71 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
72 * 2.25.0 - eg+: new info request for num SE and num SH
73 * 2.26.0 - r600-eg: fix htile size computation
74 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
75 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
76 * 2.29.0 - R500 FP16 color clear registers
78 #define KMS_DRIVER_MAJOR 2
79 #define KMS_DRIVER_MINOR 29
80 #define KMS_DRIVER_PATCHLEVEL 0
81 int radeon_suspend_kms(struct drm_device *dev);
82 int radeon_resume_kms(struct drm_device *dev);
83 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
84 int *vpos, int *hpos);
85 extern struct drm_ioctl_desc radeon_ioctls_kms[];
86 extern int radeon_max_kms_ioctl;
88 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
89 #endif /* DUMBBELL_WIP */
90 int radeon_mode_dumb_mmap(struct drm_file *filp,
91 struct drm_device *dev,
92 uint32_t handle, uint64_t *offset_p);
93 int radeon_mode_dumb_create(struct drm_file *file_priv,
94 struct drm_device *dev,
95 struct drm_mode_create_dumb *args);
96 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
97 struct drm_device *dev,
99 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
100 struct drm_gem_object *obj,
102 struct drm_gem_object *radeon_gem_prime_import(struct drm_device *dev,
103 struct dma_buf *dma_buf);
105 #if defined(CONFIG_DEBUG_FS)
106 int radeon_debugfs_init(struct drm_minor *minor);
107 void radeon_debugfs_cleanup(struct drm_minor *minor);
112 int radeon_modeset = 1;
113 int radeon_dynclks = -1;
114 int radeon_r4xx_atom = 0;
115 int radeon_agpmode = 0;
116 int radeon_vram_limit = 0;
117 int radeon_gart_size = 512; /* default gart size */
118 int radeon_benchmarking = 0;
119 int radeon_testing = 0;
120 int radeon_connector_table = 0;
122 int radeon_audio = 0;
123 int radeon_disp_priority = 0;
124 int radeon_hw_i2c = 0;
125 int radeon_pcie_gen2 = -1;
127 int radeon_lockup_timeout = 10000;
130 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
131 module_param_named(no_wb, radeon_no_wb, int, 0444);
133 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
134 module_param_named(modeset, radeon_modeset, int, 0400);
136 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
137 module_param_named(dynclks, radeon_dynclks, int, 0444);
139 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
140 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
142 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
143 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
145 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
146 module_param_named(agpmode, radeon_agpmode, int, 0444);
148 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
149 module_param_named(gartsize, radeon_gart_size, int, 0600);
151 MODULE_PARM_DESC(benchmark, "Run benchmark");
152 module_param_named(benchmark, radeon_benchmarking, int, 0444);
154 MODULE_PARM_DESC(test, "Run tests");
155 module_param_named(test, radeon_testing, int, 0444);
157 MODULE_PARM_DESC(connector_table, "Force connector table");
158 module_param_named(connector_table, radeon_connector_table, int, 0444);
160 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
161 module_param_named(tv, radeon_tv, int, 0444);
163 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
164 module_param_named(audio, radeon_audio, int, 0444);
166 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
167 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
169 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
170 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
172 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
173 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
175 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
176 module_param_named(msi, radeon_msi, int, 0444);
178 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
179 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
181 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
183 drm_radeon_private_t *dev_priv = dev->dev_private;
185 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
188 /* Disable *all* interrupts */
189 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
190 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
191 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
195 static int radeon_resume(struct drm_device *dev)
197 drm_radeon_private_t *dev_priv = dev->dev_private;
199 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
202 /* Restore interrupt registers */
203 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
204 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
205 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
208 #endif /* DUMBBELL_WIP */
210 static drm_pci_id_list_t pciidlist[] = {
215 static const struct file_operations radeon_driver_old_fops = {
216 .owner = THIS_MODULE,
218 .release = drm_release,
219 .unlocked_ioctl = drm_ioctl,
222 .fasync = drm_fasync,
225 .compat_ioctl = radeon_compat_ioctl,
227 .llseek = noop_llseek,
230 static struct drm_driver driver_old = {
232 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
233 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
234 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
235 .load = radeon_driver_load,
236 .firstopen = radeon_driver_firstopen,
237 .open = radeon_driver_open,
238 .preclose = radeon_driver_preclose,
239 .postclose = radeon_driver_postclose,
240 .lastclose = radeon_driver_lastclose,
241 .unload = radeon_driver_unload,
243 .suspend = radeon_suspend,
244 .resume = radeon_resume,
245 #endif /* DUMBBELL_WIP */
246 .get_vblank_counter = radeon_get_vblank_counter,
247 .enable_vblank = radeon_enable_vblank,
248 .disable_vblank = radeon_disable_vblank,
249 .master_create = radeon_master_create,
250 .master_destroy = radeon_master_destroy,
251 .irq_preinstall = radeon_driver_irq_preinstall,
252 .irq_postinstall = radeon_driver_irq_postinstall,
253 .irq_uninstall = radeon_driver_irq_uninstall,
254 .irq_handler = radeon_driver_irq_handler,
255 .ioctls = radeon_ioctls,
256 .dma_ioctl = radeon_cp_buffers,
257 .fops = &radeon_driver_old_fops,
261 .major = DRIVER_MAJOR,
262 .minor = DRIVER_MINOR,
263 .patchlevel = DRIVER_PATCHLEVEL,
265 #endif /* DUMBBELL_WIP */
267 static struct drm_driver_info kms_driver;
270 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
272 struct apertures_struct *ap;
273 bool primary = false;
275 ap = alloc_apertures(1);
279 ap->ranges[0].base = pci_resource_start(pdev, 0);
280 ap->ranges[0].size = pci_resource_len(pdev, 0);
283 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
285 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
291 static int radeon_pci_probe(struct pci_dev *pdev,
292 const struct pci_device_id *ent)
296 /* Get rid of things like offb */
297 ret = radeon_kick_out_firmware_fb(pdev);
301 return drm_get_pci_dev(pdev, ent, &kms_driver);
305 radeon_pci_remove(struct pci_dev *pdev)
307 struct drm_device *dev = pci_get_drvdata(pdev);
313 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
315 struct drm_device *dev = pci_get_drvdata(pdev);
316 return radeon_suspend_kms(dev, state);
320 radeon_pci_resume(struct pci_dev *pdev)
322 struct drm_device *dev = pci_get_drvdata(pdev);
323 return radeon_resume_kms(dev);
326 static const struct file_operations radeon_driver_kms_fops = {
327 .owner = THIS_MODULE,
329 .release = drm_release,
330 .unlocked_ioctl = drm_ioctl,
333 .fasync = drm_fasync,
336 .compat_ioctl = radeon_kms_compat_ioctl,
339 #endif /* DUMBBELL_WIP */
341 static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ctx,
342 struct sysctl_oid *top)
344 return drm_add_busid_modesetting(dev, ctx, top);
347 static struct drm_driver_info kms_driver = {
349 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
350 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
351 DRIVER_PRIME /* | DRIVE_MODESET */,
354 #endif /* DUMBBELL_WIP */
355 .load = radeon_driver_load_kms,
356 .use_msi = radeon_msi_ok,
357 .firstopen = radeon_driver_firstopen_kms,
358 .open = radeon_driver_open_kms,
359 .preclose = radeon_driver_preclose_kms,
360 .postclose = radeon_driver_postclose_kms,
361 .lastclose = radeon_driver_lastclose_kms,
362 .unload = radeon_driver_unload_kms,
364 .suspend = radeon_suspend_kms,
365 .resume = radeon_resume_kms,
366 #endif /* DUMBBELL_WIP */
367 .get_vblank_counter = radeon_get_vblank_counter_kms,
368 .enable_vblank = radeon_enable_vblank_kms,
369 .disable_vblank = radeon_disable_vblank_kms,
370 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
371 .get_scanout_position = radeon_get_crtc_scanoutpos,
372 .irq_preinstall = radeon_driver_irq_preinstall_kms,
373 .irq_postinstall = radeon_driver_irq_postinstall_kms,
374 .irq_uninstall = radeon_driver_irq_uninstall_kms,
375 .irq_handler = radeon_driver_irq_handler_kms,
376 .sysctl_init = radeon_sysctl_init,
377 .ioctls = radeon_ioctls_kms,
378 .gem_init_object = radeon_gem_object_init,
379 .gem_free_object = radeon_gem_object_free,
380 .gem_open_object = radeon_gem_object_open,
381 .gem_close_object = radeon_gem_object_close,
382 .dma_ioctl = radeon_dma_ioctl_kms,
383 .dumb_create = radeon_mode_dumb_create,
384 .dumb_map_offset = radeon_mode_dumb_mmap,
385 .dumb_destroy = radeon_mode_dumb_destroy,
387 .fops = &radeon_driver_kms_fops,
388 #endif /* DUMBBELL_WIP */
391 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
392 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
393 .gem_prime_export = radeon_gem_prime_export,
394 .gem_prime_import = radeon_gem_prime_import,
395 #endif /* DUMBBELL_WIP */
400 .major = KMS_DRIVER_MAJOR,
401 .minor = KMS_DRIVER_MINOR,
402 .patchlevel = KMS_DRIVER_PATCHLEVEL,
406 static int __init radeon_init(void)
408 driver = &driver_old;
409 pdriver = &radeon_pci_driver;
410 driver->num_ioctls = radeon_max_ioctl;
411 #ifdef CONFIG_VGA_CONSOLE
412 if (vgacon_text_force() && radeon_modeset == -1) {
413 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
414 driver = &driver_old;
415 pdriver = &radeon_pci_driver;
416 driver->driver_features &= ~DRIVER_MODESET;
420 /* if enabled by default */
421 if (radeon_modeset == -1) {
422 #ifdef CONFIG_DRM_RADEON_KMS
423 DRM_INFO("radeon defaulting to kernel modesetting.\n");
426 DRM_INFO("radeon defaulting to userspace modesetting.\n");
430 if (radeon_modeset == 1) {
431 DRM_INFO("radeon kernel modesetting enabled.\n");
432 driver = &kms_driver;
433 pdriver = &radeon_kms_pci_driver;
434 driver->driver_features |= DRIVER_MODESET;
435 driver->num_ioctls = radeon_max_kms_ioctl;
436 radeon_register_atpx_handler();
438 /* if the vga console setting is enabled still
439 * let modprobe override it */
440 return drm_pci_init(driver, pdriver);
443 static void __exit radeon_exit(void)
445 drm_pci_exit(driver, pdriver);
446 radeon_unregister_atpx_handler();
448 #endif /* DUMBBELL_WIP */
450 /* =================================================================== */
453 radeon_probe(device_t kdev)
456 return drm_probe(kdev, pciidlist);
460 radeon_attach(device_t kdev)
462 struct drm_device *dev;
464 dev = device_get_softc(kdev);
465 if (radeon_modeset == 1) {
466 kms_driver.driver_features |= DRIVER_MODESET;
467 kms_driver.max_ioctl = radeon_max_kms_ioctl;
468 radeon_register_atpx_handler();
470 dev->driver = &kms_driver;
471 return (drm_attach(kdev, pciidlist));
475 radeon_suspend(device_t kdev)
477 struct drm_device *dev;
480 dev = device_get_softc(kdev);
481 ret = radeon_suspend_kms(dev);
487 radeon_resume(device_t kdev)
489 struct drm_device *dev;
492 dev = device_get_softc(kdev);
493 ret = radeon_resume_kms(dev);
498 static device_method_t radeon_methods[] = {
499 /* Device interface */
500 DEVMETHOD(device_probe, radeon_probe),
501 DEVMETHOD(device_attach, radeon_attach),
502 DEVMETHOD(device_suspend, radeon_suspend),
503 DEVMETHOD(device_resume, radeon_resume),
504 DEVMETHOD(device_detach, drm_detach),
508 static driver_t radeon_driver = {
511 sizeof(struct drm_device)
514 extern devclass_t drm_devclass;
515 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
516 NULL, NULL, SI_ORDER_ANY);
517 MODULE_DEPEND(radeonkms, drmn, 1, 1, 1);
518 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
519 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
520 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
521 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);
522 MODULE_DEPEND(radeonkms, firmware, 1, 1, 1);