sys/dev/ex/if_ex.c

   1 /*-
   2  * Copyright (c) 1996, Javier Martín Rueda (jmrueda@diatel.upm.es)
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice unmodified, this list of conditions, and the following
  10  *    disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  *
  28  * MAINTAINER: Matthew N. Dodd <winter@jurai.net>
  29  *                             <mdodd@FreeBSD.org>
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __FBSDID("$FreeBSD$");
  34
  35 /*
  36  * Intel EtherExpress Pro/10, Pro/10+ Ethernet driver
  37  *
  38  * Revision history:
  39  *
  40  * dd-mmm-yyyy: Multicast support ported from NetBSD's if_iy driver.
  41  * 30-Oct-1996: first beta version. Inet and BPF supported, but no multicast.
  42  */
  43
  44 #include <sys/param.h>
  45 #include <sys/systm.h>
  46 #include <sys/kernel.h>
  47 #include <sys/sockio.h>
  48 #include <sys/mbuf.h>
  49 #include <sys/socket.h>
  50
  51 #include <sys/module.h>
  52 #include <sys/bus.h>
  53
  54 #include <machine/bus.h>
  55 #include <machine/resource.h>
  56 #include <sys/rman.h>
  57
  58 #include <net/if.h>
  59 #include <net/if_arp.h>
  60 #include <net/if_dl.h>
  61 #include <net/if_media.h>
  62 #include <net/if_types.h>
  63 #include <net/ethernet.h>
  64 #include <net/bpf.h>
  65
  66 #include <netinet/in.h>
  67 #include <netinet/if_ether.h>
  68
  69
  70 #include <isa/isavar.h>
  71 #include <isa/pnpvar.h>
  72
  73 #include <dev/ex/if_exreg.h>
  74 #include <dev/ex/if_exvar.h>
  75
  76 #ifdef EXDEBUG
  77 # define Start_End 1
  78 # define Rcvd_Pkts 2
  79 # define Sent_Pkts 4
  80 # define Status    8
  81 static int debug_mask = 0;
  82 # define DODEBUG(level, action) if (level & debug_mask) action
  83 #else
  84 # define DODEBUG(level, action)
  85 #endif
  86
  87 devclass_t ex_devclass;
  88
  89 char irq2eemap[] =
  90         { -1, -1, 0, 1, -1, 2, -1, -1, -1, 0, 3, 4, -1, -1, -1, -1 };
  91 u_char ee2irqmap[] =
  92         { 9, 3, 5, 10, 11, 0, 0, 0 };
  93
  94 char plus_irq2eemap[] =
  95         { -1, -1, -1, 0, 1, 2, -1, 3, -1, 4, 5, 6, 7, -1, -1, -1 };
  96 u_char plus_ee2irqmap[] =
  97         { 3, 4, 5, 7, 9, 10, 11, 12 };
  98
  99 /* Network Interface Functions */
 100 static void     ex_init(void *);
 101 static void     ex_init_locked(struct ex_softc *);
 102 static void     ex_start(struct ifnet *);
 103 static void     ex_start_locked(struct ifnet *);
 104 static int      ex_ioctl(struct ifnet *, u_long, caddr_t);
 105 static void     ex_watchdog(void *);
 106
 107 /* ifmedia Functions    */
 108 static int      ex_ifmedia_upd(struct ifnet *);
 109 static void     ex_ifmedia_sts(struct ifnet *, struct ifmediareq *);
 110
 111 static int      ex_get_media(struct ex_softc *);
 112
 113 static void     ex_reset(struct ex_softc *);
 114 static void     ex_setmulti(struct ex_softc *);
 115
 116 static void     ex_tx_intr(struct ex_softc *);
 117 static void     ex_rx_intr(struct ex_softc *);
 118
 119 void
 120 ex_get_address(struct ex_softc *sc, u_char *enaddr)
 121 {
 122         uint16_t        eaddr_tmp;
 123
 124         eaddr_tmp = ex_eeprom_read(sc, EE_Eth_Addr_Lo);
 125         enaddr[5] = eaddr_tmp & 0xff;
 126         enaddr[4] = eaddr_tmp >> 8;
 127         eaddr_tmp = ex_eeprom_read(sc, EE_Eth_Addr_Mid);
 128         enaddr[3] = eaddr_tmp & 0xff;
 129         enaddr[2] = eaddr_tmp >> 8;
 130         eaddr_tmp = ex_eeprom_read(sc, EE_Eth_Addr_Hi);
 131         enaddr[1] = eaddr_tmp & 0xff;
 132         enaddr[0] = eaddr_tmp >> 8;
 133
 134         return;
 135 }
 136
 137 int
 138 ex_card_type(u_char *enaddr)
 139 {
 140         if ((enaddr[0] == 0x00) && (enaddr[1] == 0xA0) && (enaddr[2] == 0xC9))
 141                 return (CARD_TYPE_EX_10_PLUS);
 142
 143         return (CARD_TYPE_EX_10);
 144 }
 145
 146 /*
 147  * Caller is responsible for eventually calling
 148  * ex_release_resources() on failure.
 149  */
 150 int
 151 ex_alloc_resources(device_t dev)
 152 {
 153         struct ex_softc *       sc = device_get_softc(dev);
 154         int                     error = 0;
 155
 156         sc->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
 157                                             &sc->ioport_rid, RF_ACTIVE);
 158         if (!sc->ioport) {
 159                 device_printf(dev, "No I/O space?!\n");
 160                 error = ENOMEM;
 161                 goto bad;
 162         }
 163
 164         sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
 165                                         RF_ACTIVE);
 166
 167         if (!sc->irq) {
 168                 device_printf(dev, "No IRQ?!\n");
 169                 error = ENOMEM;
 170                 goto bad;
 171         }
 172
 173 bad:
 174         return (error);
 175 }
 176
 177 void
 178 ex_release_resources(device_t dev)
 179 {
 180         struct ex_softc *       sc = device_get_softc(dev);
 181
 182         if (sc->ih) {
 183                 bus_teardown_intr(dev, sc->irq, sc->ih);
 184                 sc->ih = NULL;
 185         }
 186
 187         if (sc->ioport) {
 188                 bus_release_resource(dev, SYS_RES_IOPORT,
 189                                         sc->ioport_rid, sc->ioport);
 190                 sc->ioport = NULL;
 191         }
 192
 193         if (sc->irq) {
 194                 bus_release_resource(dev, SYS_RES_IRQ,
 195                                         sc->irq_rid, sc->irq);
 196                 sc->irq = NULL;
 197         }
 198
 199         if (sc->ifp)
 200                 if_free(sc->ifp);
 201
 202         return;
 203 }
 204
 205 int
 206 ex_attach(device_t dev)
 207 {
 208         struct ex_softc *       sc = device_get_softc(dev);
 209         struct ifnet *          ifp;
 210         struct ifmedia *        ifm;
 211         int                     error;
 212         uint16_t                temp;
 213
 214         ifp = sc->ifp = if_alloc(IFT_ETHER);
 215         if (ifp == NULL) {
 216                 device_printf(dev, "can not if_alloc()\n");
 217                 return (ENOSPC);
 218         }
 219         /* work out which set of irq <-> internal tables to use */
 220         if (ex_card_type(sc->enaddr) == CARD_TYPE_EX_10_PLUS) {
 221                 sc->irq2ee = plus_irq2eemap;
 222                 sc->ee2irq = plus_ee2irqmap;
 223         } else {
 224                 sc->irq2ee = irq2eemap;
 225                 sc->ee2irq = ee2irqmap;
 226         }
 227
 228         sc->mem_size = CARD_RAM_SIZE;   /* XXX This should be read from the card itself. */
 229
 230         /*
 231          * Initialize the ifnet structure.
 232          */
 233         ifp->if_softc = sc;
 234         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 235         ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
 236         ifp->if_start = ex_start;
 237         ifp->if_ioctl = ex_ioctl;
 238         ifp->if_init = ex_init;
 239         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
 240
 241         ifmedia_init(&sc->ifmedia, 0, ex_ifmedia_upd, ex_ifmedia_sts);
 242         mtx_init(&sc->lock, device_get_nameunit(dev), MTX_NETWORK_LOCK,
 243             MTX_DEF);
 244         callout_init_mtx(&sc->timer, &sc->lock, 0);
 245
 246         temp = ex_eeprom_read(sc, EE_W5);
 247         if (temp & EE_W5_PORT_TPE)
 248                 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
 249         if (temp & EE_W5_PORT_BNC)
 250                 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_2, 0, NULL);
 251         if (temp & EE_W5_PORT_AUI)
 252                 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_5, 0, NULL);
 253
 254         ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
 255         ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_NONE, 0, NULL);
 256         ifmedia_set(&sc->ifmedia, ex_get_media(sc));
 257
 258         ifm = &sc->ifmedia;
 259         ifm->ifm_media = ifm->ifm_cur->ifm_media;
 260         ex_ifmedia_upd(ifp);
 261
 262         /*
 263          * Attach the interface.
 264          */
 265         ether_ifattach(ifp, sc->enaddr);
 266
 267         error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
 268                                 NULL, ex_intr, (void *)sc, &sc->ih);
 269         if (error) {
 270                 device_printf(dev, "bus_setup_intr() failed!\n");
 271                 ether_ifdetach(ifp);
 272                 mtx_destroy(&sc->lock);
 273                 return (error);
 274         }
 275
 276         return(0);
 277 }
 278
 279 int
 280 ex_detach(device_t dev)
 281 {
 282         struct ex_softc *sc;
 283         struct ifnet    *ifp;
 284
 285         sc = device_get_softc(dev);
 286         ifp = sc->ifp;
 287
 288         EX_LOCK(sc);
 289         ex_stop(sc);
 290         EX_UNLOCK(sc);
 291
 292         ether_ifdetach(ifp);
 293         callout_drain(&sc->timer);
 294
 295         ex_release_resources(dev);
 296         mtx_destroy(&sc->lock);
 297
 298         return (0);
 299 }
 300
 301 static void
 302 ex_init(void *xsc)
 303 {
 304         struct ex_softc *       sc = (struct ex_softc *) xsc;
 305
 306         EX_LOCK(sc);
 307         ex_init_locked(sc);
 308         EX_UNLOCK(sc);
 309 }
 310
 311 static void
 312 ex_init_locked(struct ex_softc *sc)
 313 {
 314         struct ifnet *          ifp = sc->ifp;
 315         int                     i;
 316         unsigned short          temp_reg;
 317
 318         DODEBUG(Start_End, printf("%s: ex_init: start\n", ifp->if_xname););
 319
 320         sc->tx_timeout = 0;
 321
 322         /*
 323          * Load the ethernet address into the card.
 324          */
 325         CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
 326         temp_reg = CSR_READ_1(sc, EEPROM_REG);
 327         if (temp_reg & Trnoff_Enable)
 328                 CSR_WRITE_1(sc, EEPROM_REG, temp_reg & ~Trnoff_Enable);
 329         for (i = 0; i < ETHER_ADDR_LEN; i++)
 330                 CSR_WRITE_1(sc, I_ADDR_REG0 + i, IF_LLADDR(sc->ifp)[i]);
 331
 332         /*
 333          * - Setup transmit chaining and discard bad received frames.
 334          * - Match broadcast.
 335          * - Clear test mode.
 336          * - Set receiving mode.
 337          */
 338         CSR_WRITE_1(sc, REG1, CSR_READ_1(sc, REG1) | Tx_Chn_Int_Md | Tx_Chn_ErStp | Disc_Bad_Fr);
 339         CSR_WRITE_1(sc, REG2, CSR_READ_1(sc, REG2) | No_SA_Ins | RX_CRC_InMem);
 340         CSR_WRITE_1(sc, REG3, CSR_READ_1(sc, REG3) & 0x3f /* XXX constants. */ );
 341         /*
 342          * - Set IRQ number, if this part has it.  ISA devices have this,
 343          * while PC Card devices don't seem to.  Either way, we have to
 344          * switch to Bank1 as the rest of this code relies on that.
 345          */
 346         CSR_WRITE_1(sc, CMD_REG, Bank1_Sel);
 347         if (sc->flags & HAS_INT_NO_REG)
 348                 CSR_WRITE_1(sc, INT_NO_REG,
 349                     (CSR_READ_1(sc, INT_NO_REG) & 0xf8) |
 350                     sc->irq2ee[sc->irq_no]);
 351
 352         /*
 353          * Divide the available memory in the card into rcv and xmt buffers.
 354          * By default, I use the first 3/4 of the memory for the rcv buffer,
 355          * and the remaining 1/4 of the memory for the xmt buffer.
 356          */
 357         sc->rx_mem_size = sc->mem_size * 3 / 4;
 358         sc->tx_mem_size = sc->mem_size - sc->rx_mem_size;
 359         sc->rx_lower_limit = 0x0000;
 360         sc->rx_upper_limit = sc->rx_mem_size - 2;
 361         sc->tx_lower_limit = sc->rx_mem_size;
 362         sc->tx_upper_limit = sc->mem_size - 2;
 363         CSR_WRITE_1(sc, RCV_LOWER_LIMIT_REG, sc->rx_lower_limit >> 8);
 364         CSR_WRITE_1(sc, RCV_UPPER_LIMIT_REG, sc->rx_upper_limit >> 8);
 365         CSR_WRITE_1(sc, XMT_LOWER_LIMIT_REG, sc->tx_lower_limit >> 8);
 366         CSR_WRITE_1(sc, XMT_UPPER_LIMIT_REG, sc->tx_upper_limit >> 8);
 367
 368         /*
 369          * Enable receive and transmit interrupts, and clear any pending int.
 370          */
 371         CSR_WRITE_1(sc, REG1, CSR_READ_1(sc, REG1) | TriST_INT);
 372         CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
 373         CSR_WRITE_1(sc, MASK_REG, All_Int & ~(Rx_Int | Tx_Int));
 374         CSR_WRITE_1(sc, STATUS_REG, All_Int);
 375
 376         /*
 377          * Initialize receive and transmit ring buffers.
 378          */
 379         CSR_WRITE_2(sc, RCV_BAR, sc->rx_lower_limit);
 380         sc->rx_head = sc->rx_lower_limit;
 381         CSR_WRITE_2(sc, RCV_STOP_REG, sc->rx_upper_limit | 0xfe);
 382         CSR_WRITE_2(sc, XMT_BAR, sc->tx_lower_limit);
 383         sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
 384
 385         ifp->if_drv_flags |= IFF_DRV_RUNNING;
 386         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 387         DODEBUG(Status, printf("OIDLE init\n"););
 388         callout_reset(&sc->timer, hz, ex_watchdog, sc);
 389
 390         ex_setmulti(sc);
 391
 392         /*
 393          * Final reset of the board, and enable operation.
 394          */
 395         CSR_WRITE_1(sc, CMD_REG, Sel_Reset_CMD);
 396         DELAY(2);
 397         CSR_WRITE_1(sc, CMD_REG, Rcv_Enable_CMD);
 398
 399         ex_start_locked(ifp);
 400
 401         DODEBUG(Start_End, printf("%s: ex_init: finish\n", ifp->if_xname););
 402 }
 403
 404 static void
 405 ex_start(struct ifnet *ifp)
 406 {
 407         struct ex_softc *       sc = ifp->if_softc;
 408
 409         EX_LOCK(sc);
 410         ex_start_locked(ifp);
 411         EX_UNLOCK(sc);
 412 }
 413
 414 static void
 415 ex_start_locked(struct ifnet *ifp)
 416 {
 417         struct ex_softc *       sc = ifp->if_softc;
 418         int                     i, len, data_len, avail, dest, next;
 419         unsigned char           tmp16[2];
 420         struct mbuf *           opkt;
 421         struct mbuf *           m;
 422
 423         DODEBUG(Start_End, printf("ex_start%d: start\n", unit););
 424
 425         /*
 426          * Main loop: send outgoing packets to network card until there are no
 427          * more packets left, or the card cannot accept any more yet.
 428          */
 429         while (((opkt = ifp->if_snd.ifq_head) != NULL) &&
 430                !(ifp->if_drv_flags & IFF_DRV_OACTIVE)) {
 431
 432                 /*
 433                  * Ensure there is enough free transmit buffer space for
 434                  * this packet, including its header. Note: the header
 435                  * cannot wrap around the end of the transmit buffer and
 436                  * must be kept together, so we allow space for twice the
 437                  * length of the header, just in case.
 438                  */
 439
 440                 for (len = 0, m = opkt; m != NULL; m = m->m_next) {
 441                         len += m->m_len;
 442                 }
 443
 444                 data_len = len;
 445
 446                 DODEBUG(Sent_Pkts, printf("1. Sending packet with %d data bytes. ", data_len););
 447
 448                 if (len & 1) {
 449                         len += XMT_HEADER_LEN + 1;
 450                 } else {
 451                         len += XMT_HEADER_LEN;
 452                 }
 453
 454                 if ((i = sc->tx_tail - sc->tx_head) >= 0) {
 455                         avail = sc->tx_mem_size - i;
 456                 } else {
 457                         avail = -i;
 458                 }
 459
 460                 DODEBUG(Sent_Pkts, printf("i=%d, avail=%d\n", i, avail););
 461
 462                 if (avail >= len + XMT_HEADER_LEN) {
 463                         IF_DEQUEUE(&ifp->if_snd, opkt);
 464
 465 #ifdef EX_PSA_INTR
 466                         /*
 467                          * Disable rx and tx interrupts, to avoid corruption
 468                          * of the host address register by interrupt service
 469                          * routines.
 470                          * XXX Is this necessary with splimp() enabled?
 471                          */
 472                         CSR_WRITE_1(sc, MASK_REG, All_Int);
 473 #endif
 474
 475                         /*
 476                          * Compute the start and end addresses of this
 477                          * frame in the tx buffer.
 478                          */
 479                         dest = sc->tx_tail;
 480                         next = dest + len;
 481
 482                         if (next > sc->tx_upper_limit) {
 483                                 if ((sc->tx_upper_limit + 2 - sc->tx_tail) <=
 484                                     XMT_HEADER_LEN) {
 485                                         dest = sc->tx_lower_limit;
 486                                         next = dest + len;
 487                                 } else {
 488                                         next = sc->tx_lower_limit +
 489                                                 next - sc->tx_upper_limit - 2;
 490                                 }
 491                         }
 492
 493                         /*
 494                          * Build the packet frame in the card's ring buffer.
 495                          */
 496                         DODEBUG(Sent_Pkts, printf("2. dest=%d, next=%d. ", dest, next););
 497
 498                         CSR_WRITE_2(sc, HOST_ADDR_REG, dest);
 499                         CSR_WRITE_2(sc, IO_PORT_REG, Transmit_CMD);
 500                         CSR_WRITE_2(sc, IO_PORT_REG, 0);
 501                         CSR_WRITE_2(sc, IO_PORT_REG, next);
 502                         CSR_WRITE_2(sc, IO_PORT_REG, data_len);
 503
 504                         /*
 505                          * Output the packet data to the card. Ensure all
 506                          * transfers are 16-bit wide, even if individual
 507                          * mbufs have odd length.
 508                          */
 509                         for (m = opkt, i = 0; m != NULL; m = m->m_next) {
 510                                 DODEBUG(Sent_Pkts, printf("[%d]", m->m_len););
 511                                 if (i) {
 512                                         tmp16[1] = *(mtod(m, caddr_t));
 513                                         CSR_WRITE_MULTI_2(sc, IO_PORT_REG,
 514                                             (uint16_t *) tmp16, 1);
 515                                 }
 516                                 CSR_WRITE_MULTI_2(sc, IO_PORT_REG,
 517                                     (uint16_t *) (mtod(m, caddr_t) + i),
 518                                     (m->m_len - i) / 2);
 519                                 if ((i = (m->m_len - i) & 1) != 0) {
 520                                         tmp16[0] = *(mtod(m, caddr_t) +
 521                                                    m->m_len - 1);
 522                                 }
 523                         }
 524                         if (i)
 525                                 CSR_WRITE_MULTI_2(sc, IO_PORT_REG,
 526                                     (uint16_t *) tmp16, 1);
 527                         /*
 528                          * If there were other frames chained, update the
 529                          * chain in the last one.
 530                          */
 531                         if (sc->tx_head != sc->tx_tail) {
 532                                 if (sc->tx_tail != dest) {
 533                                         CSR_WRITE_2(sc, HOST_ADDR_REG,
 534                                              sc->tx_last + XMT_Chain_Point);
 535                                         CSR_WRITE_2(sc, IO_PORT_REG, dest);
 536                                 }
 537                                 CSR_WRITE_2(sc, HOST_ADDR_REG,
 538                                      sc->tx_last + XMT_Byte_Count);
 539                                 i = CSR_READ_2(sc, IO_PORT_REG);
 540                                 CSR_WRITE_2(sc, HOST_ADDR_REG,
 541                                      sc->tx_last + XMT_Byte_Count);
 542                                 CSR_WRITE_2(sc, IO_PORT_REG, i | Ch_bit);
 543                         }
 544
 545                         /*
 546                          * Resume normal operation of the card:
 547                          * - Make a dummy read to flush the DRAM write
 548                          *   pipeline.
 549                          * - Enable receive and transmit interrupts.
 550                          * - Send Transmit or Resume_XMT command, as
 551                          *   appropriate.
 552                          */
 553                         CSR_READ_2(sc, IO_PORT_REG);
 554 #ifdef EX_PSA_INTR
 555                         CSR_WRITE_1(sc, MASK_REG, All_Int & ~(Rx_Int | Tx_Int));
 556 #endif
 557                         if (sc->tx_head == sc->tx_tail) {
 558                                 CSR_WRITE_2(sc, XMT_BAR, dest);
 559                                 CSR_WRITE_1(sc, CMD_REG, Transmit_CMD);
 560                                 sc->tx_head = dest;
 561                                 DODEBUG(Sent_Pkts, printf("Transmit\n"););
 562                         } else {
 563                                 CSR_WRITE_1(sc, CMD_REG, Resume_XMT_List_CMD);
 564                                 DODEBUG(Sent_Pkts, printf("Resume\n"););
 565                         }
 566
 567                         sc->tx_last = dest;
 568                         sc->tx_tail = next;
 569
 570                         BPF_MTAP(ifp, opkt);
 571
 572                         sc->tx_timeout = 2;
 573                         ifp->if_opackets++;
 574                         m_freem(opkt);
 575                 } else {
 576                         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 577                         DODEBUG(Status, printf("OACTIVE start\n"););
 578                 }
 579         }
 580
 581         DODEBUG(Start_End, printf("ex_start%d: finish\n", unit););
 582 }
 583
 584 void
 585 ex_stop(struct ex_softc *sc)
 586 {
 587
 588         DODEBUG(Start_End, printf("ex_stop%d: start\n", unit););
 589
 590         EX_ASSERT_LOCKED(sc);
 591         /*
 592          * Disable card operation:
 593          * - Disable the interrupt line.
 594          * - Flush transmission and disable reception.
 595          * - Mask and clear all interrupts.
 596          * - Reset the 82595.
 597          */
 598         CSR_WRITE_1(sc, CMD_REG, Bank1_Sel);
 599         CSR_WRITE_1(sc, REG1, CSR_READ_1(sc, REG1) & ~TriST_INT);
 600         CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
 601         CSR_WRITE_1(sc, CMD_REG, Rcv_Stop);
 602         sc->tx_head = sc->tx_tail = sc->tx_lower_limit;
 603         sc->tx_last = 0; /* XXX I think these two lines are not necessary, because ex_init will always be called again to reinit the interface. */
 604         CSR_WRITE_1(sc, MASK_REG, All_Int);
 605         CSR_WRITE_1(sc, STATUS_REG, All_Int);
 606         CSR_WRITE_1(sc, CMD_REG, Reset_CMD);
 607         DELAY(200);
 608         sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
 609         sc->tx_timeout = 0;
 610         callout_stop(&sc->timer);
 611
 612         DODEBUG(Start_End, printf("ex_stop%d: finish\n", unit););
 613
 614         return;
 615 }
 616
 617 void
 618 ex_intr(void *arg)
 619 {
 620         struct ex_softc *sc = (struct ex_softc *)arg;
 621         struct ifnet    *ifp = sc->ifp;
 622         int             int_status, send_pkts;
 623         int             loops = 100;
 624
 625         DODEBUG(Start_End, printf("ex_intr%d: start\n", unit););
 626
 627         EX_LOCK(sc);
 628         send_pkts = 0;
 629         while (loops-- > 0 &&
 630             (int_status = CSR_READ_1(sc, STATUS_REG)) & (Tx_Int | Rx_Int)) {
 631                 /* don't loop forever */
 632                 if (int_status == 0xff)
 633                         break;
 634                 if (int_status & Rx_Int) {
 635                         CSR_WRITE_1(sc, STATUS_REG, Rx_Int);
 636                         ex_rx_intr(sc);
 637                 } else if (int_status & Tx_Int) {
 638                         CSR_WRITE_1(sc, STATUS_REG, Tx_Int);
 639                         ex_tx_intr(sc);
 640                         send_pkts = 1;
 641                 }
 642         }
 643         if (loops == 0)
 644                 printf("100 loops are not enough\n");
 645
 646         /*
 647          * If any packet has been transmitted, and there are queued packets to
 648          * be sent, attempt to send more packets to the network card.
 649          */
 650         if (send_pkts && (ifp->if_snd.ifq_head != NULL))
 651                 ex_start_locked(ifp);
 652         EX_UNLOCK(sc);
 653
 654         DODEBUG(Start_End, printf("ex_intr%d: finish\n", unit););
 655
 656         return;
 657 }
 658
 659 static void
 660 ex_tx_intr(struct ex_softc *sc)
 661 {
 662         struct ifnet *  ifp = sc->ifp;
 663         int             tx_status;
 664
 665         DODEBUG(Start_End, printf("ex_tx_intr%d: start\n", unit););
 666
 667         /*
 668          * - Cancel the watchdog.
 669          * For all packets transmitted since last transmit interrupt:
 670          * - Advance chain pointer to next queued packet.
 671          * - Update statistics.
 672          */
 673
 674         sc->tx_timeout = 0;
 675
 676         while (sc->tx_head != sc->tx_tail) {
 677                 CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_head);
 678
 679                 if (!(CSR_READ_2(sc, IO_PORT_REG) & Done_bit))
 680                         break;
 681
 682                 tx_status = CSR_READ_2(sc, IO_PORT_REG);
 683                 sc->tx_head = CSR_READ_2(sc, IO_PORT_REG);
 684
 685                 if (tx_status & TX_OK_bit) {
 686                         ifp->if_opackets++;
 687                 } else {
 688                         ifp->if_oerrors++;
 689                 }
 690
 691                 ifp->if_collisions += tx_status & No_Collisions_bits;
 692         }
 693
 694         /*
 695          * The card should be ready to accept more packets now.
 696          */
 697
 698         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 699
 700         DODEBUG(Status, printf("OIDLE tx_intr\n"););
 701         DODEBUG(Start_End, printf("ex_tx_intr%d: finish\n", unit););
 702
 703         return;
 704 }
 705
 706 static void
 707 ex_rx_intr(struct ex_softc *sc)
 708 {
 709         struct ifnet *          ifp = sc->ifp;
 710         int                     rx_status;
 711         int                     pkt_len;
 712         int                     QQQ;
 713         struct mbuf *           m;
 714         struct mbuf *           ipkt;
 715         struct ether_header *   eh;
 716
 717         DODEBUG(Start_End, printf("ex_rx_intr%d: start\n", unit););
 718
 719         /*
 720          * For all packets received since last receive interrupt:
 721          * - If packet ok, read it into a new mbuf and queue it to interface,
 722          *   updating statistics.
 723          * - If packet bad, just discard it, and update statistics.
 724          * Finally, advance receive stop limit in card's memory to new location.
 725          */
 726
 727         CSR_WRITE_2(sc, HOST_ADDR_REG, sc->rx_head);
 728
 729         while (CSR_READ_2(sc, IO_PORT_REG) == RCV_Done) {
 730
 731                 rx_status = CSR_READ_2(sc, IO_PORT_REG);
 732                 sc->rx_head = CSR_READ_2(sc, IO_PORT_REG);
 733                 QQQ = pkt_len = CSR_READ_2(sc, IO_PORT_REG);
 734
 735                 if (rx_status & RCV_OK_bit) {
 736                         MGETHDR(m, M_NOWAIT, MT_DATA);
 737                         ipkt = m;
 738                         if (ipkt == NULL) {
 739                                 ifp->if_iqdrops++;
 740                         } else {
 741                                 ipkt->m_pkthdr.rcvif = ifp;
 742                                 ipkt->m_pkthdr.len = pkt_len;
 743                                 ipkt->m_len = MHLEN;
 744
 745                                 while (pkt_len > 0) {
 746                                         if (pkt_len >= MINCLSIZE) {
 747                                                 MCLGET(m, M_NOWAIT);
 748                                                 if (m->m_flags & M_EXT) {
 749                                                         m->m_len = MCLBYTES;
 750                                                 } else {
 751                                                         m_freem(ipkt);
 752                                                         ifp->if_iqdrops++;
 753                                                         goto rx_another;
 754                                                 }
 755                                         }
 756                                         m->m_len = min(m->m_len, pkt_len);
 757
 758           /*
 759            * NOTE: I'm assuming that all mbufs allocated are of even length,
 760            * except for the last one in an odd-length packet.
 761            */
 762
 763                                         CSR_READ_MULTI_2(sc, IO_PORT_REG,
 764                                             mtod(m, uint16_t *), m->m_len / 2);
 765
 766                                         if (m->m_len & 1) {
 767                                                 *(mtod(m, caddr_t) + m->m_len - 1) = CSR_READ_1(sc, IO_PORT_REG);
 768                                         }
 769                                         pkt_len -= m->m_len;
 770
 771                                         if (pkt_len > 0) {
 772                                                 MGET(m->m_next, M_NOWAIT, MT_DATA);
 773                                                 if (m->m_next == NULL) {
 774                                                         m_freem(ipkt);
 775                                                         ifp->if_iqdrops++;
 776                                                         goto rx_another;
 777                                                 }
 778                                                 m = m->m_next;
 779                                                 m->m_len = MLEN;
 780                                         }
 781                                 }
 782                                 eh = mtod(ipkt, struct ether_header *);
 783 #ifdef EXDEBUG
 784         if (debug_mask & Rcvd_Pkts) {
 785                 if ((eh->ether_dhost[5] != 0xff) || (eh->ether_dhost[0] != 0xff)) {
 786                         printf("Receive packet with %d data bytes: %6D -> ", QQQ, eh->ether_shost, ":");
 787                         printf("%6D\n", eh->ether_dhost, ":");
 788                 } /* QQQ */
 789         }
 790 #endif
 791                                 EX_UNLOCK(sc);
 792                                 (*ifp->if_input)(ifp, ipkt);
 793                                 EX_LOCK(sc);
 794                                 ifp->if_ipackets++;
 795                         }
 796                 } else {
 797                         ifp->if_ierrors++;
 798                 }
 799                 CSR_WRITE_2(sc, HOST_ADDR_REG, sc->rx_head);
 800 rx_another: ;
 801         }
 802
 803         if (sc->rx_head < sc->rx_lower_limit + 2)
 804                 CSR_WRITE_2(sc, RCV_STOP_REG, sc->rx_upper_limit);
 805         else
 806                 CSR_WRITE_2(sc, RCV_STOP_REG, sc->rx_head - 2);
 807
 808         DODEBUG(Start_End, printf("ex_rx_intr%d: finish\n", unit););
 809
 810         return;
 811 }
 812
 813
 814 static int
 815 ex_ioctl(register struct ifnet *ifp, u_long cmd, caddr_t data)
 816 {
 817         struct ex_softc *       sc = ifp->if_softc;
 818         struct ifreq *          ifr = (struct ifreq *)data;
 819         int                     error = 0;
 820
 821         DODEBUG(Start_End, printf("%s: ex_ioctl: start ", ifp->if_xname););
 822
 823         switch(cmd) {
 824                 case SIOCSIFADDR:
 825                 case SIOCGIFADDR:
 826                 case SIOCSIFMTU:
 827                         error = ether_ioctl(ifp, cmd, data);
 828                         break;
 829
 830                 case SIOCSIFFLAGS:
 831                         DODEBUG(Start_End, printf("SIOCSIFFLAGS"););
 832                         EX_LOCK(sc);
 833                         if ((ifp->if_flags & IFF_UP) == 0 &&
 834                             (ifp->if_drv_flags & IFF_DRV_RUNNING)) {
 835                                 ex_stop(sc);
 836                         } else {
 837                                 ex_init_locked(sc);
 838                         }
 839                         EX_UNLOCK(sc);
 840                         break;
 841                 case SIOCADDMULTI:
 842                 case SIOCDELMULTI:
 843                         ex_init(sc);
 844                         error = 0;
 845                         break;
 846                 case SIOCSIFMEDIA:
 847                 case SIOCGIFMEDIA:
 848                         error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, cmd);
 849                         break;
 850                 default:
 851                         DODEBUG(Start_End, printf("unknown"););
 852                         error = EINVAL;
 853         }
 854
 855         DODEBUG(Start_End, printf("\n%s: ex_ioctl: finish\n", ifp->if_xname););
 856
 857         return(error);
 858 }
 859
 860 static void
 861 ex_setmulti(struct ex_softc *sc)
 862 {
 863         struct ifnet *ifp;
 864         struct ifmultiaddr *maddr;
 865         uint16_t *addr;
 866         int count;
 867         int timeout, status;
 868
 869         ifp = sc->ifp;
 870
 871         count = 0;
 872         if_maddr_rlock(ifp);
 873         TAILQ_FOREACH(maddr, &ifp->if_multiaddrs, ifma_link) {
 874                 if (maddr->ifma_addr->sa_family != AF_LINK)
 875                         continue;
 876                 count++;
 877         }
 878         if_maddr_runlock(ifp);
 879
 880         if ((ifp->if_flags & IFF_PROMISC) || (ifp->if_flags & IFF_ALLMULTI)
 881                         || count > 63) {
 882                 /* Interface is in promiscuous mode or there are too many
 883                  * multicast addresses for the card to handle */
 884                 CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
 885                 CSR_WRITE_1(sc, REG2, CSR_READ_1(sc, REG2) | Promisc_Mode);
 886                 CSR_WRITE_1(sc, REG3, CSR_READ_1(sc, REG3));
 887                 CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
 888         }
 889         else if ((ifp->if_flags & IFF_MULTICAST) && (count > 0)) {
 890                 /* Program multicast addresses plus our MAC address
 891                  * into the filter */
 892                 CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
 893                 CSR_WRITE_1(sc, REG2, CSR_READ_1(sc, REG2) | Multi_IA);
 894                 CSR_WRITE_1(sc, REG3, CSR_READ_1(sc, REG3));
 895                 CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
 896
 897                 /* Borrow space from TX buffer; this should be safe
 898                  * as this is only called from ex_init */
 899
 900                 CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_lower_limit);
 901                 CSR_WRITE_2(sc, IO_PORT_REG, MC_Setup_CMD);
 902                 CSR_WRITE_2(sc, IO_PORT_REG, 0);
 903                 CSR_WRITE_2(sc, IO_PORT_REG, 0);
 904                 CSR_WRITE_2(sc, IO_PORT_REG, (count + 1) * 6);
 905
 906                 if_maddr_rlock(ifp);
 907                 TAILQ_FOREACH(maddr, &ifp->if_multiaddrs, ifma_link) {
 908                         if (maddr->ifma_addr->sa_family != AF_LINK)
 909                                 continue;
 910
 911                         addr = (uint16_t*)LLADDR((struct sockaddr_dl *)
 912                                         maddr->ifma_addr);
 913                         CSR_WRITE_2(sc, IO_PORT_REG, *addr++);
 914                         CSR_WRITE_2(sc, IO_PORT_REG, *addr++);
 915                         CSR_WRITE_2(sc, IO_PORT_REG, *addr++);
 916                 }
 917                 if_maddr_runlock(ifp);
 918
 919                 /* Program our MAC address as well */
 920                 /* XXX: Is this necessary?  The Linux driver does this
 921                  * but the NetBSD driver does not */
 922                 addr = (uint16_t*)IF_LLADDR(sc->ifp);
 923                 CSR_WRITE_2(sc, IO_PORT_REG, *addr++);
 924                 CSR_WRITE_2(sc, IO_PORT_REG, *addr++);
 925                 CSR_WRITE_2(sc, IO_PORT_REG, *addr++);
 926
 927                 CSR_READ_2(sc, IO_PORT_REG);
 928                 CSR_WRITE_2(sc, XMT_BAR, sc->tx_lower_limit);
 929                 CSR_WRITE_1(sc, CMD_REG, MC_Setup_CMD);
 930
 931                 sc->tx_head = sc->tx_lower_limit;
 932                 sc->tx_tail = sc->tx_head + XMT_HEADER_LEN + (count + 1) * 6;
 933
 934                 for (timeout=0; timeout<100; timeout++) {
 935                         DELAY(2);
 936                         if ((CSR_READ_1(sc, STATUS_REG) & Exec_Int) == 0)
 937                                 continue;
 938
 939                         status = CSR_READ_1(sc, CMD_REG);
 940                         CSR_WRITE_1(sc, STATUS_REG, Exec_Int);
 941                         break;
 942                 }
 943
 944                 sc->tx_head = sc->tx_tail;
 945         }
 946         else
 947         {
 948                 /* No multicast or promiscuous mode */
 949                 CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
 950                 CSR_WRITE_1(sc, REG2, CSR_READ_1(sc, REG2) & 0xDE);
 951                         /* ~(Multi_IA | Promisc_Mode) */
 952                 CSR_WRITE_1(sc, REG3, CSR_READ_1(sc, REG3));
 953                 CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
 954         }
 955 }
 956
 957 static void
 958 ex_reset(struct ex_softc *sc)
 959 {
 960
 961         DODEBUG(Start_End, printf("ex_reset%d: start\n", unit););
 962
 963         EX_ASSERT_LOCKED(sc);
 964         ex_stop(sc);
 965         ex_init_locked(sc);
 966
 967         DODEBUG(Start_End, printf("ex_reset%d: finish\n", unit););
 968
 969         return;
 970 }
 971
 972 static void
 973 ex_watchdog(void *arg)
 974 {
 975         struct ex_softc *       sc = arg;
 976         struct ifnet *ifp = sc->ifp;
 977
 978         if (sc->tx_timeout && --sc->tx_timeout == 0) {
 979                 DODEBUG(Start_End, if_printf(ifp, "ex_watchdog: start\n"););
 980
 981                 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 982
 983                 DODEBUG(Status, printf("OIDLE watchdog\n"););
 984
 985                 ifp->if_oerrors++;
 986                 ex_reset(sc);
 987                 ex_start_locked(ifp);
 988
 989                 DODEBUG(Start_End, if_printf(ifp, "ex_watchdog: finish\n"););
 990         }
 991
 992         callout_reset(&sc->timer, hz, ex_watchdog, sc);
 993 }
 994
 995 static int
 996 ex_get_media(struct ex_softc *sc)
 997 {
 998         int     current;
 999         int     media;
1000
1001         media = ex_eeprom_read(sc, EE_W5);
1002
1003         CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
1004         current = CSR_READ_1(sc, REG3);
1005         CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
1006
1007         if ((current & TPE_bit) && (media & EE_W5_PORT_TPE))
1008                 return(IFM_ETHER|IFM_10_T);
1009         if ((current & BNC_bit) && (media & EE_W5_PORT_BNC))
1010                 return(IFM_ETHER|IFM_10_2);
1011
1012         if (media & EE_W5_PORT_AUI)
1013                 return (IFM_ETHER|IFM_10_5);
1014
1015         return (IFM_ETHER|IFM_AUTO);
1016 }
1017
1018 static int
1019 ex_ifmedia_upd(ifp)
1020         struct ifnet *          ifp;
1021 {
1022         struct ex_softc *       sc = ifp->if_softc;
1023
1024         if (IFM_TYPE(sc->ifmedia.ifm_media) != IFM_ETHER)
1025                 return EINVAL;
1026
1027         return (0);
1028 }
1029
1030 static void
1031 ex_ifmedia_sts(ifp, ifmr)
1032         struct ifnet *          ifp;
1033         struct ifmediareq *     ifmr;
1034 {
1035         struct ex_softc *       sc = ifp->if_softc;
1036
1037         EX_LOCK(sc);
1038         ifmr->ifm_active = ex_get_media(sc);
1039         ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
1040         EX_UNLOCK(sc);
1041
1042         return;
1043 }
1044
1045 u_short
1046 ex_eeprom_read(struct ex_softc *sc, int location)
1047 {
1048         int i;
1049         u_short data = 0;
1050         int read_cmd = location | EE_READ_CMD;
1051         short ctrl_val = EECS;
1052
1053         CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
1054         CSR_WRITE_1(sc, EEPROM_REG, EECS);
1055         for (i = 8; i >= 0; i--) {
1056                 short outval = (read_cmd & (1 << i)) ? ctrl_val | EEDI : ctrl_val;
1057                 CSR_WRITE_1(sc, EEPROM_REG, outval);
1058                 CSR_WRITE_1(sc, EEPROM_REG, outval | EESK);
1059                 DELAY(3);
1060                 CSR_WRITE_1(sc, EEPROM_REG, outval);
1061                 DELAY(2);
1062         }
1063         CSR_WRITE_1(sc, EEPROM_REG, ctrl_val);
1064
1065         for (i = 16; i > 0; i--) {
1066                 CSR_WRITE_1(sc, EEPROM_REG, ctrl_val | EESK);
1067                 DELAY(3);
1068                 data = (data << 1) |
1069                     ((CSR_READ_1(sc, EEPROM_REG) & EEDO) ? 1 : 0);
1070                 CSR_WRITE_1(sc, EEPROM_REG, ctrl_val);
1071                 DELAY(2);
1072         }
1073
1074         ctrl_val &= ~EECS;
1075         CSR_WRITE_1(sc, EEPROM_REG, ctrl_val | EESK);
1076         DELAY(3);
1077         CSR_WRITE_1(sc, EEPROM_REG, ctrl_val);
1078         DELAY(2);
1079         CSR_WRITE_1(sc, CMD_REG, Bank0_Sel);
1080         return(data);
1081 }