2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * PCI:PCI bridge support.
38 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
44 #include <sys/sysctl.h>
45 #include <sys/systm.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pci_private.h>
50 #include <dev/pci/pcib_private.h>
54 static int pcib_probe(device_t dev);
55 static int pcib_suspend(device_t dev);
56 static int pcib_resume(device_t dev);
57 static int pcib_power_for_sleep(device_t pcib, device_t dev,
60 static device_method_t pcib_methods[] = {
61 /* Device interface */
62 DEVMETHOD(device_probe, pcib_probe),
63 DEVMETHOD(device_attach, pcib_attach),
64 DEVMETHOD(device_detach, bus_generic_detach),
65 DEVMETHOD(device_shutdown, bus_generic_shutdown),
66 DEVMETHOD(device_suspend, pcib_suspend),
67 DEVMETHOD(device_resume, pcib_resume),
70 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
71 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
72 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
74 DEVMETHOD(bus_adjust_resource, pcib_adjust_resource),
75 DEVMETHOD(bus_release_resource, pcib_release_resource),
77 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
78 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
80 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
81 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
82 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
83 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
86 DEVMETHOD(pcib_maxslots, pcib_maxslots),
87 DEVMETHOD(pcib_read_config, pcib_read_config),
88 DEVMETHOD(pcib_write_config, pcib_write_config),
89 DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
90 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
91 DEVMETHOD(pcib_release_msi, pcib_release_msi),
92 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
93 DEVMETHOD(pcib_release_msix, pcib_release_msix),
94 DEVMETHOD(pcib_map_msi, pcib_map_msi),
95 DEVMETHOD(pcib_power_for_sleep, pcib_power_for_sleep),
100 static devclass_t pcib_devclass;
102 DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
103 DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL);
108 * Is a resource from a child device sub-allocated from one of our
112 pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
117 return (rman_is_region_manager(r, &sc->io.rman));
119 /* Prefetchable resources may live in either memory rman. */
120 if (rman_get_flags(r) & RF_PREFETCHABLE &&
121 rman_is_region_manager(r, &sc->pmem.rman))
123 return (rman_is_region_manager(r, &sc->mem.rman));
129 pcib_is_window_open(struct pcib_window *pw)
132 return (pw->valid && pw->base < pw->limit);
136 * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and
137 * handle for the resource, we could pass RF_ACTIVE up to the PCI bus
138 * when allocating the resource windows and rely on the PCI bus driver
142 pcib_activate_window(struct pcib_softc *sc, int type)
145 PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
149 pcib_write_windows(struct pcib_softc *sc, int mask)
155 if (sc->io.valid && mask & WIN_IO) {
156 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
157 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
158 pci_write_config(dev, PCIR_IOBASEH_1,
159 sc->io.base >> 16, 2);
160 pci_write_config(dev, PCIR_IOLIMITH_1,
161 sc->io.limit >> 16, 2);
163 pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
164 pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
167 if (mask & WIN_MEM) {
168 pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
169 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
172 if (sc->pmem.valid && mask & WIN_PMEM) {
173 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
174 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
175 pci_write_config(dev, PCIR_PMBASEH_1,
176 sc->pmem.base >> 32, 4);
177 pci_write_config(dev, PCIR_PMLIMITH_1,
178 sc->pmem.limit >> 32, 4);
180 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
181 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
186 * This is used to reject I/O port allocations that conflict with an
190 pcib_is_isa_range(struct pcib_softc *sc, u_long start, u_long end, u_long count)
194 if (!(sc->bridgectl & PCIB_BCR_ISA_ENABLE))
197 /* Only check fixed ranges for overlap. */
198 if (start + count - 1 != end)
201 /* ISA aliases are only in the lower 64KB of I/O space. */
205 /* Check for overlap with 0x000 - 0x0ff as a special case. */
210 * If the start address is an alias, the range is an alias.
211 * Otherwise, compute the start of the next alias range and
212 * check if it is before the end of the candidate range.
214 if ((start & 0x300) != 0)
216 next_alias = (start & ~0x3fful) | 0x100;
217 if (next_alias <= end)
223 device_printf(sc->dev,
224 "I/O range %#lx-%#lx overlaps with an ISA alias\n", start,
230 pcib_add_window_resources(struct pcib_window *w, struct resource **res,
233 struct resource **newarray;
236 newarray = malloc(sizeof(struct resource *) * (w->count + count),
239 bcopy(w->res, newarray, sizeof(struct resource *) * w->count);
240 bcopy(res, newarray + w->count, sizeof(struct resource *) * count);
241 free(w->res, M_DEVBUF);
245 for (i = 0; i < count; i++) {
246 error = rman_manage_region(&w->rman, rman_get_start(res[i]),
247 rman_get_end(res[i]));
249 panic("Failed to add resource to rman");
253 typedef void (nonisa_callback)(u_long start, u_long end, void *arg);
256 pcib_walk_nonisa_ranges(u_long start, u_long end, nonisa_callback *cb,
262 * If start is within an ISA alias range, move up to the start
263 * of the next non-alias range. As a special case, addresses
264 * in the range 0x000 - 0x0ff should also be skipped since
265 * those are used for various system I/O devices in ISA
268 if (start <= 65535) {
269 if (start < 0x100 || (start & 0x300) != 0) {
275 /* ISA aliases are only in the lower 64KB of I/O space. */
276 while (start <= MIN(end, 65535)) {
277 next_end = MIN(start | 0xff, end);
278 cb(start, next_end, arg);
287 count_ranges(u_long start, u_long end, void *arg)
296 struct resource **res;
297 struct pcib_softc *sc;
302 alloc_ranges(u_long start, u_long end, void *arg)
304 struct alloc_state *as;
305 struct pcib_window *w;
315 device_printf(as->sc->dev,
316 "allocating non-ISA range %#lx-%#lx\n", start, end);
317 as->res[as->count] = bus_alloc_resource(as->sc->dev, SYS_RES_IOPORT,
318 &rid, start, end, end - start + 1, 0);
319 if (as->res[as->count] == NULL)
326 pcib_alloc_nonisa_ranges(struct pcib_softc *sc, u_long start, u_long end)
328 struct alloc_state as;
331 /* First, see how many ranges we need. */
333 pcib_walk_nonisa_ranges(start, end, count_ranges, &new_count);
335 /* Second, allocate the ranges. */
336 as.res = malloc(sizeof(struct resource *) * new_count, M_DEVBUF,
341 pcib_walk_nonisa_ranges(start, end, alloc_ranges, &as);
343 for (i = 0; i < as.count; i++)
344 bus_release_resource(sc->dev, SYS_RES_IOPORT,
345 sc->io.reg, as.res[i]);
346 free(as.res, M_DEVBUF);
349 KASSERT(as.count == new_count, ("%s: count mismatch", __func__));
351 /* Third, add the ranges to the window. */
352 pcib_add_window_resources(&sc->io, as.res, as.count);
353 free(as.res, M_DEVBUF);
358 pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
359 int flags, pci_addr_t max_address)
361 struct resource *res;
365 if (max_address != (u_long)max_address)
367 w->rman.rm_start = 0;
368 w->rman.rm_end = max_address;
369 w->rman.rm_type = RMAN_ARRAY;
370 snprintf(buf, sizeof(buf), "%s %s window",
371 device_get_nameunit(sc->dev), w->name);
372 w->rman.rm_descr = strdup(buf, M_DEVBUF);
373 error = rman_init(&w->rman);
375 panic("Failed to initialize %s %s rman",
376 device_get_nameunit(sc->dev), w->name);
378 if (!pcib_is_window_open(w))
381 if (w->base > max_address || w->limit > max_address) {
382 device_printf(sc->dev,
383 "initial %s window has too many bits, ignoring\n", w->name);
386 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE)
387 (void)pcib_alloc_nonisa_ranges(sc, w->base, w->limit);
390 res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
391 w->limit - w->base + 1, flags);
393 pcib_add_window_resources(w, &res, 1);
395 if (w->res == NULL) {
396 device_printf(sc->dev,
397 "failed to allocate initial %s window: %#jx-%#jx\n",
398 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
399 w->base = max_address;
401 pcib_write_windows(sc, w->mask);
404 pcib_activate_window(sc, type);
408 * Initialize I/O windows.
411 pcib_probe_windows(struct pcib_softc *sc)
419 /* Determine if the I/O port window is implemented. */
420 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
423 * If 'val' is zero, then only 16-bits of I/O space
426 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
427 if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
429 pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
434 /* Read the existing I/O port window. */
436 sc->io.reg = PCIR_IOBASEL_1;
438 sc->io.mask = WIN_IO;
439 sc->io.name = "I/O port";
440 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
441 sc->io.base = PCI_PPBIOBASE(
442 pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
443 sc->io.limit = PCI_PPBIOLIMIT(
444 pci_read_config(dev, PCIR_IOLIMITH_1, 2),
445 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
448 sc->io.base = PCI_PPBIOBASE(0, val);
449 sc->io.limit = PCI_PPBIOLIMIT(0,
450 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
453 pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
456 /* Read the existing memory window. */
458 sc->mem.reg = PCIR_MEMBASE_1;
460 sc->mem.mask = WIN_MEM;
461 sc->mem.name = "memory";
462 sc->mem.base = PCI_PPBMEMBASE(0,
463 pci_read_config(dev, PCIR_MEMBASE_1, 2));
464 sc->mem.limit = PCI_PPBMEMLIMIT(0,
465 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
466 pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
468 /* Determine if the prefetchable memory window is implemented. */
469 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
472 * If 'val' is zero, then only 32-bits of memory space
475 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
476 if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
478 pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
483 /* Read the existing prefetchable memory window. */
484 if (sc->pmem.valid) {
485 sc->pmem.reg = PCIR_PMBASEL_1;
487 sc->pmem.mask = WIN_PMEM;
488 sc->pmem.name = "prefetch";
489 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
490 sc->pmem.base = PCI_PPBMEMBASE(
491 pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
492 sc->pmem.limit = PCI_PPBMEMLIMIT(
493 pci_read_config(dev, PCIR_PMLIMITH_1, 4),
494 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
495 max = 0xffffffffffffffff;
497 sc->pmem.base = PCI_PPBMEMBASE(0, val);
498 sc->pmem.limit = PCI_PPBMEMLIMIT(0,
499 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
502 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
503 RF_PREFETCHABLE, max);
510 * Is the prefetch window open (eg, can we allocate memory in it?)
513 pcib_is_prefetch_open(struct pcib_softc *sc)
515 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
519 * Is the nonprefetch window open (eg, can we allocate memory in it?)
522 pcib_is_nonprefetch_open(struct pcib_softc *sc)
524 return (sc->membase > 0 && sc->membase < sc->memlimit);
528 * Is the io window open (eg, can we allocate ports in it?)
531 pcib_is_io_open(struct pcib_softc *sc)
533 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
537 * Get current I/O decode.
540 pcib_get_io_decode(struct pcib_softc *sc)
547 iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
548 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
549 sc->iobase = PCI_PPBIOBASE(
550 pci_read_config(dev, PCIR_IOBASEH_1, 2), iolow);
552 sc->iobase = PCI_PPBIOBASE(0, iolow);
554 iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
555 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
556 sc->iolimit = PCI_PPBIOLIMIT(
557 pci_read_config(dev, PCIR_IOLIMITH_1, 2), iolow);
559 sc->iolimit = PCI_PPBIOLIMIT(0, iolow);
563 * Get current memory decode.
566 pcib_get_mem_decode(struct pcib_softc *sc)
573 sc->membase = PCI_PPBMEMBASE(0,
574 pci_read_config(dev, PCIR_MEMBASE_1, 2));
575 sc->memlimit = PCI_PPBMEMLIMIT(0,
576 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
578 pmemlow = pci_read_config(dev, PCIR_PMBASEL_1, 2);
579 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
580 sc->pmembase = PCI_PPBMEMBASE(
581 pci_read_config(dev, PCIR_PMBASEH_1, 4), pmemlow);
583 sc->pmembase = PCI_PPBMEMBASE(0, pmemlow);
585 pmemlow = pci_read_config(dev, PCIR_PMLIMITL_1, 2);
586 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
587 sc->pmemlimit = PCI_PPBMEMLIMIT(
588 pci_read_config(dev, PCIR_PMLIMITH_1, 4), pmemlow);
590 sc->pmemlimit = PCI_PPBMEMLIMIT(0, pmemlow);
594 * Restore previous I/O decode.
597 pcib_set_io_decode(struct pcib_softc *sc)
604 iohi = sc->iobase >> 16;
606 pci_write_config(dev, PCIR_IOBASEH_1, iohi, 2);
607 pci_write_config(dev, PCIR_IOBASEL_1, sc->iobase >> 8, 1);
609 iohi = sc->iolimit >> 16;
611 pci_write_config(dev, PCIR_IOLIMITH_1, iohi, 2);
612 pci_write_config(dev, PCIR_IOLIMITL_1, sc->iolimit >> 8, 1);
616 * Restore previous memory decode.
619 pcib_set_mem_decode(struct pcib_softc *sc)
626 pci_write_config(dev, PCIR_MEMBASE_1, sc->membase >> 16, 2);
627 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->memlimit >> 16, 2);
629 pmemhi = sc->pmembase >> 32;
631 pci_write_config(dev, PCIR_PMBASEH_1, pmemhi, 4);
632 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmembase >> 16, 2);
634 pmemhi = sc->pmemlimit >> 32;
636 pci_write_config(dev, PCIR_PMLIMITH_1, pmemhi, 4);
637 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmemlimit >> 16, 2);
642 * Get current bridge configuration.
645 pcib_cfg_save(struct pcib_softc *sc)
651 sc->command = pci_read_config(dev, PCIR_COMMAND, 2);
652 sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1);
653 sc->secbus = pci_read_config(dev, PCIR_SECBUS_1, 1);
654 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
655 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
656 sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1);
658 if (sc->command & PCIM_CMD_PORTEN)
659 pcib_get_io_decode(sc);
660 if (sc->command & PCIM_CMD_MEMEN)
661 pcib_get_mem_decode(sc);
666 * Restore previous bridge configuration.
669 pcib_cfg_restore(struct pcib_softc *sc)
675 pci_write_config(dev, PCIR_COMMAND, sc->command, 2);
676 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
677 pci_write_config(dev, PCIR_SECBUS_1, sc->secbus, 1);
678 pci_write_config(dev, PCIR_SUBBUS_1, sc->subbus, 1);
679 pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2);
680 pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1);
682 pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM);
684 if (sc->command & PCIM_CMD_PORTEN)
685 pcib_set_io_decode(sc);
686 if (sc->command & PCIM_CMD_MEMEN)
687 pcib_set_mem_decode(sc);
692 * Generic device interface
695 pcib_probe(device_t dev)
697 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
698 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
699 device_set_desc(dev, "PCI-PCI bridge");
706 pcib_attach_common(device_t dev)
708 struct pcib_softc *sc;
709 struct sysctl_ctx_list *sctx;
710 struct sysctl_oid *soid;
713 sc = device_get_softc(dev);
717 * Get current bridge configuration.
719 sc->domain = pci_get_domain(dev);
720 sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2);
724 * Setup sysctl reporting nodes
726 sctx = device_get_sysctl_ctx(dev);
727 soid = device_get_sysctl_tree(dev);
728 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
729 CTLFLAG_RD, &sc->domain, 0, "Domain number");
730 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
731 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
732 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
733 CTLFLAG_RD, &sc->secbus, 0, "Secondary bus number");
734 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
735 CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number");
740 switch (pci_get_devid(dev)) {
741 case 0x12258086: /* Intel 82454KX/GX (Orion) */
745 supbus = pci_read_config(dev, 0x41, 1);
746 if (supbus != 0xff) {
747 sc->secbus = supbus + 1;
748 sc->subbus = supbus + 1;
754 * The i82380FB mobile docking controller is a PCI-PCI bridge,
755 * and it is a subtractive bridge. However, the ProgIf is wrong
756 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
757 * happen. There's also a Toshiba bridge that behaves this
760 case 0x124b8086: /* Intel 82380FB Mobile */
761 case 0x060513d7: /* Toshiba ???? */
762 sc->flags |= PCIB_SUBTRACTIVE;
765 /* Compaq R3000 BIOS sets wrong subordinate bus number. */
770 if ((cp = getenv("smbios.planar.maker")) == NULL)
772 if (strncmp(cp, "Compal", 6) != 0) {
777 if ((cp = getenv("smbios.planar.product")) == NULL)
779 if (strncmp(cp, "08A0", 4) != 0) {
784 if (sc->subbus < 0xa) {
785 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
786 sc->subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1);
792 if (pci_msi_device_blacklisted(dev))
793 sc->flags |= PCIB_DISABLE_MSI;
795 if (pci_msix_device_blacklisted(dev))
796 sc->flags |= PCIB_DISABLE_MSIX;
799 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
800 * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
801 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
802 * This means they act as if they were subtractively decoding
803 * bridges and pass all transactions. Mark them and real ProgIf 1
804 * parts as subtractive.
806 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
807 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE)
808 sc->flags |= PCIB_SUBTRACTIVE;
811 pcib_probe_windows(sc);
814 device_printf(dev, " domain %d\n", sc->domain);
815 device_printf(dev, " secondary bus %d\n", sc->secbus);
816 device_printf(dev, " subordinate bus %d\n", sc->subbus);
818 if (pcib_is_window_open(&sc->io))
819 device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
820 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
821 if (pcib_is_window_open(&sc->mem))
822 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
823 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
824 if (pcib_is_window_open(&sc->pmem))
825 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
826 (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
828 if (pcib_is_io_open(sc))
829 device_printf(dev, " I/O decode 0x%x-0x%x\n",
830 sc->iobase, sc->iolimit);
831 if (pcib_is_nonprefetch_open(sc))
832 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
833 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit);
834 if (pcib_is_prefetch_open(sc))
835 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
836 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
838 if (sc->bridgectl & (PCIB_BCR_ISA_ENABLE | PCIB_BCR_VGA_ENABLE) ||
839 sc->flags & PCIB_SUBTRACTIVE) {
840 device_printf(dev, " special decode ");
842 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE) {
846 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) {
847 printf("%sVGA", comma ? ", " : "");
850 if (sc->flags & PCIB_SUBTRACTIVE)
851 printf("%ssubtractive", comma ? ", " : "");
857 * XXX If the secondary bus number is zero, we should assign a bus number
858 * since the BIOS hasn't, then initialise the bridge. A simple
859 * bus_alloc_resource with the a couple of busses seems like the right
860 * approach, but we don't know what busses the BIOS might have already
861 * assigned to other bridges on this bus that probe later than we do.
863 * If the subordinate bus number is less than the secondary bus number,
864 * we should pick a better value. One sensible alternative would be to
865 * pick 255; the only tradeoff here is that configuration transactions
866 * would be more widely routed than absolutely necessary. We could
867 * then do a walk of the tree later and fix it.
871 * Always enable busmastering on bridges so that transactions
872 * initiated on the secondary bus are passed through to the
875 pci_enable_busmaster(dev);
879 pcib_attach(device_t dev)
881 struct pcib_softc *sc;
884 pcib_attach_common(dev);
885 sc = device_get_softc(dev);
886 if (sc->secbus != 0) {
887 child = device_add_child(dev, "pci", sc->secbus);
889 return(bus_generic_attach(dev));
892 /* no secondary bus; we should have fixed this */
897 pcib_suspend(device_t dev)
902 pcib_cfg_save(device_get_softc(dev));
903 error = bus_generic_suspend(dev);
904 if (error == 0 && pci_do_power_suspend) {
905 dstate = PCI_POWERSTATE_D3;
906 pcib = device_get_parent(device_get_parent(dev));
907 if (PCIB_POWER_FOR_SLEEP(pcib, dev, &dstate) == 0)
908 pci_set_powerstate(dev, dstate);
914 pcib_resume(device_t dev)
918 if (pci_do_power_resume) {
919 pcib = device_get_parent(device_get_parent(dev));
920 if (PCIB_POWER_FOR_SLEEP(pcib, dev, NULL) == 0)
921 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
923 pcib_cfg_restore(device_get_softc(dev));
924 return (bus_generic_resume(dev));
928 pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
930 struct pcib_softc *sc = device_get_softc(dev);
933 case PCIB_IVAR_DOMAIN:
934 *result = sc->domain;
937 *result = sc->secbus;
944 pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
946 struct pcib_softc *sc = device_get_softc(dev);
949 case PCIB_IVAR_DOMAIN:
960 * Attempt to allocate a resource from the existing resources assigned
963 static struct resource *
964 pcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w,
965 device_t child, int type, int *rid, u_long start, u_long end, u_long count,
968 struct resource *res;
970 if (!pcib_is_window_open(w))
973 res = rman_reserve_resource(&w->rman, start, end, count,
974 flags & ~RF_ACTIVE, child);
979 device_printf(sc->dev,
980 "allocated %s range (%#lx-%#lx) for rid %x of %s\n",
981 w->name, rman_get_start(res), rman_get_end(res), *rid,
982 pcib_child_name(child));
983 rman_set_rid(res, *rid);
986 * If the resource should be active, pass that request up the
987 * tree. This assumes the parent drivers can handle
988 * activating sub-allocated resources.
990 if (flags & RF_ACTIVE) {
991 if (bus_activate_resource(child, type, *rid, res) != 0) {
992 rman_release_resource(res);
1000 /* Allocate a fresh resource range for an unconfigured window. */
1002 pcib_alloc_new_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1003 u_long start, u_long end, u_long count, u_int flags)
1005 struct resource *res;
1006 u_long base, limit, wmask;
1010 * If this is an I/O window on a bridge with ISA enable set
1011 * and the start address is below 64k, then try to allocate an
1012 * initial window of 0x1000 bytes long starting at address
1013 * 0xf000 and walking down. Note that if the original request
1014 * was larger than the non-aliased range size of 0x100 our
1015 * caller would have raised the start address up to 64k
1018 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1020 for (base = 0xf000; (long)base >= 0; base -= 0x1000) {
1021 limit = base + 0xfff;
1024 * Skip ranges that wouldn't work for the
1025 * original request. Note that the actual
1026 * window that overlaps are the non-alias
1027 * ranges within [base, limit], so this isn't
1028 * quite a simple comparison.
1030 if (start + count > limit - 0x400)
1034 * The first open region for the window at
1037 if (end - count + 1 < 0x400)
1040 if (end - count + 1 < base)
1044 if (pcib_alloc_nonisa_ranges(sc, base, limit) == 0) {
1053 wmask = (1ul << w->step) - 1;
1054 if (RF_ALIGNMENT(flags) < w->step) {
1055 flags &= ~RF_ALIGNMENT_MASK;
1056 flags |= RF_ALIGNMENT_LOG2(w->step);
1060 count = roundup2(count, 1ul << w->step);
1062 res = bus_alloc_resource(sc->dev, type, &rid, start, end, count,
1063 flags & ~RF_ACTIVE);
1066 pcib_add_window_resources(w, &res, 1);
1067 pcib_activate_window(sc, type);
1068 w->base = rman_get_start(res);
1069 w->limit = rman_get_end(res);
1073 /* Try to expand an existing window to the requested base and limit. */
1075 pcib_expand_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1076 u_long base, u_long limit)
1078 struct resource *res;
1079 int error, i, force_64k_base;
1081 KASSERT(base <= w->base && limit >= w->limit,
1082 ("attempting to shrink window"));
1085 * XXX: pcib_grow_window() doesn't try to do this anyway and
1086 * the error handling for all the edge cases would be tedious.
1088 KASSERT(limit == w->limit || base == w->base,
1089 ("attempting to grow both ends of a window"));
1092 * Yet more special handling for requests to expand an I/O
1093 * window behind an ISA-enabled bridge. Since I/O windows
1094 * have to grow in 0x1000 increments and the end of the 0xffff
1095 * range is an alias, growing a window below 64k will always
1096 * result in allocating new resources and never adjusting an
1097 * existing resource.
1099 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1100 (limit <= 65535 || (base <= 65535 && base != w->base))) {
1101 KASSERT(limit == w->limit || limit <= 65535,
1102 ("attempting to grow both ends across 64k ISA alias"));
1104 if (base != w->base)
1105 error = pcib_alloc_nonisa_ranges(sc, base, w->base - 1);
1107 error = pcib_alloc_nonisa_ranges(sc, w->limit + 1,
1117 * Find the existing resource to adjust. Usually there is only one,
1118 * but for an ISA-enabled bridge we might be growing the I/O window
1119 * above 64k and need to find the existing resource that maps all
1120 * of the area above 64k.
1122 for (i = 0; i < w->count; i++) {
1123 if (rman_get_end(w->res[i]) == w->limit)
1126 KASSERT(i != w->count, ("did not find existing resource"));
1130 * Usually the resource we found should match the window's
1131 * existing range. The one exception is the ISA-enabled case
1132 * mentioned above in which case the resource should start at
1135 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1137 KASSERT(rman_get_start(res) == 65536,
1138 ("existing resource mismatch"));
1141 KASSERT(w->base == rman_get_start(res),
1142 ("existing resource mismatch"));
1146 error = bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1147 rman_get_start(res) : base, limit);
1151 /* Add the newly allocated region to the resource manager. */
1152 if (w->base != base) {
1153 error = rman_manage_region(&w->rman, base, w->base - 1);
1156 error = rman_manage_region(&w->rman, w->limit + 1, limit);
1161 device_printf(sc->dev,
1162 "failed to expand %s resource manager\n", w->name);
1163 (void)bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1164 rman_get_start(res) : w->base, w->limit);
1170 * Attempt to grow a window to make room for a given resource request.
1173 pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1174 u_long start, u_long end, u_long count, u_int flags)
1176 u_long align, start_free, end_free, front, back, wmask;
1180 * Clamp the desired resource range to the maximum address
1181 * this window supports. Reject impossible requests.
1183 * For I/O port requests behind a bridge with the ISA enable
1184 * bit set, force large allocations to start above 64k.
1188 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE && count > 0x100 &&
1191 if (end > w->rman.rm_end)
1192 end = w->rman.rm_end;
1193 if (start + count - 1 > end || start + count < start)
1195 wmask = (1ul << w->step) - 1;
1198 * If there is no resource at all, just try to allocate enough
1199 * aligned space for this resource.
1201 if (w->res == NULL) {
1202 error = pcib_alloc_new_window(sc, w, type, start, end, count,
1206 device_printf(sc->dev,
1207 "failed to allocate initial %s window (%#lx-%#lx,%#lx)\n",
1208 w->name, start, end, count);
1212 device_printf(sc->dev,
1213 "allocated initial %s window of %#jx-%#jx\n",
1214 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1219 * See if growing the window would help. Compute the minimum
1220 * amount of address space needed on both the front and back
1221 * ends of the existing window to satisfy the allocation.
1223 * For each end, build a candidate region adjusting for the
1224 * required alignment, etc. If there is a free region at the
1225 * edge of the window, grow from the inner edge of the free
1226 * region. Otherwise grow from the window boundary.
1228 * Growing an I/O window below 64k for a bridge with the ISA
1229 * enable bit doesn't require any special magic as the step
1230 * size of an I/O window (1k) always includes multiple
1231 * non-alias ranges when it is grown in either direction.
1233 * XXX: Special case: if w->res is completely empty and the
1234 * request size is larger than w->res, we should find the
1235 * optimal aligned buffer containing w->res and allocate that.
1238 device_printf(sc->dev,
1239 "attempting to grow %s window for (%#lx-%#lx,%#lx)\n",
1240 w->name, start, end, count);
1241 align = 1ul << RF_ALIGNMENT(flags);
1242 if (start < w->base) {
1243 if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
1244 0 || start_free != w->base)
1249 /* Move end_free down until it is properly aligned. */
1250 end_free &= ~(align - 1);
1252 front = end_free - (count - 1);
1255 * The resource would now be allocated at (front,
1256 * end_free). Ensure that fits in the (start, end)
1257 * bounds. end_free is checked above. If 'front' is
1258 * ok, ensure it is properly aligned for this window.
1259 * Also check for underflow.
1261 if (front >= start && front <= end_free) {
1263 printf("\tfront candidate range: %#lx-%#lx\n",
1266 front = w->base - front;
1271 if (end > w->limit) {
1272 if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
1273 0 || end_free != w->limit)
1274 start_free = w->limit + 1;
1275 if (start_free < start)
1278 /* Move start_free up until it is properly aligned. */
1279 start_free = roundup2(start_free, align);
1280 back = start_free + count - 1;
1283 * The resource would now be allocated at (start_free,
1284 * back). Ensure that fits in the (start, end)
1285 * bounds. start_free is checked above. If 'back' is
1286 * ok, ensure it is properly aligned for this window.
1287 * Also check for overflow.
1289 if (back <= end && start_free <= back) {
1291 printf("\tback candidate range: %#lx-%#lx\n",
1301 * Try to allocate the smallest needed region first.
1302 * If that fails, fall back to the other region.
1305 while (front != 0 || back != 0) {
1306 if (front != 0 && (front <= back || back == 0)) {
1307 error = pcib_expand_window(sc, w, type, w->base - front,
1313 error = pcib_expand_window(sc, w, type, w->base,
1324 device_printf(sc->dev, "grew %s window to %#jx-%#jx\n",
1325 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1328 /* Write the new window. */
1329 KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
1330 KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
1331 pcib_write_windows(sc, w->mask);
1336 * We have to trap resource allocation requests and ensure that the bridge
1337 * is set up to, or capable of handling them.
1340 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1341 u_long start, u_long end, u_long count, u_int flags)
1343 struct pcib_softc *sc;
1346 sc = device_get_softc(dev);
1349 * VGA resources are decoded iff the VGA enable bit is set in
1350 * the bridge control register. VGA resources do not fall into
1351 * the resource windows and are passed up to the parent.
1353 if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) ||
1354 (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) {
1355 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
1356 return (bus_generic_alloc_resource(dev, child, type,
1357 rid, start, end, count, flags));
1363 case SYS_RES_IOPORT:
1364 if (pcib_is_isa_range(sc, start, end, count))
1366 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
1368 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1370 if (pcib_grow_window(sc, &sc->io, type, start, end, count,
1372 r = pcib_suballoc_resource(sc, &sc->io, child, type,
1373 rid, start, end, count, flags);
1375 case SYS_RES_MEMORY:
1377 * For prefetchable resources, prefer the prefetchable
1378 * memory window, but fall back to the regular memory
1379 * window if that fails. Try both windows before
1380 * attempting to grow a window in case the firmware
1381 * has used a range in the regular memory window to
1382 * map a prefetchable BAR.
1384 if (flags & RF_PREFETCHABLE) {
1385 r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
1386 rid, start, end, count, flags);
1390 r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
1391 start, end, count, flags);
1392 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1394 if (flags & RF_PREFETCHABLE) {
1395 if (pcib_grow_window(sc, &sc->pmem, type, start, end,
1396 count, flags) == 0) {
1397 r = pcib_suballoc_resource(sc, &sc->pmem, child,
1398 type, rid, start, end, count, flags);
1403 if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
1404 flags & ~RF_PREFETCHABLE) == 0)
1405 r = pcib_suballoc_resource(sc, &sc->mem, child, type,
1406 rid, start, end, count, flags);
1409 return (bus_generic_alloc_resource(dev, child, type, rid,
1410 start, end, count, flags));
1414 * If attempts to suballocate from the window fail but this is a
1415 * subtractive bridge, pass the request up the tree.
1417 if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
1418 return (bus_generic_alloc_resource(dev, child, type, rid,
1419 start, end, count, flags));
1424 pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r,
1425 u_long start, u_long end)
1427 struct pcib_softc *sc;
1429 sc = device_get_softc(bus);
1430 if (pcib_is_resource_managed(sc, type, r))
1431 return (rman_adjust_resource(r, start, end));
1432 return (bus_generic_adjust_resource(bus, child, type, r, start, end));
1436 pcib_release_resource(device_t dev, device_t child, int type, int rid,
1439 struct pcib_softc *sc;
1442 sc = device_get_softc(dev);
1443 if (pcib_is_resource_managed(sc, type, r)) {
1444 if (rman_get_flags(r) & RF_ACTIVE) {
1445 error = bus_deactivate_resource(child, type, rid, r);
1449 return (rman_release_resource(r));
1451 return (bus_generic_release_resource(dev, child, type, rid, r));
1455 * We have to trap resource allocation requests and ensure that the bridge
1456 * is set up to, or capable of handling them.
1459 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1460 u_long start, u_long end, u_long count, u_int flags)
1462 struct pcib_softc *sc = device_get_softc(dev);
1463 const char *name, *suffix;
1467 * Fail the allocation for this range if it's not supported.
1469 name = device_get_nameunit(child);
1476 case SYS_RES_IOPORT:
1478 if (!pcib_is_io_open(sc))
1480 ok = (start >= sc->iobase && end <= sc->iolimit);
1483 * Make sure we allow access to VGA I/O addresses when the
1484 * bridge has the "VGA Enable" bit set.
1486 if (!ok && pci_is_vga_ioport_range(start, end))
1487 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1489 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1491 if (start < sc->iobase)
1493 if (end > sc->iolimit)
1502 * If we overlap with the subtractive range, then
1503 * pick the upper range to use.
1505 if (start < sc->iolimit && end > sc->iobase)
1506 start = sc->iolimit + 1;
1510 device_printf(dev, "ioport: end (%lx) < start (%lx)\n",
1517 device_printf(dev, "%s%srequested unsupported I/O "
1518 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
1519 name, suffix, start, end, sc->iobase, sc->iolimit);
1524 "%s%srequested I/O range 0x%lx-0x%lx: in range\n",
1525 name, suffix, start, end);
1528 case SYS_RES_MEMORY:
1530 if (pcib_is_nonprefetch_open(sc))
1531 ok = ok || (start >= sc->membase && end <= sc->memlimit);
1532 if (pcib_is_prefetch_open(sc))
1533 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
1536 * Make sure we allow access to VGA memory addresses when the
1537 * bridge has the "VGA Enable" bit set.
1539 if (!ok && pci_is_vga_memory_range(start, end))
1540 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1542 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1545 if (flags & RF_PREFETCHABLE) {
1546 if (pcib_is_prefetch_open(sc)) {
1547 if (start < sc->pmembase)
1548 start = sc->pmembase;
1549 if (end > sc->pmemlimit)
1550 end = sc->pmemlimit;
1554 } else { /* non-prefetchable */
1555 if (pcib_is_nonprefetch_open(sc)) {
1556 if (start < sc->membase)
1557 start = sc->membase;
1558 if (end > sc->memlimit)
1566 ok = 1; /* subtractive bridge: always ok */
1568 if (pcib_is_nonprefetch_open(sc)) {
1569 if (start < sc->memlimit && end > sc->membase)
1570 start = sc->memlimit + 1;
1572 if (pcib_is_prefetch_open(sc)) {
1573 if (start < sc->pmemlimit && end > sc->pmembase)
1574 start = sc->pmemlimit + 1;
1579 device_printf(dev, "memory: end (%lx) < start (%lx)\n",
1585 if (!ok && bootverbose)
1587 "%s%srequested unsupported memory range %#lx-%#lx "
1588 "(decoding %#jx-%#jx, %#jx-%#jx)\n",
1589 name, suffix, start, end,
1590 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit,
1591 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1595 device_printf(dev,"%s%srequested memory range "
1596 "0x%lx-0x%lx: good\n",
1597 name, suffix, start, end);
1604 * Bridge is OK decoding this resource, so pass it up.
1606 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
1615 pcib_maxslots(device_t dev)
1617 return(PCI_SLOTMAX);
1621 * Since we are a child of a PCI bus, its parent must support the pcib interface.
1624 pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width)
1626 return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width));
1630 pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
1632 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width);
1636 * Route an interrupt across a PCI bridge.
1639 pcib_route_interrupt(device_t pcib, device_t dev, int pin)
1647 * The PCI standard defines a swizzle of the child-side device/intpin to
1648 * the parent-side intpin as follows.
1650 * device = device on child bus
1651 * child_intpin = intpin on child bus slot (0-3)
1652 * parent_intpin = intpin on parent bus slot (0-3)
1654 * parent_intpin = (device + child_intpin) % 4
1656 parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
1659 * Our parent is a PCI bus. Its parent must export the pcib interface
1660 * which includes the ability to route interrupts.
1662 bus = device_get_parent(pcib);
1663 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
1664 if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
1665 device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
1666 pci_get_slot(dev), 'A' + pin - 1, intnum);
1671 /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
1673 pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
1675 struct pcib_softc *sc = device_get_softc(pcib);
1678 if (sc->flags & PCIB_DISABLE_MSI)
1680 bus = device_get_parent(pcib);
1681 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
1685 /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
1687 pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs)
1691 bus = device_get_parent(pcib);
1692 return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs));
1695 /* Pass request to alloc an MSI-X message up to the parent bridge. */
1697 pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
1699 struct pcib_softc *sc = device_get_softc(pcib);
1702 if (sc->flags & PCIB_DISABLE_MSIX)
1704 bus = device_get_parent(pcib);
1705 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
1708 /* Pass request to release an MSI-X message up to the parent bridge. */
1710 pcib_release_msix(device_t pcib, device_t dev, int irq)
1714 bus = device_get_parent(pcib);
1715 return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq));
1718 /* Pass request to map MSI/MSI-X message up to parent bridge. */
1720 pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
1726 bus = device_get_parent(pcib);
1727 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
1731 pci_ht_map_msi(pcib, *addr);
1735 /* Pass request for device power state up to parent bridge. */
1737 pcib_power_for_sleep(device_t pcib, device_t dev, int *pstate)
1741 bus = device_get_parent(pcib);
1742 return (PCIB_POWER_FOR_SLEEP(bus, dev, pstate));