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1 /* $FreeBSD$ */
2 /*-
3  * Copyright (c) 2008 Hans Petter Selasky. All rights reserved.
4  * Copyright (c) 1998 The NetBSD Foundation, Inc. All rights reserved.
5  * Copyright (c) 1998 Lennart Augustsson. All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28
29 /*
30  * USB Open Host Controller driver.
31  *
32  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
33  * USB spec:  http://www.usb.org/developers/docs/usbspec.zip
34  */
35
36 #ifdef USB_GLOBAL_INCLUDE_FILE
37 #include USB_GLOBAL_INCLUDE_FILE
38 #else
39 #include <sys/stdint.h>
40 #include <sys/stddef.h>
41 #include <sys/param.h>
42 #include <sys/queue.h>
43 #include <sys/types.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/bus.h>
47 #include <sys/module.h>
48 #include <sys/lock.h>
49 #include <sys/mutex.h>
50 #include <sys/condvar.h>
51 #include <sys/sysctl.h>
52 #include <sys/sx.h>
53 #include <sys/unistd.h>
54 #include <sys/callout.h>
55 #include <sys/malloc.h>
56 #include <sys/priv.h>
57
58 #include <dev/usb/usb.h>
59 #include <dev/usb/usbdi.h>
60
61 #define USB_DEBUG_VAR ohcidebug
62
63 #include <dev/usb/usb_core.h>
64 #include <dev/usb/usb_debug.h>
65 #include <dev/usb/usb_busdma.h>
66 #include <dev/usb/usb_process.h>
67 #include <dev/usb/usb_transfer.h>
68 #include <dev/usb/usb_device.h>
69 #include <dev/usb/usb_hub.h>
70 #include <dev/usb/usb_util.h>
71
72 #include <dev/usb/usb_controller.h>
73 #include <dev/usb/usb_bus.h>
74 #endif                  /* USB_GLOBAL_INCLUDE_FILE */
75
76 #include <dev/usb/controller/ohci.h>
77 #include <dev/usb/controller/ohcireg.h>
78
79 #define OHCI_BUS2SC(bus) \
80    ((ohci_softc_t *)(((uint8_t *)(bus)) - \
81     ((uint8_t *)&(((ohci_softc_t *)0)->sc_bus))))
82
83 #ifdef USB_DEBUG
84 static int ohcidebug = 0;
85
86 static SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
87 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN,
88     &ohcidebug, 0, "ohci debug level");
89 TUNABLE_INT("hw.usb.ohci.debug", &ohcidebug);
90
91 static void ohci_dumpregs(ohci_softc_t *);
92 static void ohci_dump_tds(ohci_td_t *);
93 static uint8_t ohci_dump_td(ohci_td_t *);
94 static void ohci_dump_ed(ohci_ed_t *);
95 static uint8_t ohci_dump_itd(ohci_itd_t *);
96 static void ohci_dump_itds(ohci_itd_t *);
97
98 #endif
99
100 #define OBARR(sc) bus_space_barrier((sc)->sc_io_tag, (sc)->sc_io_hdl, 0, (sc)->sc_io_size, \
101                         BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
102 #define OWRITE1(sc, r, x) \
103  do { OBARR(sc); bus_space_write_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
104 #define OWRITE2(sc, r, x) \
105  do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
106 #define OWRITE4(sc, r, x) \
107  do { OBARR(sc); bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
108 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
109 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
110 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (r)))
111
112 #define OHCI_INTR_ENDPT 1
113
114 extern struct usb_bus_methods ohci_bus_methods;
115 extern struct usb_pipe_methods ohci_device_bulk_methods;
116 extern struct usb_pipe_methods ohci_device_ctrl_methods;
117 extern struct usb_pipe_methods ohci_device_intr_methods;
118 extern struct usb_pipe_methods ohci_device_isoc_methods;
119
120 static void ohci_do_poll(struct usb_bus *bus);
121 static void ohci_device_done(struct usb_xfer *xfer, usb_error_t error);
122 static void ohci_timeout(void *arg);
123 static uint8_t ohci_check_transfer(struct usb_xfer *xfer);
124 static void ohci_root_intr(ohci_softc_t *sc);
125
126 struct ohci_std_temp {
127         struct usb_page_cache *pc;
128         ohci_td_t *td;
129         ohci_td_t *td_next;
130         uint32_t average;
131         uint32_t td_flags;
132         uint32_t len;
133         uint16_t max_frame_size;
134         uint8_t shortpkt;
135         uint8_t setup_alt_next;
136         uint8_t last_frame;
137 };
138
139 static struct ohci_hcca *
140 ohci_get_hcca(ohci_softc_t *sc)
141 {
142         usb_pc_cpu_invalidate(&sc->sc_hw.hcca_pc);
143         return (sc->sc_hcca_p);
144 }
145
146 void
147 ohci_iterate_hw_softc(struct usb_bus *bus, usb_bus_mem_sub_cb_t *cb)
148 {
149         struct ohci_softc *sc = OHCI_BUS2SC(bus);
150         uint32_t i;
151
152         cb(bus, &sc->sc_hw.hcca_pc, &sc->sc_hw.hcca_pg,
153             sizeof(ohci_hcca_t), OHCI_HCCA_ALIGN);
154
155         cb(bus, &sc->sc_hw.ctrl_start_pc, &sc->sc_hw.ctrl_start_pg,
156             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
157
158         cb(bus, &sc->sc_hw.bulk_start_pc, &sc->sc_hw.bulk_start_pg,
159             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
160
161         cb(bus, &sc->sc_hw.isoc_start_pc, &sc->sc_hw.isoc_start_pg,
162             sizeof(ohci_ed_t), OHCI_ED_ALIGN);
163
164         for (i = 0; i != OHCI_NO_EDS; i++) {
165                 cb(bus, sc->sc_hw.intr_start_pc + i, sc->sc_hw.intr_start_pg + i,
166                     sizeof(ohci_ed_t), OHCI_ED_ALIGN);
167         }
168 }
169
170 static usb_error_t
171 ohci_controller_init(ohci_softc_t *sc, int do_suspend)
172 {
173         struct usb_page_search buf_res;
174         uint32_t i;
175         uint32_t ctl;
176         uint32_t ival;
177         uint32_t hcr;
178         uint32_t fm;
179         uint32_t per;
180         uint32_t desca;
181
182         /* Determine in what context we are running. */
183         ctl = OREAD4(sc, OHCI_CONTROL);
184         if (ctl & OHCI_IR) {
185                 /* SMM active, request change */
186                 DPRINTF("SMM active, request owner change\n");
187                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_OCR);
188                 for (i = 0; (i < 100) && (ctl & OHCI_IR); i++) {
189                         usb_pause_mtx(NULL, hz / 1000);
190                         ctl = OREAD4(sc, OHCI_CONTROL);
191                 }
192                 if (ctl & OHCI_IR) {
193                         device_printf(sc->sc_bus.bdev,
194                             "SMM does not respond, resetting\n");
195                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
196                         goto reset;
197                 }
198         } else {
199                 DPRINTF("cold started\n");
200 reset:
201                 /* controller was cold started */
202                 usb_pause_mtx(NULL,
203                     USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
204         }
205
206         /*
207          * This reset should not be necessary according to the OHCI spec, but
208          * without it some controllers do not start.
209          */
210         DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
211         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
212
213         usb_pause_mtx(NULL,
214             USB_MS_TO_TICKS(USB_BUS_RESET_DELAY));
215
216         /* we now own the host controller and the bus has been reset */
217         ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
218
219         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR);     /* Reset HC */
220         /* nominal time for a reset is 10 us */
221         for (i = 0; i < 10; i++) {
222                 DELAY(10);
223                 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
224                 if (!hcr) {
225                         break;
226                 }
227         }
228         if (hcr) {
229                 device_printf(sc->sc_bus.bdev, "reset timeout\n");
230                 return (USB_ERR_IOERROR);
231         }
232 #ifdef USB_DEBUG
233         if (ohcidebug > 15) {
234                 ohci_dumpregs(sc);
235         }
236 #endif
237
238         if (do_suspend) {
239                 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_SUSPEND);
240                 return (USB_ERR_NORMAL_COMPLETION);
241         }
242
243         /* The controller is now in SUSPEND state, we have 2ms to finish. */
244
245         /* set up HC registers */
246         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
247         OWRITE4(sc, OHCI_HCCA, buf_res.physaddr);
248
249         usbd_get_page(&sc->sc_hw.ctrl_start_pc, 0, &buf_res);
250         OWRITE4(sc, OHCI_CONTROL_HEAD_ED, buf_res.physaddr);
251
252         usbd_get_page(&sc->sc_hw.bulk_start_pc, 0, &buf_res);
253         OWRITE4(sc, OHCI_BULK_HEAD_ED, buf_res.physaddr);
254
255         /* disable all interrupts and then switch on all desired interrupts */
256         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
257         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
258         /* switch on desired functional features */
259         ctl = OREAD4(sc, OHCI_CONTROL);
260         ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
261         ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
262             OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
263         /* And finally start it! */
264         OWRITE4(sc, OHCI_CONTROL, ctl);
265
266         /*
267          * The controller is now OPERATIONAL.  Set a some final
268          * registers that should be set earlier, but that the
269          * controller ignores when in the SUSPEND state.
270          */
271         fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
272         fm |= OHCI_FSMPS(ival) | ival;
273         OWRITE4(sc, OHCI_FM_INTERVAL, fm);
274         per = OHCI_PERIODIC(ival);      /* 90% periodic */
275         OWRITE4(sc, OHCI_PERIODIC_START, per);
276
277         /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
278         desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
279         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
280         OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
281         usb_pause_mtx(NULL,
282             USB_MS_TO_TICKS(OHCI_ENABLE_POWER_DELAY));
283         OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
284
285         /*
286          * The AMD756 requires a delay before re-reading the register,
287          * otherwise it will occasionally report 0 ports.
288          */
289         sc->sc_noport = 0;
290         for (i = 0; (i < 10) && (sc->sc_noport == 0); i++) {
291                 usb_pause_mtx(NULL,
292                     USB_MS_TO_TICKS(OHCI_READ_DESC_DELAY));
293                 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
294         }
295
296 #ifdef USB_DEBUG
297         if (ohcidebug > 5) {
298                 ohci_dumpregs(sc);
299         }
300 #endif
301         return (USB_ERR_NORMAL_COMPLETION);
302 }
303
304 static struct ohci_ed *
305 ohci_init_ed(struct usb_page_cache *pc)
306 {
307         struct usb_page_search buf_res;
308         struct ohci_ed *ed;
309
310         usbd_get_page(pc, 0, &buf_res);
311
312         ed = buf_res.buffer;
313
314         ed->ed_self = htole32(buf_res.physaddr);
315         ed->ed_flags = htole32(OHCI_ED_SKIP);
316         ed->page_cache = pc;
317
318         return (ed);
319 }
320
321 usb_error_t
322 ohci_init(ohci_softc_t *sc)
323 {
324         struct usb_page_search buf_res;
325         uint16_t i;
326         uint16_t bit;
327         uint16_t x;
328         uint16_t y;
329
330         DPRINTF("start\n");
331
332         sc->sc_eintrs = OHCI_NORMAL_INTRS;
333
334         /*
335          * Setup all ED's
336          */
337
338         sc->sc_ctrl_p_last =
339             ohci_init_ed(&sc->sc_hw.ctrl_start_pc);
340
341         sc->sc_bulk_p_last =
342             ohci_init_ed(&sc->sc_hw.bulk_start_pc);
343
344         sc->sc_isoc_p_last =
345             ohci_init_ed(&sc->sc_hw.isoc_start_pc);
346
347         for (i = 0; i != OHCI_NO_EDS; i++) {
348                 sc->sc_intr_p_last[i] =
349                     ohci_init_ed(sc->sc_hw.intr_start_pc + i);
350         }
351
352         /*
353          * the QHs are arranged to give poll intervals that are
354          * powers of 2 times 1ms
355          */
356         bit = OHCI_NO_EDS / 2;
357         while (bit) {
358                 x = bit;
359                 while (x & bit) {
360                         ohci_ed_t *ed_x;
361                         ohci_ed_t *ed_y;
362
363                         y = (x ^ bit) | (bit / 2);
364
365                         /*
366                          * the next QH has half the poll interval
367                          */
368                         ed_x = sc->sc_intr_p_last[x];
369                         ed_y = sc->sc_intr_p_last[y];
370
371                         ed_x->next = NULL;
372                         ed_x->ed_next = ed_y->ed_self;
373
374                         x++;
375                 }
376                 bit >>= 1;
377         }
378
379         if (1) {
380
381                 ohci_ed_t *ed_int;
382                 ohci_ed_t *ed_isc;
383
384                 ed_int = sc->sc_intr_p_last[0];
385                 ed_isc = sc->sc_isoc_p_last;
386
387                 /* the last (1ms) QH */
388                 ed_int->next = ed_isc;
389                 ed_int->ed_next = ed_isc->ed_self;
390         }
391         usbd_get_page(&sc->sc_hw.hcca_pc, 0, &buf_res);
392
393         sc->sc_hcca_p = buf_res.buffer;
394
395         /*
396          * Fill HCCA interrupt table.  The bit reversal is to get
397          * the tree set up properly to spread the interrupts.
398          */
399         for (i = 0; i != OHCI_NO_INTRS; i++) {
400                 sc->sc_hcca_p->hcca_interrupt_table[i] =
401                     sc->sc_intr_p_last[i | (OHCI_NO_EDS / 2)]->ed_self;
402         }
403         /* flush all cache into memory */
404
405         usb_bus_mem_flush_all(&sc->sc_bus, &ohci_iterate_hw_softc);
406
407         /* set up the bus struct */
408         sc->sc_bus.methods = &ohci_bus_methods;
409
410         usb_callout_init_mtx(&sc->sc_tmo_rhsc, &sc->sc_bus.bus_mtx, 0);
411
412 #ifdef USB_DEBUG
413         if (ohcidebug > 15) {
414                 for (i = 0; i != OHCI_NO_EDS; i++) {
415                         printf("ed#%d ", i);
416                         ohci_dump_ed(sc->sc_intr_p_last[i]);
417                 }
418                 printf("iso ");
419                 ohci_dump_ed(sc->sc_isoc_p_last);
420         }
421 #endif
422
423         sc->sc_bus.usbrev = USB_REV_1_0;
424
425         if (ohci_controller_init(sc, 0) != 0)
426                 return (USB_ERR_INVAL);
427
428         /* catch any lost interrupts */
429         ohci_do_poll(&sc->sc_bus);
430         return (USB_ERR_NORMAL_COMPLETION);
431 }
432
433 /*
434  * shut down the controller when the system is going down
435  */
436 void
437 ohci_detach(struct ohci_softc *sc)
438 {
439         USB_BUS_LOCK(&sc->sc_bus);
440
441         usb_callout_stop(&sc->sc_tmo_rhsc);
442
443         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
444         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
445
446         USB_BUS_UNLOCK(&sc->sc_bus);
447
448         /* XXX let stray task complete */
449         usb_pause_mtx(NULL, hz / 20);
450
451         usb_callout_drain(&sc->sc_tmo_rhsc);
452 }
453
454 static void
455 ohci_suspend(ohci_softc_t *sc)
456 {
457         DPRINTF("\n");
458
459 #ifdef USB_DEBUG
460         if (ohcidebug > 2)
461                 ohci_dumpregs(sc);
462 #endif
463
464         /* reset HC and leave it suspended */
465         ohci_controller_init(sc, 1);
466 }
467
468 static void
469 ohci_resume(ohci_softc_t *sc)
470 {
471         DPRINTF("\n");
472
473 #ifdef USB_DEBUG
474         if (ohcidebug > 2)
475                 ohci_dumpregs(sc);
476 #endif
477
478         /* some broken BIOSes never initialize the Controller chip */
479         ohci_controller_init(sc, 0);
480
481         /* catch any lost interrupts */
482         ohci_do_poll(&sc->sc_bus);
483 }
484
485 #ifdef USB_DEBUG
486 static void
487 ohci_dumpregs(ohci_softc_t *sc)
488 {
489         struct ohci_hcca *hcca;
490
491         DPRINTF("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
492             OREAD4(sc, OHCI_REVISION),
493             OREAD4(sc, OHCI_CONTROL),
494             OREAD4(sc, OHCI_COMMAND_STATUS));
495         DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
496             OREAD4(sc, OHCI_INTERRUPT_STATUS),
497             OREAD4(sc, OHCI_INTERRUPT_ENABLE),
498             OREAD4(sc, OHCI_INTERRUPT_DISABLE));
499         DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
500             OREAD4(sc, OHCI_HCCA),
501             OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
502             OREAD4(sc, OHCI_CONTROL_HEAD_ED));
503         DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
504             OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
505             OREAD4(sc, OHCI_BULK_HEAD_ED),
506             OREAD4(sc, OHCI_BULK_CURRENT_ED));
507         DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
508             OREAD4(sc, OHCI_DONE_HEAD),
509             OREAD4(sc, OHCI_FM_INTERVAL),
510             OREAD4(sc, OHCI_FM_REMAINING));
511         DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
512             OREAD4(sc, OHCI_FM_NUMBER),
513             OREAD4(sc, OHCI_PERIODIC_START),
514             OREAD4(sc, OHCI_LS_THRESHOLD));
515         DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
516             OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
517             OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
518             OREAD4(sc, OHCI_RH_STATUS));
519         DPRINTF("               port1=0x%08x port2=0x%08x\n",
520             OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
521             OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
522
523         hcca = ohci_get_hcca(sc);
524
525         DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
526             le32toh(hcca->hcca_frame_number),
527             le32toh(hcca->hcca_done_head));
528 }
529 static void
530 ohci_dump_tds(ohci_td_t *std)
531 {
532         for (; std; std = std->obj_next) {
533                 if (ohci_dump_td(std)) {
534                         break;
535                 }
536         }
537 }
538
539 static uint8_t
540 ohci_dump_td(ohci_td_t *std)
541 {
542         uint32_t td_flags;
543         uint8_t temp;
544
545         usb_pc_cpu_invalidate(std->page_cache);
546
547         td_flags = le32toh(std->td_flags);
548         temp = (std->td_next == 0);
549
550         printf("TD(%p) at 0x%08x: %s%s%s%s%s delay=%d ec=%d "
551             "cc=%d\ncbp=0x%08x next=0x%08x be=0x%08x\n",
552             std, le32toh(std->td_self),
553             (td_flags & OHCI_TD_R) ? "-R" : "",
554             (td_flags & OHCI_TD_OUT) ? "-OUT" : "",
555             (td_flags & OHCI_TD_IN) ? "-IN" : "",
556             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_1) ? "-TOG1" : "",
557             ((td_flags & OHCI_TD_TOGGLE_MASK) == OHCI_TD_TOGGLE_0) ? "-TOG0" : "",
558             OHCI_TD_GET_DI(td_flags),
559             OHCI_TD_GET_EC(td_flags),
560             OHCI_TD_GET_CC(td_flags),
561             le32toh(std->td_cbp),
562             le32toh(std->td_next),
563             le32toh(std->td_be));
564
565         return (temp);
566 }
567
568 static uint8_t
569 ohci_dump_itd(ohci_itd_t *sitd)
570 {
571         uint32_t itd_flags;
572         uint16_t i;
573         uint8_t temp;
574
575         usb_pc_cpu_invalidate(sitd->page_cache);
576
577         itd_flags = le32toh(sitd->itd_flags);
578         temp = (sitd->itd_next == 0);
579
580         printf("ITD(%p) at 0x%08x: sf=%d di=%d fc=%d cc=%d\n"
581             "bp0=0x%08x next=0x%08x be=0x%08x\n",
582             sitd, le32toh(sitd->itd_self),
583             OHCI_ITD_GET_SF(itd_flags),
584             OHCI_ITD_GET_DI(itd_flags),
585             OHCI_ITD_GET_FC(itd_flags),
586             OHCI_ITD_GET_CC(itd_flags),
587             le32toh(sitd->itd_bp0),
588             le32toh(sitd->itd_next),
589             le32toh(sitd->itd_be));
590         for (i = 0; i < OHCI_ITD_NOFFSET; i++) {
591                 printf("offs[%d]=0x%04x ", i,
592                     (uint32_t)le16toh(sitd->itd_offset[i]));
593         }
594         printf("\n");
595
596         return (temp);
597 }
598
599 static void
600 ohci_dump_itds(ohci_itd_t *sitd)
601 {
602         for (; sitd; sitd = sitd->obj_next) {
603                 if (ohci_dump_itd(sitd)) {
604                         break;
605                 }
606         }
607 }
608
609 static void
610 ohci_dump_ed(ohci_ed_t *sed)
611 {
612         uint32_t ed_flags;
613         uint32_t ed_headp;
614
615         usb_pc_cpu_invalidate(sed->page_cache);
616
617         ed_flags = le32toh(sed->ed_flags);
618         ed_headp = le32toh(sed->ed_headp);
619
620         printf("ED(%p) at 0x%08x: addr=%d endpt=%d maxp=%d flags=%s%s%s%s%s\n"
621             "tailp=0x%08x headflags=%s%s headp=0x%08x nexted=0x%08x\n",
622             sed, le32toh(sed->ed_self),
623             OHCI_ED_GET_FA(ed_flags),
624             OHCI_ED_GET_EN(ed_flags),
625             OHCI_ED_GET_MAXP(ed_flags),
626             (ed_flags & OHCI_ED_DIR_OUT) ? "-OUT" : "",
627             (ed_flags & OHCI_ED_DIR_IN) ? "-IN" : "",
628             (ed_flags & OHCI_ED_SPEED) ? "-LOWSPEED" : "",
629             (ed_flags & OHCI_ED_SKIP) ? "-SKIP" : "",
630             (ed_flags & OHCI_ED_FORMAT_ISO) ? "-ISO" : "",
631             le32toh(sed->ed_tailp),
632             (ed_headp & OHCI_HALTED) ? "-HALTED" : "",
633             (ed_headp & OHCI_TOGGLECARRY) ? "-CARRY" : "",
634             le32toh(sed->ed_headp),
635             le32toh(sed->ed_next));
636 }
637
638 #endif
639
640 static void
641 ohci_transfer_intr_enqueue(struct usb_xfer *xfer)
642 {
643         /* check for early completion */
644         if (ohci_check_transfer(xfer)) {
645                 return;
646         }
647         /* put transfer on interrupt queue */
648         usbd_transfer_enqueue(&xfer->xroot->bus->intr_q, xfer);
649
650         /* start timeout, if any */
651         if (xfer->timeout != 0) {
652                 usbd_transfer_timeout_ms(xfer, &ohci_timeout, xfer->timeout);
653         }
654 }
655
656 #define OHCI_APPEND_QH(sed,last) (last) = _ohci_append_qh(sed,last)
657 static ohci_ed_t *
658 _ohci_append_qh(ohci_ed_t *sed, ohci_ed_t *last)
659 {
660         DPRINTFN(11, "%p to %p\n", sed, last);
661
662         if (sed->prev != NULL) {
663                 /* should not happen */
664                 DPRINTFN(0, "ED already linked!\n");
665                 return (last);
666         }
667         /* (sc->sc_bus.bus_mtx) must be locked */
668
669         sed->next = last->next;
670         sed->ed_next = last->ed_next;
671         sed->ed_tailp = 0;
672
673         sed->prev = last;
674
675         usb_pc_cpu_flush(sed->page_cache);
676
677         /*
678          * the last->next->prev is never followed: sed->next->prev = sed;
679          */
680
681         last->next = sed;
682         last->ed_next = sed->ed_self;
683
684         usb_pc_cpu_flush(last->page_cache);
685
686         return (sed);
687 }
688
689 #define OHCI_REMOVE_QH(sed,last) (last) = _ohci_remove_qh(sed,last)
690 static ohci_ed_t *
691 _ohci_remove_qh(ohci_ed_t *sed, ohci_ed_t *last)
692 {
693         DPRINTFN(11, "%p from %p\n", sed, last);
694
695         /* (sc->sc_bus.bus_mtx) must be locked */
696
697         /* only remove if not removed from a queue */
698         if (sed->prev) {
699
700                 sed->prev->next = sed->next;
701                 sed->prev->ed_next = sed->ed_next;
702
703                 usb_pc_cpu_flush(sed->prev->page_cache);
704
705                 if (sed->next) {
706                         sed->next->prev = sed->prev;
707                         usb_pc_cpu_flush(sed->next->page_cache);
708                 }
709                 last = ((last == sed) ? sed->prev : last);
710
711                 sed->prev = 0;
712
713                 usb_pc_cpu_flush(sed->page_cache);
714         }
715         return (last);
716 }
717
718 static void
719 ohci_isoc_done(struct usb_xfer *xfer)
720 {
721         uint8_t nframes;
722         uint32_t *plen = xfer->frlengths;
723         volatile uint16_t *olen;
724         uint16_t len = 0;
725         ohci_itd_t *td = xfer->td_transfer_first;
726
727         while (1) {
728                 if (td == NULL) {
729                         panic("%s:%d: out of TD's\n",
730                             __FUNCTION__, __LINE__);
731                 }
732 #ifdef USB_DEBUG
733                 if (ohcidebug > 5) {
734                         DPRINTF("isoc TD\n");
735                         ohci_dump_itd(td);
736                 }
737 #endif
738                 usb_pc_cpu_invalidate(td->page_cache);
739
740                 nframes = td->frames;
741                 olen = &td->itd_offset[0];
742
743                 if (nframes > 8) {
744                         nframes = 8;
745                 }
746                 while (nframes--) {
747                         len = le16toh(*olen);
748
749                         if ((len >> 12) == OHCI_CC_NOT_ACCESSED) {
750                                 len = 0;
751                         } else {
752                                 len &= ((1 << 12) - 1);
753                         }
754
755                         if (len > *plen) {
756                                 len = 0;/* invalid length */
757                         }
758                         *plen = len;
759                         plen++;
760                         olen++;
761                 }
762
763                 if (((void *)td) == xfer->td_transfer_last) {
764                         break;
765                 }
766                 td = td->obj_next;
767         }
768
769         xfer->aframes = xfer->nframes;
770         ohci_device_done(xfer, USB_ERR_NORMAL_COMPLETION);
771 }
772
773 #ifdef USB_DEBUG
774 static const char *const
775         ohci_cc_strs[] =
776 {
777         "NO_ERROR",
778         "CRC",
779         "BIT_STUFFING",
780         "DATA_TOGGLE_MISMATCH",
781
782         "STALL",
783         "DEVICE_NOT_RESPONDING",
784         "PID_CHECK_FAILURE",
785         "UNEXPECTED_PID",
786
787         "DATA_OVERRUN",
788         "DATA_UNDERRUN",
789         "BUFFER_OVERRUN",
790         "BUFFER_UNDERRUN",
791
792         "reserved",
793         "reserved",
794         "NOT_ACCESSED",
795         "NOT_ACCESSED"
796 };
797
798 #endif
799
800 static usb_error_t
801 ohci_non_isoc_done_sub(struct usb_xfer *xfer)
802 {
803         ohci_td_t *td;
804         ohci_td_t *td_alt_next;
805         uint32_t temp;
806         uint32_t phy_start;
807         uint32_t phy_end;
808         uint32_t td_flags;
809         uint16_t cc;
810
811         td = xfer->td_transfer_cache;
812         td_alt_next = td->alt_next;
813         td_flags = 0;
814
815         if (xfer->aframes != xfer->nframes) {
816                 usbd_xfer_set_frame_len(xfer, xfer->aframes, 0);
817         }
818         while (1) {
819
820                 usb_pc_cpu_invalidate(td->page_cache);
821                 phy_start = le32toh(td->td_cbp);
822                 td_flags = le32toh(td->td_flags);
823                 cc = OHCI_TD_GET_CC(td_flags);
824
825                 if (phy_start) {
826                         /*
827                          * short transfer - compute the number of remaining
828                          * bytes in the hardware buffer:
829                          */
830                         phy_end = le32toh(td->td_be);
831                         temp = (OHCI_PAGE(phy_start ^ phy_end) ?
832                             (OHCI_PAGE_SIZE + 1) : 0x0001);
833                         temp += OHCI_PAGE_OFFSET(phy_end);
834                         temp -= OHCI_PAGE_OFFSET(phy_start);
835
836                         if (temp > td->len) {
837                                 /* guard against corruption */
838                                 cc = OHCI_CC_STALL;
839                         } else if (xfer->aframes != xfer->nframes) {
840                                 /*
841                                  * Sum up total transfer length
842                                  * in "frlengths[]":
843                                  */
844                                 xfer->frlengths[xfer->aframes] += td->len - temp;
845                         }
846                 } else {
847                         if (xfer->aframes != xfer->nframes) {
848                                 /* transfer was complete */
849                                 xfer->frlengths[xfer->aframes] += td->len;
850                         }
851                 }
852                 /* Check for last transfer */
853                 if (((void *)td) == xfer->td_transfer_last) {
854                         td = NULL;
855                         break;
856                 }
857                 /* Check transfer status */
858                 if (cc) {
859                         /* the transfer is finished */
860                         td = NULL;
861                         break;
862                 }
863                 /* Check for short transfer */
864                 if (phy_start) {
865                         if (xfer->flags_int.short_frames_ok) {
866                                 /* follow alt next */
867                                 td = td->alt_next;
868                         } else {
869                                 /* the transfer is finished */
870                                 td = NULL;
871                         }
872                         break;
873                 }
874                 td = td->obj_next;
875
876                 if (td->alt_next != td_alt_next) {
877                         /* this USB frame is complete */
878                         break;
879                 }
880         }
881
882         /* update transfer cache */
883
884         xfer->td_transfer_cache = td;
885
886         DPRINTFN(16, "error cc=%d (%s)\n",
887             cc, ohci_cc_strs[cc]);
888
889         return ((cc == 0) ? USB_ERR_NORMAL_COMPLETION :
890             (cc == OHCI_CC_STALL) ? USB_ERR_STALLED : USB_ERR_IOERROR);
891 }
892
893 static void
894 ohci_non_isoc_done(struct usb_xfer *xfer)
895 {
896         usb_error_t err = 0;
897
898         DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
899             xfer, xfer->endpoint);
900
901 #ifdef USB_DEBUG
902         if (ohcidebug > 10) {
903                 ohci_dump_tds(xfer->td_transfer_first);
904         }
905 #endif
906
907         /* reset scanner */
908
909         xfer->td_transfer_cache = xfer->td_transfer_first;
910
911         if (xfer->flags_int.control_xfr) {
912
913                 if (xfer->flags_int.control_hdr) {
914
915                         err = ohci_non_isoc_done_sub(xfer);
916                 }
917                 xfer->aframes = 1;
918
919                 if (xfer->td_transfer_cache == NULL) {
920                         goto done;
921                 }
922         }
923         while (xfer->aframes != xfer->nframes) {
924
925                 err = ohci_non_isoc_done_sub(xfer);
926                 xfer->aframes++;
927
928                 if (xfer->td_transfer_cache == NULL) {
929                         goto done;
930                 }
931         }
932
933         if (xfer->flags_int.control_xfr &&
934             !xfer->flags_int.control_act) {
935
936                 err = ohci_non_isoc_done_sub(xfer);
937         }
938 done:
939         ohci_device_done(xfer, err);
940 }
941
942 /*------------------------------------------------------------------------*
943  *      ohci_check_transfer_sub
944  *------------------------------------------------------------------------*/
945 static void
946 ohci_check_transfer_sub(struct usb_xfer *xfer)
947 {
948         ohci_td_t *td;
949         ohci_ed_t *ed;
950         uint32_t phy_start;
951         uint32_t td_flags;
952         uint32_t td_next;
953         uint16_t cc;
954
955         td = xfer->td_transfer_cache;
956
957         while (1) {
958
959                 usb_pc_cpu_invalidate(td->page_cache);
960                 phy_start = le32toh(td->td_cbp);
961                 td_flags = le32toh(td->td_flags);
962                 td_next = le32toh(td->td_next);
963
964                 /* Check for last transfer */
965                 if (((void *)td) == xfer->td_transfer_last) {
966                         /* the transfer is finished */
967                         td = NULL;
968                         break;
969                 }
970                 /* Check transfer status */
971                 cc = OHCI_TD_GET_CC(td_flags);
972                 if (cc) {
973                         /* the transfer is finished */
974                         td = NULL;
975                         break;
976                 }
977                 /*
978                  * Check if we reached the last packet
979                  * or if there is a short packet:
980                  */
981
982                 if (((td_next & (~0xF)) == OHCI_TD_NEXT_END) || phy_start) {
983                         /* follow alt next */
984                         td = td->alt_next;
985                         break;
986                 }
987                 td = td->obj_next;
988         }
989
990         /* update transfer cache */
991
992         xfer->td_transfer_cache = td;
993
994         if (td) {
995
996                 ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
997
998                 ed->ed_headp = td->td_self;
999                 usb_pc_cpu_flush(ed->page_cache);
1000
1001                 DPRINTFN(13, "xfer=%p following alt next\n", xfer);
1002
1003                 /*
1004                  * Make sure that the OHCI re-scans the schedule by
1005                  * writing the BLF and CLF bits:
1006                  */
1007
1008                 if (xfer->xroot->udev->flags.self_suspended) {
1009                         /* nothing to do */
1010                 } else if (xfer->endpoint->methods == &ohci_device_bulk_methods) {
1011                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1012
1013                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1014                 } else if (xfer->endpoint->methods == &ohci_device_ctrl_methods) {
1015                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1016
1017                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1018                 }
1019         }
1020 }
1021
1022 /*------------------------------------------------------------------------*
1023  *      ohci_check_transfer
1024  *
1025  * Return values:
1026  *    0: USB transfer is not finished
1027  * Else: USB transfer is finished
1028  *------------------------------------------------------------------------*/
1029 static uint8_t
1030 ohci_check_transfer(struct usb_xfer *xfer)
1031 {
1032         ohci_ed_t *ed;
1033         uint32_t ed_headp;
1034         uint32_t ed_tailp;
1035
1036         DPRINTFN(13, "xfer=%p checking transfer\n", xfer);
1037
1038         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1039
1040         usb_pc_cpu_invalidate(ed->page_cache);
1041         ed_headp = le32toh(ed->ed_headp);
1042         ed_tailp = le32toh(ed->ed_tailp);
1043
1044         if ((ed_headp & OHCI_HALTED) ||
1045             (((ed_headp ^ ed_tailp) & (~0xF)) == 0)) {
1046                 if (xfer->endpoint->methods == &ohci_device_isoc_methods) {
1047                         /* isochronous transfer */
1048                         ohci_isoc_done(xfer);
1049                 } else {
1050                         if (xfer->flags_int.short_frames_ok) {
1051                                 ohci_check_transfer_sub(xfer);
1052                                 if (xfer->td_transfer_cache) {
1053                                         /* not finished yet */
1054                                         return (0);
1055                                 }
1056                         }
1057                         /* store data-toggle */
1058                         if (ed_headp & OHCI_TOGGLECARRY) {
1059                                 xfer->endpoint->toggle_next = 1;
1060                         } else {
1061                                 xfer->endpoint->toggle_next = 0;
1062                         }
1063
1064                         /* non-isochronous transfer */
1065                         ohci_non_isoc_done(xfer);
1066                 }
1067                 return (1);
1068         }
1069         DPRINTFN(13, "xfer=%p is still active\n", xfer);
1070         return (0);
1071 }
1072
1073 static void
1074 ohci_rhsc_enable(ohci_softc_t *sc)
1075 {
1076         DPRINTFN(5, "\n");
1077
1078         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1079
1080         sc->sc_eintrs |= OHCI_RHSC;
1081         OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1082
1083         /* acknowledge any RHSC interrupt */
1084         OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_RHSC);
1085
1086         ohci_root_intr(sc);
1087 }
1088
1089 static void
1090 ohci_interrupt_poll(ohci_softc_t *sc)
1091 {
1092         struct usb_xfer *xfer;
1093
1094 repeat:
1095         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
1096                 /*
1097                  * check if transfer is transferred
1098                  */
1099                 if (ohci_check_transfer(xfer)) {
1100                         /* queue has been modified */
1101                         goto repeat;
1102                 }
1103         }
1104 }
1105
1106 /*------------------------------------------------------------------------*
1107  *      ohci_interrupt - OHCI interrupt handler
1108  *
1109  * NOTE: Do not access "sc->sc_bus.bdev" inside the interrupt handler,
1110  * hence the interrupt handler will be setup before "sc->sc_bus.bdev"
1111  * is present !
1112  *------------------------------------------------------------------------*/
1113 void
1114 ohci_interrupt(ohci_softc_t *sc)
1115 {
1116         struct ohci_hcca *hcca;
1117         uint32_t status;
1118         uint32_t done;
1119
1120         USB_BUS_LOCK(&sc->sc_bus);
1121
1122         hcca = ohci_get_hcca(sc);
1123
1124         DPRINTFN(16, "real interrupt\n");
1125
1126 #ifdef USB_DEBUG
1127         if (ohcidebug > 15) {
1128                 ohci_dumpregs(sc);
1129         }
1130 #endif
1131
1132         done = le32toh(hcca->hcca_done_head);
1133
1134         /*
1135          * The LSb of done is used to inform the HC Driver that an interrupt
1136          * condition exists for both the Done list and for another event
1137          * recorded in HcInterruptStatus. On an interrupt from the HC, the
1138          * HC Driver checks the HccaDoneHead Value. If this value is 0, then
1139          * the interrupt was caused by other than the HccaDoneHead update
1140          * and the HcInterruptStatus register needs to be accessed to
1141          * determine that exact interrupt cause. If HccaDoneHead is nonzero,
1142          * then a Done list update interrupt is indicated and if the LSb of
1143          * done is nonzero, then an additional interrupt event is indicated
1144          * and HcInterruptStatus should be checked to determine its cause.
1145          */
1146         if (done != 0) {
1147                 status = 0;
1148
1149                 if (done & ~OHCI_DONE_INTRS) {
1150                         status |= OHCI_WDH;
1151                 }
1152                 if (done & OHCI_DONE_INTRS) {
1153                         status |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1154                 }
1155                 hcca->hcca_done_head = 0;
1156
1157                 usb_pc_cpu_flush(&sc->sc_hw.hcca_pc);
1158         } else {
1159                 status = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1160         }
1161
1162         status &= ~OHCI_MIE;
1163         if (status == 0) {
1164                 /*
1165                  * nothing to be done (PCI shared
1166                  * interrupt)
1167                  */
1168                 goto done;
1169         }
1170         OWRITE4(sc, OHCI_INTERRUPT_STATUS, status);     /* Acknowledge */
1171
1172         status &= sc->sc_eintrs;
1173         if (status == 0) {
1174                 goto done;
1175         }
1176         if (status & (OHCI_SO | OHCI_RD | OHCI_UE | OHCI_RHSC)) {
1177 #if 0
1178                 if (status & OHCI_SO) {
1179                         /* XXX do what */
1180                 }
1181 #endif
1182                 if (status & OHCI_RD) {
1183                         printf("%s: resume detect\n", __FUNCTION__);
1184                         /* XXX process resume detect */
1185                 }
1186                 if (status & OHCI_UE) {
1187                         printf("%s: unrecoverable error, "
1188                             "controller halted\n", __FUNCTION__);
1189                         OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1190                         /* XXX what else */
1191                 }
1192                 if (status & OHCI_RHSC) {
1193                         /*
1194                          * Disable RHSC interrupt for now, because it will be
1195                          * on until the port has been reset.
1196                          */
1197                         sc->sc_eintrs &= ~OHCI_RHSC;
1198                         OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1199
1200                         ohci_root_intr(sc);
1201
1202                         /* do not allow RHSC interrupts > 1 per second */
1203                         usb_callout_reset(&sc->sc_tmo_rhsc, hz,
1204                             (void *)&ohci_rhsc_enable, sc);
1205                 }
1206         }
1207         status &= ~(OHCI_RHSC | OHCI_WDH | OHCI_SO);
1208         if (status != 0) {
1209                 /* Block unprocessed interrupts. XXX */
1210                 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, status);
1211                 sc->sc_eintrs &= ~status;
1212                 printf("%s: blocking intrs 0x%x\n",
1213                     __FUNCTION__, status);
1214         }
1215         /* poll all the USB transfers */
1216         ohci_interrupt_poll(sc);
1217
1218 done:
1219         USB_BUS_UNLOCK(&sc->sc_bus);
1220 }
1221
1222 /*
1223  * called when a request does not complete
1224  */
1225 static void
1226 ohci_timeout(void *arg)
1227 {
1228         struct usb_xfer *xfer = arg;
1229
1230         DPRINTF("xfer=%p\n", xfer);
1231
1232         USB_BUS_LOCK_ASSERT(xfer->xroot->bus, MA_OWNED);
1233
1234         /* transfer is transferred */
1235         ohci_device_done(xfer, USB_ERR_TIMEOUT);
1236 }
1237
1238 static void
1239 ohci_do_poll(struct usb_bus *bus)
1240 {
1241         struct ohci_softc *sc = OHCI_BUS2SC(bus);
1242
1243         USB_BUS_LOCK(&sc->sc_bus);
1244         ohci_interrupt_poll(sc);
1245         USB_BUS_UNLOCK(&sc->sc_bus);
1246 }
1247
1248 static void
1249 ohci_setup_standard_chain_sub(struct ohci_std_temp *temp)
1250 {
1251         struct usb_page_search buf_res;
1252         ohci_td_t *td;
1253         ohci_td_t *td_next;
1254         ohci_td_t *td_alt_next;
1255         uint32_t buf_offset;
1256         uint32_t average;
1257         uint32_t len_old;
1258         uint8_t shortpkt_old;
1259         uint8_t precompute;
1260
1261         td_alt_next = NULL;
1262         buf_offset = 0;
1263         shortpkt_old = temp->shortpkt;
1264         len_old = temp->len;
1265         precompute = 1;
1266
1267         /* software is used to detect short incoming transfers */
1268
1269         if ((temp->td_flags & htole32(OHCI_TD_DP_MASK)) == htole32(OHCI_TD_IN)) {
1270                 temp->td_flags |= htole32(OHCI_TD_R);
1271         } else {
1272                 temp->td_flags &= ~htole32(OHCI_TD_R);
1273         }
1274
1275 restart:
1276
1277         td = temp->td;
1278         td_next = temp->td_next;
1279
1280         while (1) {
1281
1282                 if (temp->len == 0) {
1283
1284                         if (temp->shortpkt) {
1285                                 break;
1286                         }
1287                         /* send a Zero Length Packet, ZLP, last */
1288
1289                         temp->shortpkt = 1;
1290                         average = 0;
1291
1292                 } else {
1293
1294                         average = temp->average;
1295
1296                         if (temp->len < average) {
1297                                 if (temp->len % temp->max_frame_size) {
1298                                         temp->shortpkt = 1;
1299                                 }
1300                                 average = temp->len;
1301                         }
1302                 }
1303
1304                 if (td_next == NULL) {
1305                         panic("%s: out of OHCI transfer descriptors!", __FUNCTION__);
1306                 }
1307                 /* get next TD */
1308
1309                 td = td_next;
1310                 td_next = td->obj_next;
1311
1312                 /* check if we are pre-computing */
1313
1314                 if (precompute) {
1315
1316                         /* update remaining length */
1317
1318                         temp->len -= average;
1319
1320                         continue;
1321                 }
1322                 /* fill out current TD */
1323                 td->td_flags = temp->td_flags;
1324
1325                 /* the next TD uses TOGGLE_CARRY */
1326                 temp->td_flags &= ~htole32(OHCI_TD_TOGGLE_MASK);
1327
1328                 if (average == 0) {
1329                         /*
1330                          * The buffer start and end phys addresses should be
1331                          * 0x0 for a zero length packet.
1332                          */
1333                         td->td_cbp = 0;
1334                         td->td_be = 0;
1335                         td->len = 0;
1336
1337                 } else {
1338
1339                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1340                         td->td_cbp = htole32(buf_res.physaddr);
1341                         buf_offset += (average - 1);
1342
1343                         usbd_get_page(temp->pc, buf_offset, &buf_res);
1344                         td->td_be = htole32(buf_res.physaddr);
1345                         buf_offset++;
1346
1347                         td->len = average;
1348
1349                         /* update remaining length */
1350
1351                         temp->len -= average;
1352                 }
1353
1354                 if ((td_next == td_alt_next) && temp->setup_alt_next) {
1355                         /* we need to receive these frames one by one ! */
1356                         td->td_flags &= htole32(~OHCI_TD_INTR_MASK);
1357                         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1358                         td->td_next = htole32(OHCI_TD_NEXT_END);
1359                 } else {
1360                         if (td_next) {
1361                                 /* link the current TD with the next one */
1362                                 td->td_next = td_next->td_self;
1363                         }
1364                 }
1365
1366                 td->alt_next = td_alt_next;
1367
1368                 usb_pc_cpu_flush(td->page_cache);
1369         }
1370
1371         if (precompute) {
1372                 precompute = 0;
1373
1374                 /* setup alt next pointer, if any */
1375                 if (temp->last_frame) {
1376                         /* no alternate next */
1377                         td_alt_next = NULL;
1378                 } else {
1379                         /* we use this field internally */
1380                         td_alt_next = td_next;
1381                 }
1382
1383                 /* restore */
1384                 temp->shortpkt = shortpkt_old;
1385                 temp->len = len_old;
1386                 goto restart;
1387         }
1388         temp->td = td;
1389         temp->td_next = td_next;
1390 }
1391
1392 static void
1393 ohci_setup_standard_chain(struct usb_xfer *xfer, ohci_ed_t **ed_last)
1394 {
1395         struct ohci_std_temp temp;
1396         struct usb_pipe_methods *methods;
1397         ohci_ed_t *ed;
1398         ohci_td_t *td;
1399         uint32_t ed_flags;
1400         uint32_t x;
1401
1402         DPRINTFN(9, "addr=%d endpt=%d sumlen=%d speed=%d\n",
1403             xfer->address, UE_GET_ADDR(xfer->endpointno),
1404             xfer->sumlen, usbd_get_speed(xfer->xroot->udev));
1405
1406         temp.average = xfer->max_hc_frame_size;
1407         temp.max_frame_size = xfer->max_frame_size;
1408
1409         /* toggle the DMA set we are using */
1410         xfer->flags_int.curr_dma_set ^= 1;
1411
1412         /* get next DMA set */
1413         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1414
1415         xfer->td_transfer_first = td;
1416         xfer->td_transfer_cache = td;
1417
1418         temp.td = NULL;
1419         temp.td_next = td;
1420         temp.last_frame = 0;
1421         temp.setup_alt_next = xfer->flags_int.short_frames_ok;
1422
1423         methods = xfer->endpoint->methods;
1424
1425         /* check if we should prepend a setup message */
1426
1427         if (xfer->flags_int.control_xfr) {
1428                 if (xfer->flags_int.control_hdr) {
1429
1430                         temp.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1431                             OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1432
1433                         temp.len = xfer->frlengths[0];
1434                         temp.pc = xfer->frbuffers + 0;
1435                         temp.shortpkt = temp.len ? 1 : 0;
1436                         /* check for last frame */
1437                         if (xfer->nframes == 1) {
1438                                 /* no STATUS stage yet, SETUP is last */
1439                                 if (xfer->flags_int.control_act) {
1440                                         temp.last_frame = 1;
1441                                         temp.setup_alt_next = 0;
1442                                 }
1443                         }
1444                         ohci_setup_standard_chain_sub(&temp);
1445
1446                         /*
1447                          * XXX assume that the setup message is
1448                          * contained within one USB packet:
1449                          */
1450                         xfer->endpoint->toggle_next = 1;
1451                 }
1452                 x = 1;
1453         } else {
1454                 x = 0;
1455         }
1456         temp.td_flags = htole32(OHCI_TD_NOCC | OHCI_TD_NOINTR);
1457
1458         /* set data toggle */
1459
1460         if (xfer->endpoint->toggle_next) {
1461                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1462         } else {
1463                 temp.td_flags |= htole32(OHCI_TD_TOGGLE_0);
1464         }
1465
1466         /* set endpoint direction */
1467
1468         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1469                 temp.td_flags |= htole32(OHCI_TD_IN);
1470         } else {
1471                 temp.td_flags |= htole32(OHCI_TD_OUT);
1472         }
1473
1474         while (x != xfer->nframes) {
1475
1476                 /* DATA0 / DATA1 message */
1477
1478                 temp.len = xfer->frlengths[x];
1479                 temp.pc = xfer->frbuffers + x;
1480
1481                 x++;
1482
1483                 if (x == xfer->nframes) {
1484                         if (xfer->flags_int.control_xfr) {
1485                                 /* no STATUS stage yet, DATA is last */
1486                                 if (xfer->flags_int.control_act) {
1487                                         temp.last_frame = 1;
1488                                         temp.setup_alt_next = 0;
1489                                 }
1490                         } else {
1491                                 temp.last_frame = 1;
1492                                 temp.setup_alt_next = 0;
1493                         }
1494                 }
1495                 if (temp.len == 0) {
1496
1497                         /* make sure that we send an USB packet */
1498
1499                         temp.shortpkt = 0;
1500
1501                 } else {
1502
1503                         /* regular data transfer */
1504
1505                         temp.shortpkt = (xfer->flags.force_short_xfer) ? 0 : 1;
1506                 }
1507
1508                 ohci_setup_standard_chain_sub(&temp);
1509         }
1510
1511         /* check if we should append a status stage */
1512
1513         if (xfer->flags_int.control_xfr &&
1514             !xfer->flags_int.control_act) {
1515
1516                 /*
1517                  * Send a DATA1 message and invert the current endpoint
1518                  * direction.
1519                  */
1520
1521                 /* set endpoint direction and data toggle */
1522
1523                 if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN) {
1524                         temp.td_flags = htole32(OHCI_TD_OUT |
1525                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1526                 } else {
1527                         temp.td_flags = htole32(OHCI_TD_IN |
1528                             OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1529                 }
1530
1531                 temp.len = 0;
1532                 temp.pc = NULL;
1533                 temp.shortpkt = 0;
1534                 temp.last_frame = 1;
1535                 temp.setup_alt_next = 0;
1536
1537                 ohci_setup_standard_chain_sub(&temp);
1538         }
1539         td = temp.td;
1540
1541         /* Ensure that last TD is terminating: */
1542         td->td_next = htole32(OHCI_TD_NEXT_END);
1543         td->td_flags &= ~htole32(OHCI_TD_INTR_MASK);
1544         td->td_flags |= htole32(OHCI_TD_SET_DI(1));
1545
1546         usb_pc_cpu_flush(td->page_cache);
1547
1548         /* must have at least one frame! */
1549
1550         xfer->td_transfer_last = td;
1551
1552 #ifdef USB_DEBUG
1553         if (ohcidebug > 8) {
1554                 DPRINTF("nexttog=%d; data before transfer:\n",
1555                     xfer->endpoint->toggle_next);
1556                 ohci_dump_tds(xfer->td_transfer_first);
1557         }
1558 #endif
1559
1560         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1561
1562         ed_flags = (OHCI_ED_SET_FA(xfer->address) |
1563             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1564             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1565
1566         ed_flags |= (OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD);
1567
1568         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
1569                 ed_flags |= OHCI_ED_SPEED;
1570         }
1571         ed->ed_flags = htole32(ed_flags);
1572
1573         td = xfer->td_transfer_first;
1574
1575         ed->ed_headp = td->td_self;
1576
1577         if (xfer->xroot->udev->flags.self_suspended == 0) {
1578                 /* the append function will flush the endpoint descriptor */
1579                 OHCI_APPEND_QH(ed, *ed_last);
1580
1581                 if (methods == &ohci_device_bulk_methods) {
1582                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1583
1584                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1585                 }
1586                 if (methods == &ohci_device_ctrl_methods) {
1587                         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1588
1589                         OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1590                 }
1591         } else {
1592                 usb_pc_cpu_flush(ed->page_cache);
1593         }
1594 }
1595
1596 static void
1597 ohci_root_intr(ohci_softc_t *sc)
1598 {
1599         uint32_t hstatus;
1600         uint16_t i;
1601         uint16_t m;
1602
1603         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1604
1605         /* clear any old interrupt data */
1606         memset(sc->sc_hub_idata, 0, sizeof(sc->sc_hub_idata));
1607
1608         hstatus = OREAD4(sc, OHCI_RH_STATUS);
1609         DPRINTF("sc=%p hstatus=0x%08x\n",
1610             sc, hstatus);
1611
1612         /* set bits */
1613         m = (sc->sc_noport + 1);
1614         if (m > (8 * sizeof(sc->sc_hub_idata))) {
1615                 m = (8 * sizeof(sc->sc_hub_idata));
1616         }
1617         for (i = 1; i < m; i++) {
1618                 /* pick out CHANGE bits from the status register */
1619                 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) {
1620                         sc->sc_hub_idata[i / 8] |= 1 << (i % 8);
1621                         DPRINTF("port %d changed\n", i);
1622                 }
1623         }
1624
1625         uhub_root_intr(&sc->sc_bus, sc->sc_hub_idata,
1626             sizeof(sc->sc_hub_idata));
1627 }
1628
1629 /* NOTE: "done" can be run two times in a row,
1630  * from close and from interrupt
1631  */
1632 static void
1633 ohci_device_done(struct usb_xfer *xfer, usb_error_t error)
1634 {
1635         struct usb_pipe_methods *methods = xfer->endpoint->methods;
1636         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1637         ohci_ed_t *ed;
1638
1639         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
1640
1641
1642         DPRINTFN(2, "xfer=%p, endpoint=%p, error=%d\n",
1643             xfer, xfer->endpoint, error);
1644
1645         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1646         if (ed) {
1647                 usb_pc_cpu_invalidate(ed->page_cache);
1648         }
1649         if (methods == &ohci_device_bulk_methods) {
1650                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
1651         }
1652         if (methods == &ohci_device_ctrl_methods) {
1653                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
1654         }
1655         if (methods == &ohci_device_intr_methods) {
1656                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
1657         }
1658         if (methods == &ohci_device_isoc_methods) {
1659                 OHCI_REMOVE_QH(ed, sc->sc_isoc_p_last);
1660         }
1661         xfer->td_transfer_first = NULL;
1662         xfer->td_transfer_last = NULL;
1663
1664         /* dequeue transfer and start next transfer */
1665         usbd_transfer_done(xfer, error);
1666 }
1667
1668 /*------------------------------------------------------------------------*
1669  * ohci bulk support
1670  *------------------------------------------------------------------------*/
1671 static void
1672 ohci_device_bulk_open(struct usb_xfer *xfer)
1673 {
1674         return;
1675 }
1676
1677 static void
1678 ohci_device_bulk_close(struct usb_xfer *xfer)
1679 {
1680         ohci_device_done(xfer, USB_ERR_CANCELLED);
1681 }
1682
1683 static void
1684 ohci_device_bulk_enter(struct usb_xfer *xfer)
1685 {
1686         return;
1687 }
1688
1689 static void
1690 ohci_device_bulk_start(struct usb_xfer *xfer)
1691 {
1692         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1693
1694         /* setup TD's and QH */
1695         ohci_setup_standard_chain(xfer, &sc->sc_bulk_p_last);
1696
1697         /* put transfer on interrupt queue */
1698         ohci_transfer_intr_enqueue(xfer);
1699 }
1700
1701 struct usb_pipe_methods ohci_device_bulk_methods =
1702 {
1703         .open = ohci_device_bulk_open,
1704         .close = ohci_device_bulk_close,
1705         .enter = ohci_device_bulk_enter,
1706         .start = ohci_device_bulk_start,
1707 };
1708
1709 /*------------------------------------------------------------------------*
1710  * ohci control support
1711  *------------------------------------------------------------------------*/
1712 static void
1713 ohci_device_ctrl_open(struct usb_xfer *xfer)
1714 {
1715         return;
1716 }
1717
1718 static void
1719 ohci_device_ctrl_close(struct usb_xfer *xfer)
1720 {
1721         ohci_device_done(xfer, USB_ERR_CANCELLED);
1722 }
1723
1724 static void
1725 ohci_device_ctrl_enter(struct usb_xfer *xfer)
1726 {
1727         return;
1728 }
1729
1730 static void
1731 ohci_device_ctrl_start(struct usb_xfer *xfer)
1732 {
1733         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1734
1735         /* setup TD's and QH */
1736         ohci_setup_standard_chain(xfer, &sc->sc_ctrl_p_last);
1737
1738         /* put transfer on interrupt queue */
1739         ohci_transfer_intr_enqueue(xfer);
1740 }
1741
1742 struct usb_pipe_methods ohci_device_ctrl_methods =
1743 {
1744         .open = ohci_device_ctrl_open,
1745         .close = ohci_device_ctrl_close,
1746         .enter = ohci_device_ctrl_enter,
1747         .start = ohci_device_ctrl_start,
1748 };
1749
1750 /*------------------------------------------------------------------------*
1751  * ohci interrupt support
1752  *------------------------------------------------------------------------*/
1753 static void
1754 ohci_device_intr_open(struct usb_xfer *xfer)
1755 {
1756         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1757         uint16_t best;
1758         uint16_t bit;
1759         uint16_t x;
1760
1761         best = 0;
1762         bit = OHCI_NO_EDS / 2;
1763         while (bit) {
1764                 if (xfer->interval >= bit) {
1765                         x = bit;
1766                         best = bit;
1767                         while (x & bit) {
1768                                 if (sc->sc_intr_stat[x] <
1769                                     sc->sc_intr_stat[best]) {
1770                                         best = x;
1771                                 }
1772                                 x++;
1773                         }
1774                         break;
1775                 }
1776                 bit >>= 1;
1777         }
1778
1779         sc->sc_intr_stat[best]++;
1780         xfer->qh_pos = best;
1781
1782         DPRINTFN(3, "best=%d interval=%d\n",
1783             best, xfer->interval);
1784 }
1785
1786 static void
1787 ohci_device_intr_close(struct usb_xfer *xfer)
1788 {
1789         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1790
1791         sc->sc_intr_stat[xfer->qh_pos]--;
1792
1793         ohci_device_done(xfer, USB_ERR_CANCELLED);
1794 }
1795
1796 static void
1797 ohci_device_intr_enter(struct usb_xfer *xfer)
1798 {
1799         return;
1800 }
1801
1802 static void
1803 ohci_device_intr_start(struct usb_xfer *xfer)
1804 {
1805         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1806
1807         /* setup TD's and QH */
1808         ohci_setup_standard_chain(xfer, &sc->sc_intr_p_last[xfer->qh_pos]);
1809
1810         /* put transfer on interrupt queue */
1811         ohci_transfer_intr_enqueue(xfer);
1812 }
1813
1814 struct usb_pipe_methods ohci_device_intr_methods =
1815 {
1816         .open = ohci_device_intr_open,
1817         .close = ohci_device_intr_close,
1818         .enter = ohci_device_intr_enter,
1819         .start = ohci_device_intr_start,
1820 };
1821
1822 /*------------------------------------------------------------------------*
1823  * ohci isochronous support
1824  *------------------------------------------------------------------------*/
1825 static void
1826 ohci_device_isoc_open(struct usb_xfer *xfer)
1827 {
1828         return;
1829 }
1830
1831 static void
1832 ohci_device_isoc_close(struct usb_xfer *xfer)
1833 {
1834         /**/
1835         ohci_device_done(xfer, USB_ERR_CANCELLED);
1836 }
1837
1838 static void
1839 ohci_device_isoc_enter(struct usb_xfer *xfer)
1840 {
1841         struct usb_page_search buf_res;
1842         ohci_softc_t *sc = OHCI_BUS2SC(xfer->xroot->bus);
1843         struct ohci_hcca *hcca;
1844         uint32_t buf_offset;
1845         uint32_t nframes;
1846         uint32_t ed_flags;
1847         uint32_t *plen;
1848         uint16_t itd_offset[OHCI_ITD_NOFFSET];
1849         uint16_t length;
1850         uint8_t ncur;
1851         ohci_itd_t *td;
1852         ohci_itd_t *td_last = NULL;
1853         ohci_ed_t *ed;
1854
1855         hcca = ohci_get_hcca(sc);
1856
1857         nframes = le32toh(hcca->hcca_frame_number);
1858
1859         DPRINTFN(6, "xfer=%p isoc_next=%u nframes=%u hcca_fn=%u\n",
1860             xfer, xfer->endpoint->isoc_next, xfer->nframes, nframes);
1861
1862         if ((xfer->endpoint->is_synced == 0) ||
1863             (((nframes - xfer->endpoint->isoc_next) & 0xFFFF) < xfer->nframes) ||
1864             (((xfer->endpoint->isoc_next - nframes) & 0xFFFF) >= 128)) {
1865                 /*
1866                  * If there is data underflow or the pipe queue is empty we
1867                  * schedule the transfer a few frames ahead of the current
1868                  * frame position. Else two isochronous transfers might
1869                  * overlap.
1870                  */
1871                 xfer->endpoint->isoc_next = (nframes + 3) & 0xFFFF;
1872                 xfer->endpoint->is_synced = 1;
1873                 DPRINTFN(3, "start next=%d\n", xfer->endpoint->isoc_next);
1874         }
1875         /*
1876          * compute how many milliseconds the insertion is ahead of the
1877          * current frame position:
1878          */
1879         buf_offset = ((xfer->endpoint->isoc_next - nframes) & 0xFFFF);
1880
1881         /*
1882          * pre-compute when the isochronous transfer will be finished:
1883          */
1884         xfer->isoc_time_complete =
1885             (usb_isoc_time_expand(&sc->sc_bus, nframes) + buf_offset +
1886             xfer->nframes);
1887
1888         /* get the real number of frames */
1889
1890         nframes = xfer->nframes;
1891
1892         buf_offset = 0;
1893
1894         plen = xfer->frlengths;
1895
1896         /* toggle the DMA set we are using */
1897         xfer->flags_int.curr_dma_set ^= 1;
1898
1899         /* get next DMA set */
1900         td = xfer->td_start[xfer->flags_int.curr_dma_set];
1901
1902         xfer->td_transfer_first = td;
1903
1904         ncur = 0;
1905         length = 0;
1906
1907         while (nframes--) {
1908                 if (td == NULL) {
1909                         panic("%s:%d: out of TD's\n",
1910                             __FUNCTION__, __LINE__);
1911                 }
1912                 itd_offset[ncur] = length;
1913                 buf_offset += *plen;
1914                 length += *plen;
1915                 plen++;
1916                 ncur++;
1917
1918                 if (                    /* check if the ITD is full */
1919                     (ncur == OHCI_ITD_NOFFSET) ||
1920                 /* check if we have put more than 4K into the ITD */
1921                     (length & 0xF000) ||
1922                 /* check if it is the last frame */
1923                     (nframes == 0)) {
1924
1925                         /* fill current ITD */
1926                         td->itd_flags = htole32(
1927                             OHCI_ITD_NOCC |
1928                             OHCI_ITD_SET_SF(xfer->endpoint->isoc_next) |
1929                             OHCI_ITD_NOINTR |
1930                             OHCI_ITD_SET_FC(ncur));
1931
1932                         td->frames = ncur;
1933                         xfer->endpoint->isoc_next += ncur;
1934
1935                         if (length == 0) {
1936                                 /* all zero */
1937                                 td->itd_bp0 = 0;
1938                                 td->itd_be = ~0;
1939
1940                                 while (ncur--) {
1941                                         td->itd_offset[ncur] =
1942                                             htole16(OHCI_ITD_MK_OFFS(0));
1943                                 }
1944                         } else {
1945                                 usbd_get_page(xfer->frbuffers, buf_offset - length, &buf_res);
1946                                 length = OHCI_PAGE_MASK(buf_res.physaddr);
1947                                 buf_res.physaddr =
1948                                     OHCI_PAGE(buf_res.physaddr);
1949                                 td->itd_bp0 = htole32(buf_res.physaddr);
1950                                 usbd_get_page(xfer->frbuffers, buf_offset - 1, &buf_res);
1951                                 td->itd_be = htole32(buf_res.physaddr);
1952
1953                                 while (ncur--) {
1954                                         itd_offset[ncur] += length;
1955                                         itd_offset[ncur] =
1956                                             OHCI_ITD_MK_OFFS(itd_offset[ncur]);
1957                                         td->itd_offset[ncur] =
1958                                             htole16(itd_offset[ncur]);
1959                                 }
1960                         }
1961                         ncur = 0;
1962                         length = 0;
1963                         td_last = td;
1964                         td = td->obj_next;
1965
1966                         if (td) {
1967                                 /* link the last TD with the next one */
1968                                 td_last->itd_next = td->itd_self;
1969                         }
1970                         usb_pc_cpu_flush(td_last->page_cache);
1971                 }
1972         }
1973
1974         /* update the last TD */
1975         td_last->itd_flags &= ~htole32(OHCI_ITD_NOINTR);
1976         td_last->itd_flags |= htole32(OHCI_ITD_SET_DI(0));
1977         td_last->itd_next = 0;
1978
1979         usb_pc_cpu_flush(td_last->page_cache);
1980
1981         xfer->td_transfer_last = td_last;
1982
1983 #ifdef USB_DEBUG
1984         if (ohcidebug > 8) {
1985                 DPRINTF("data before transfer:\n");
1986                 ohci_dump_itds(xfer->td_transfer_first);
1987         }
1988 #endif
1989         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
1990
1991         if (UE_GET_DIR(xfer->endpointno) == UE_DIR_IN)
1992                 ed_flags = (OHCI_ED_DIR_IN | OHCI_ED_FORMAT_ISO);
1993         else
1994                 ed_flags = (OHCI_ED_DIR_OUT | OHCI_ED_FORMAT_ISO);
1995
1996         ed_flags |= (OHCI_ED_SET_FA(xfer->address) |
1997             OHCI_ED_SET_EN(UE_GET_ADDR(xfer->endpointno)) |
1998             OHCI_ED_SET_MAXP(xfer->max_frame_size));
1999
2000         if (xfer->xroot->udev->speed == USB_SPEED_LOW) {
2001                 ed_flags |= OHCI_ED_SPEED;
2002         }
2003         ed->ed_flags = htole32(ed_flags);
2004
2005         td = xfer->td_transfer_first;
2006
2007         ed->ed_headp = td->itd_self;
2008
2009         /* isochronous transfers are not affected by suspend / resume */
2010         /* the append function will flush the endpoint descriptor */
2011
2012         OHCI_APPEND_QH(ed, sc->sc_isoc_p_last);
2013 }
2014
2015 static void
2016 ohci_device_isoc_start(struct usb_xfer *xfer)
2017 {
2018         /* put transfer on interrupt queue */
2019         ohci_transfer_intr_enqueue(xfer);
2020 }
2021
2022 struct usb_pipe_methods ohci_device_isoc_methods =
2023 {
2024         .open = ohci_device_isoc_open,
2025         .close = ohci_device_isoc_close,
2026         .enter = ohci_device_isoc_enter,
2027         .start = ohci_device_isoc_start,
2028 };
2029
2030 /*------------------------------------------------------------------------*
2031  * ohci root control support
2032  *------------------------------------------------------------------------*
2033  * Simulate a hardware hub by handling all the necessary requests.
2034  *------------------------------------------------------------------------*/
2035
2036 static const
2037 struct usb_device_descriptor ohci_devd =
2038 {
2039         sizeof(struct usb_device_descriptor),
2040         UDESC_DEVICE,                   /* type */
2041         {0x00, 0x01},                   /* USB version */
2042         UDCLASS_HUB,                    /* class */
2043         UDSUBCLASS_HUB,                 /* subclass */
2044         UDPROTO_FSHUB,                  /* protocol */
2045         64,                             /* max packet */
2046         {0}, {0}, {0x00, 0x01},         /* device id */
2047         1, 2, 0,                        /* string indicies */
2048         1                               /* # of configurations */
2049 };
2050
2051 static const
2052 struct ohci_config_desc ohci_confd =
2053 {
2054         .confd = {
2055                 .bLength = sizeof(struct usb_config_descriptor),
2056                 .bDescriptorType = UDESC_CONFIG,
2057                 .wTotalLength[0] = sizeof(ohci_confd),
2058                 .bNumInterface = 1,
2059                 .bConfigurationValue = 1,
2060                 .iConfiguration = 0,
2061                 .bmAttributes = UC_SELF_POWERED,
2062                 .bMaxPower = 0,         /* max power */
2063         },
2064         .ifcd = {
2065                 .bLength = sizeof(struct usb_interface_descriptor),
2066                 .bDescriptorType = UDESC_INTERFACE,
2067                 .bNumEndpoints = 1,
2068                 .bInterfaceClass = UICLASS_HUB,
2069                 .bInterfaceSubClass = UISUBCLASS_HUB,
2070                 .bInterfaceProtocol = 0,
2071         },
2072         .endpd = {
2073                 .bLength = sizeof(struct usb_endpoint_descriptor),
2074                 .bDescriptorType = UDESC_ENDPOINT,
2075                 .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2076                 .bmAttributes = UE_INTERRUPT,
2077                 .wMaxPacketSize[0] = 32,/* max packet (255 ports) */
2078                 .bInterval = 255,
2079         },
2080 };
2081
2082 static const
2083 struct usb_hub_descriptor ohci_hubd =
2084 {
2085         .bDescLength = 0,       /* dynamic length */
2086         .bDescriptorType = UDESC_HUB,
2087 };
2088
2089 static usb_error_t
2090 ohci_roothub_exec(struct usb_device *udev,
2091     struct usb_device_request *req, const void **pptr, uint16_t *plength)
2092 {
2093         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2094         const void *ptr;
2095         const char *str_ptr;
2096         uint32_t port;
2097         uint32_t v;
2098         uint16_t len;
2099         uint16_t value;
2100         uint16_t index;
2101         uint8_t l;
2102         usb_error_t err;
2103
2104         USB_BUS_LOCK_ASSERT(&sc->sc_bus, MA_OWNED);
2105
2106         /* buffer reset */
2107         ptr = (const void *)&sc->sc_hub_desc.temp;
2108         len = 0;
2109         err = 0;
2110
2111         value = UGETW(req->wValue);
2112         index = UGETW(req->wIndex);
2113
2114         DPRINTFN(3, "type=0x%02x request=0x%02x wLen=0x%04x "
2115             "wValue=0x%04x wIndex=0x%04x\n",
2116             req->bmRequestType, req->bRequest,
2117             UGETW(req->wLength), value, index);
2118
2119 #define C(x,y) ((x) | ((y) << 8))
2120         switch (C(req->bRequest, req->bmRequestType)) {
2121         case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2122         case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2123         case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2124                 /*
2125                  * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2126                  * for the integrated root hub.
2127                  */
2128                 break;
2129         case C(UR_GET_CONFIG, UT_READ_DEVICE):
2130                 len = 1;
2131                 sc->sc_hub_desc.temp[0] = sc->sc_conf;
2132                 break;
2133         case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2134                 switch (value >> 8) {
2135                 case UDESC_DEVICE:
2136                         if ((value & 0xff) != 0) {
2137                                 err = USB_ERR_IOERROR;
2138                                 goto done;
2139                         }
2140                         len = sizeof(ohci_devd);
2141                         ptr = (const void *)&ohci_devd;
2142                         break;
2143
2144                 case UDESC_CONFIG:
2145                         if ((value & 0xff) != 0) {
2146                                 err = USB_ERR_IOERROR;
2147                                 goto done;
2148                         }
2149                         len = sizeof(ohci_confd);
2150                         ptr = (const void *)&ohci_confd;
2151                         break;
2152
2153                 case UDESC_STRING:
2154                         switch (value & 0xff) {
2155                         case 0: /* Language table */
2156                                 str_ptr = "\001";
2157                                 break;
2158
2159                         case 1: /* Vendor */
2160                                 str_ptr = sc->sc_vendor;
2161                                 break;
2162
2163                         case 2: /* Product */
2164                                 str_ptr = "OHCI root HUB";
2165                                 break;
2166
2167                         default:
2168                                 str_ptr = "";
2169                                 break;
2170                         }
2171
2172                         len = usb_make_str_desc(
2173                             sc->sc_hub_desc.temp,
2174                             sizeof(sc->sc_hub_desc.temp),
2175                             str_ptr);
2176                         break;
2177
2178                 default:
2179                         err = USB_ERR_IOERROR;
2180                         goto done;
2181                 }
2182                 break;
2183         case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2184                 len = 1;
2185                 sc->sc_hub_desc.temp[0] = 0;
2186                 break;
2187         case C(UR_GET_STATUS, UT_READ_DEVICE):
2188                 len = 2;
2189                 USETW(sc->sc_hub_desc.stat.wStatus, UDS_SELF_POWERED);
2190                 break;
2191         case C(UR_GET_STATUS, UT_READ_INTERFACE):
2192         case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2193                 len = 2;
2194                 USETW(sc->sc_hub_desc.stat.wStatus, 0);
2195                 break;
2196         case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2197                 if (value >= OHCI_MAX_DEVICES) {
2198                         err = USB_ERR_IOERROR;
2199                         goto done;
2200                 }
2201                 sc->sc_addr = value;
2202                 break;
2203         case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2204                 if ((value != 0) && (value != 1)) {
2205                         err = USB_ERR_IOERROR;
2206                         goto done;
2207                 }
2208                 sc->sc_conf = value;
2209                 break;
2210         case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2211                 break;
2212         case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2213         case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2214         case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2215                 err = USB_ERR_IOERROR;
2216                 goto done;
2217         case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2218                 break;
2219         case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2220                 break;
2221                 /* Hub requests */
2222         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2223                 break;
2224         case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2225                 DPRINTFN(9, "UR_CLEAR_PORT_FEATURE "
2226                     "port=%d feature=%d\n",
2227                     index, value);
2228                 if ((index < 1) ||
2229                     (index > sc->sc_noport)) {
2230                         err = USB_ERR_IOERROR;
2231                         goto done;
2232                 }
2233                 port = OHCI_RH_PORT_STATUS(index);
2234                 switch (value) {
2235                 case UHF_PORT_ENABLE:
2236                         OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2237                         break;
2238                 case UHF_PORT_SUSPEND:
2239                         OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2240                         break;
2241                 case UHF_PORT_POWER:
2242                         /* Yes, writing to the LOW_SPEED bit clears power. */
2243                         OWRITE4(sc, port, UPS_LOW_SPEED);
2244                         break;
2245                 case UHF_C_PORT_CONNECTION:
2246                         OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2247                         break;
2248                 case UHF_C_PORT_ENABLE:
2249                         OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2250                         break;
2251                 case UHF_C_PORT_SUSPEND:
2252                         OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2253                         break;
2254                 case UHF_C_PORT_OVER_CURRENT:
2255                         OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2256                         break;
2257                 case UHF_C_PORT_RESET:
2258                         OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2259                         break;
2260                 default:
2261                         err = USB_ERR_IOERROR;
2262                         goto done;
2263                 }
2264                 switch (value) {
2265                 case UHF_C_PORT_CONNECTION:
2266                 case UHF_C_PORT_ENABLE:
2267                 case UHF_C_PORT_SUSPEND:
2268                 case UHF_C_PORT_OVER_CURRENT:
2269                 case UHF_C_PORT_RESET:
2270                         /* enable RHSC interrupt if condition is cleared. */
2271                         if ((OREAD4(sc, port) >> 16) == 0)
2272                                 ohci_rhsc_enable(sc);
2273                         break;
2274                 default:
2275                         break;
2276                 }
2277                 break;
2278         case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2279                 if ((value & 0xff) != 0) {
2280                         err = USB_ERR_IOERROR;
2281                         goto done;
2282                 }
2283                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2284
2285                 sc->sc_hub_desc.hubd = ohci_hubd;
2286                 sc->sc_hub_desc.hubd.bNbrPorts = sc->sc_noport;
2287                 USETW(sc->sc_hub_desc.hubd.wHubCharacteristics,
2288                     (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2289                     v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2290                 /* XXX overcurrent */
2291                     );
2292                 sc->sc_hub_desc.hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2293                 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2294
2295                 for (l = 0; l < sc->sc_noport; l++) {
2296                         if (v & 1) {
2297                                 sc->sc_hub_desc.hubd.DeviceRemovable[l / 8] |= (1 << (l % 8));
2298                         }
2299                         v >>= 1;
2300                 }
2301                 sc->sc_hub_desc.hubd.bDescLength =
2302                     8 + ((sc->sc_noport + 7) / 8);
2303                 len = sc->sc_hub_desc.hubd.bDescLength;
2304                 break;
2305
2306         case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2307                 len = 16;
2308                 memset(sc->sc_hub_desc.temp, 0, 16);
2309                 break;
2310         case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2311                 DPRINTFN(9, "get port status i=%d\n",
2312                     index);
2313                 if ((index < 1) ||
2314                     (index > sc->sc_noport)) {
2315                         err = USB_ERR_IOERROR;
2316                         goto done;
2317                 }
2318                 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2319                 DPRINTFN(9, "port status=0x%04x\n", v);
2320                 v &= ~UPS_PORT_MODE_DEVICE;     /* force host mode */
2321                 USETW(sc->sc_hub_desc.ps.wPortStatus, v);
2322                 USETW(sc->sc_hub_desc.ps.wPortChange, v >> 16);
2323                 len = sizeof(sc->sc_hub_desc.ps);
2324                 break;
2325         case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2326                 err = USB_ERR_IOERROR;
2327                 goto done;
2328         case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2329                 break;
2330         case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2331                 if ((index < 1) ||
2332                     (index > sc->sc_noport)) {
2333                         err = USB_ERR_IOERROR;
2334                         goto done;
2335                 }
2336                 port = OHCI_RH_PORT_STATUS(index);
2337                 switch (value) {
2338                 case UHF_PORT_ENABLE:
2339                         OWRITE4(sc, port, UPS_PORT_ENABLED);
2340                         break;
2341                 case UHF_PORT_SUSPEND:
2342                         OWRITE4(sc, port, UPS_SUSPEND);
2343                         break;
2344                 case UHF_PORT_RESET:
2345                         DPRINTFN(6, "reset port %d\n", index);
2346                         OWRITE4(sc, port, UPS_RESET);
2347                         for (v = 0;; v++) {
2348                                 if (v < 12) {
2349                                         usb_pause_mtx(&sc->sc_bus.bus_mtx,
2350                                             USB_MS_TO_TICKS(usb_port_root_reset_delay));
2351
2352                                         if ((OREAD4(sc, port) & UPS_RESET) == 0) {
2353                                                 break;
2354                                         }
2355                                 } else {
2356                                         err = USB_ERR_TIMEOUT;
2357                                         goto done;
2358                                 }
2359                         }
2360                         DPRINTFN(9, "ohci port %d reset, status = 0x%04x\n",
2361                             index, OREAD4(sc, port));
2362                         break;
2363                 case UHF_PORT_POWER:
2364                         DPRINTFN(3, "set port power %d\n", index);
2365                         OWRITE4(sc, port, UPS_PORT_POWER);
2366                         break;
2367                 default:
2368                         err = USB_ERR_IOERROR;
2369                         goto done;
2370                 }
2371                 break;
2372         default:
2373                 err = USB_ERR_IOERROR;
2374                 goto done;
2375         }
2376 done:
2377         *plength = len;
2378         *pptr = ptr;
2379         return (err);
2380 }
2381
2382 static void
2383 ohci_xfer_setup(struct usb_setup_params *parm)
2384 {
2385         struct usb_page_search page_info;
2386         struct usb_page_cache *pc;
2387         ohci_softc_t *sc;
2388         struct usb_xfer *xfer;
2389         void *last_obj;
2390         uint32_t ntd;
2391         uint32_t nitd;
2392         uint32_t nqh;
2393         uint32_t n;
2394
2395         sc = OHCI_BUS2SC(parm->udev->bus);
2396         xfer = parm->curr_xfer;
2397
2398         parm->hc_max_packet_size = 0x500;
2399         parm->hc_max_packet_count = 1;
2400         parm->hc_max_frame_size = OHCI_PAGE_SIZE;
2401
2402         /*
2403          * calculate ntd and nqh
2404          */
2405         if (parm->methods == &ohci_device_ctrl_methods) {
2406                 xfer->flags_int.bdma_enable = 1;
2407
2408                 usbd_transfer_setup_sub(parm);
2409
2410                 nitd = 0;
2411                 ntd = ((2 * xfer->nframes) + 1  /* STATUS */
2412                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2413                 nqh = 1;
2414
2415         } else if (parm->methods == &ohci_device_bulk_methods) {
2416                 xfer->flags_int.bdma_enable = 1;
2417
2418                 usbd_transfer_setup_sub(parm);
2419
2420                 nitd = 0;
2421                 ntd = ((2 * xfer->nframes)
2422                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2423                 nqh = 1;
2424
2425         } else if (parm->methods == &ohci_device_intr_methods) {
2426                 xfer->flags_int.bdma_enable = 1;
2427
2428                 usbd_transfer_setup_sub(parm);
2429
2430                 nitd = 0;
2431                 ntd = ((2 * xfer->nframes)
2432                     + (xfer->max_data_length / xfer->max_hc_frame_size));
2433                 nqh = 1;
2434
2435         } else if (parm->methods == &ohci_device_isoc_methods) {
2436                 xfer->flags_int.bdma_enable = 1;
2437
2438                 usbd_transfer_setup_sub(parm);
2439
2440                 nitd = ((xfer->max_data_length / OHCI_PAGE_SIZE) +
2441                     ((xfer->nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET) +
2442                     1 /* EXTRA */ );
2443                 ntd = 0;
2444                 nqh = 1;
2445
2446         } else {
2447
2448                 usbd_transfer_setup_sub(parm);
2449
2450                 nitd = 0;
2451                 ntd = 0;
2452                 nqh = 0;
2453         }
2454
2455 alloc_dma_set:
2456
2457         if (parm->err) {
2458                 return;
2459         }
2460         last_obj = NULL;
2461
2462         if (usbd_transfer_setup_sub_malloc(
2463             parm, &pc, sizeof(ohci_td_t),
2464             OHCI_TD_ALIGN, ntd)) {
2465                 parm->err = USB_ERR_NOMEM;
2466                 return;
2467         }
2468         if (parm->buf) {
2469                 for (n = 0; n != ntd; n++) {
2470                         ohci_td_t *td;
2471
2472                         usbd_get_page(pc + n, 0, &page_info);
2473
2474                         td = page_info.buffer;
2475
2476                         /* init TD */
2477                         td->td_self = htole32(page_info.physaddr);
2478                         td->obj_next = last_obj;
2479                         td->page_cache = pc + n;
2480
2481                         last_obj = td;
2482
2483                         usb_pc_cpu_flush(pc + n);
2484                 }
2485         }
2486         if (usbd_transfer_setup_sub_malloc(
2487             parm, &pc, sizeof(ohci_itd_t),
2488             OHCI_ITD_ALIGN, nitd)) {
2489                 parm->err = USB_ERR_NOMEM;
2490                 return;
2491         }
2492         if (parm->buf) {
2493                 for (n = 0; n != nitd; n++) {
2494                         ohci_itd_t *itd;
2495
2496                         usbd_get_page(pc + n, 0, &page_info);
2497
2498                         itd = page_info.buffer;
2499
2500                         /* init TD */
2501                         itd->itd_self = htole32(page_info.physaddr);
2502                         itd->obj_next = last_obj;
2503                         itd->page_cache = pc + n;
2504
2505                         last_obj = itd;
2506
2507                         usb_pc_cpu_flush(pc + n);
2508                 }
2509         }
2510         xfer->td_start[xfer->flags_int.curr_dma_set] = last_obj;
2511
2512         last_obj = NULL;
2513
2514         if (usbd_transfer_setup_sub_malloc(
2515             parm, &pc, sizeof(ohci_ed_t),
2516             OHCI_ED_ALIGN, nqh)) {
2517                 parm->err = USB_ERR_NOMEM;
2518                 return;
2519         }
2520         if (parm->buf) {
2521                 for (n = 0; n != nqh; n++) {
2522                         ohci_ed_t *ed;
2523
2524                         usbd_get_page(pc + n, 0, &page_info);
2525
2526                         ed = page_info.buffer;
2527
2528                         /* init QH */
2529                         ed->ed_self = htole32(page_info.physaddr);
2530                         ed->obj_next = last_obj;
2531                         ed->page_cache = pc + n;
2532
2533                         last_obj = ed;
2534
2535                         usb_pc_cpu_flush(pc + n);
2536                 }
2537         }
2538         xfer->qh_start[xfer->flags_int.curr_dma_set] = last_obj;
2539
2540         if (!xfer->flags_int.curr_dma_set) {
2541                 xfer->flags_int.curr_dma_set = 1;
2542                 goto alloc_dma_set;
2543         }
2544 }
2545
2546 static void
2547 ohci_ep_init(struct usb_device *udev, struct usb_endpoint_descriptor *edesc,
2548     struct usb_endpoint *ep)
2549 {
2550         ohci_softc_t *sc = OHCI_BUS2SC(udev->bus);
2551
2552         DPRINTFN(2, "endpoint=%p, addr=%d, endpt=%d, mode=%d (%d)\n",
2553             ep, udev->address,
2554             edesc->bEndpointAddress, udev->flags.usb_mode,
2555             sc->sc_addr);
2556
2557         if (udev->device_index != sc->sc_addr) {
2558                 switch (edesc->bmAttributes & UE_XFERTYPE) {
2559                 case UE_CONTROL:
2560                         ep->methods = &ohci_device_ctrl_methods;
2561                         break;
2562                 case UE_INTERRUPT:
2563                         ep->methods = &ohci_device_intr_methods;
2564                         break;
2565                 case UE_ISOCHRONOUS:
2566                         if (udev->speed == USB_SPEED_FULL) {
2567                                 ep->methods = &ohci_device_isoc_methods;
2568                         }
2569                         break;
2570                 case UE_BULK:
2571                         ep->methods = &ohci_device_bulk_methods;
2572                         break;
2573                 default:
2574                         /* do nothing */
2575                         break;
2576                 }
2577         }
2578 }
2579
2580 static void
2581 ohci_xfer_unsetup(struct usb_xfer *xfer)
2582 {
2583         return;
2584 }
2585
2586 static void
2587 ohci_get_dma_delay(struct usb_device *udev, uint32_t *pus)
2588 {
2589         /*
2590          * Wait until hardware has finished any possible use of the
2591          * transfer descriptor(s) and QH
2592          */
2593         *pus = (1125);                  /* microseconds */
2594 }
2595
2596 static void
2597 ohci_device_resume(struct usb_device *udev)
2598 {
2599         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2600         struct usb_xfer *xfer;
2601         struct usb_pipe_methods *methods;
2602         ohci_ed_t *ed;
2603
2604         DPRINTF("\n");
2605
2606         USB_BUS_LOCK(udev->bus);
2607
2608         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2609
2610                 if (xfer->xroot->udev == udev) {
2611
2612                         methods = xfer->endpoint->methods;
2613                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2614
2615                         if (methods == &ohci_device_bulk_methods) {
2616                                 OHCI_APPEND_QH(ed, sc->sc_bulk_p_last);
2617                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2618                         }
2619                         if (methods == &ohci_device_ctrl_methods) {
2620                                 OHCI_APPEND_QH(ed, sc->sc_ctrl_p_last);
2621                                 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
2622                         }
2623                         if (methods == &ohci_device_intr_methods) {
2624                                 OHCI_APPEND_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2625                         }
2626                 }
2627         }
2628
2629         USB_BUS_UNLOCK(udev->bus);
2630
2631         return;
2632 }
2633
2634 static void
2635 ohci_device_suspend(struct usb_device *udev)
2636 {
2637         struct ohci_softc *sc = OHCI_BUS2SC(udev->bus);
2638         struct usb_xfer *xfer;
2639         struct usb_pipe_methods *methods;
2640         ohci_ed_t *ed;
2641
2642         DPRINTF("\n");
2643
2644         USB_BUS_LOCK(udev->bus);
2645
2646         TAILQ_FOREACH(xfer, &sc->sc_bus.intr_q.head, wait_entry) {
2647
2648                 if (xfer->xroot->udev == udev) {
2649
2650                         methods = xfer->endpoint->methods;
2651                         ed = xfer->qh_start[xfer->flags_int.curr_dma_set];
2652
2653                         if (methods == &ohci_device_bulk_methods) {
2654                                 OHCI_REMOVE_QH(ed, sc->sc_bulk_p_last);
2655                         }
2656                         if (methods == &ohci_device_ctrl_methods) {
2657                                 OHCI_REMOVE_QH(ed, sc->sc_ctrl_p_last);
2658                         }
2659                         if (methods == &ohci_device_intr_methods) {
2660                                 OHCI_REMOVE_QH(ed, sc->sc_intr_p_last[xfer->qh_pos]);
2661                         }
2662                 }
2663         }
2664
2665         USB_BUS_UNLOCK(udev->bus);
2666
2667         return;
2668 }
2669
2670 static void
2671 ohci_set_hw_power_sleep(struct usb_bus *bus, uint32_t state)
2672 {
2673         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2674
2675         switch (state) {
2676         case USB_HW_POWER_SUSPEND:
2677         case USB_HW_POWER_SHUTDOWN:
2678                 ohci_suspend(sc);
2679                 break;
2680         case USB_HW_POWER_RESUME:
2681                 ohci_resume(sc);
2682                 break;
2683         default:
2684                 break;
2685         }
2686 }
2687
2688 static void
2689 ohci_set_hw_power(struct usb_bus *bus)
2690 {
2691         struct ohci_softc *sc = OHCI_BUS2SC(bus);
2692         uint32_t temp;
2693         uint32_t flags;
2694
2695         DPRINTF("\n");
2696
2697         USB_BUS_LOCK(bus);
2698
2699         flags = bus->hw_power_state;
2700
2701         temp = OREAD4(sc, OHCI_CONTROL);
2702         temp &= ~(OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE);
2703
2704         if (flags & USB_HW_POWER_CONTROL)
2705                 temp |= OHCI_CLE;
2706
2707         if (flags & USB_HW_POWER_BULK)
2708                 temp |= OHCI_BLE;
2709
2710         if (flags & USB_HW_POWER_INTERRUPT)
2711                 temp |= OHCI_PLE;
2712
2713         if (flags & USB_HW_POWER_ISOC)
2714                 temp |= OHCI_IE | OHCI_PLE;
2715
2716         OWRITE4(sc, OHCI_CONTROL, temp);
2717
2718         USB_BUS_UNLOCK(bus);
2719
2720         return;
2721 }
2722
2723 struct usb_bus_methods ohci_bus_methods =
2724 {
2725         .endpoint_init = ohci_ep_init,
2726         .xfer_setup = ohci_xfer_setup,
2727         .xfer_unsetup = ohci_xfer_unsetup,
2728         .get_dma_delay = ohci_get_dma_delay,
2729         .device_resume = ohci_device_resume,
2730         .device_suspend = ohci_device_suspend,
2731         .set_hw_power = ohci_set_hw_power,
2732         .set_hw_power_sleep = ohci_set_hw_power_sleep,
2733         .roothub_exec = ohci_roothub_exec,
2734         .xfer_poll = ohci_do_poll,
2735 };