2 * Copyright (c) 1989, 1990 William F. Jolitz.
3 * Copyright (c) 1990 The Regents of the University of California.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
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14 * 4. Neither the name of the University nor the names of its contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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21 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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30 * from: vector.s, 386BSD 0.1 unknown origin
35 * Interrupt entry points for external interrupts triggered by I/O APICs
36 * as well as IPI handlers.
41 #include <machine/asmacros.h>
42 #include <x86/apicreg.h>
47 * I/O Interrupt Entry Point. Rather than having one entry point for
48 * each interrupt source, we use one entry point for each 32-bit word
49 * in the ISR. The handler determines the highest bit set in the ISR,
50 * translates that into a vector, and passes the vector to the
51 * lapic_handle_intr() function.
53 #define ISR_VEC(index, vec_name) \
60 FAKE_MCOUNT(TF_EIP(%esp)) ; \
61 movl lapic, %edx ; /* pointer to local APIC */ \
62 movl LA_ISR + 16 * (index)(%edx), %eax ; /* load ISR */ \
63 bsrl %eax, %eax ; /* index of highest set bit in ISR */ \
65 addl $(32 * index),%eax ; \
67 pushl %eax ; /* pass the IRQ */ \
68 call lapic_handle_intr ; \
69 addl $8, %esp ; /* discard parameter */ \
75 * Handle "spurious INTerrupts".
77 * This is different than the "spurious INTerrupt" generated by an
78 * 8259 PIC for missing INTs. See the APIC documentation for details.
79 * This routine should NOT do an 'EOI' cycle.
85 /* No EOI cycle used here */
98 * Local APIC periodic timer handler.
106 FAKE_MCOUNT(TF_EIP(%esp))
108 call lapic_handle_timer
114 * Local APIC CMCI handler.
122 FAKE_MCOUNT(TF_EIP(%esp))
123 call lapic_handle_cmc
128 * Local APIC error interrupt handler.
136 FAKE_MCOUNT(TF_EIP(%esp))
137 call lapic_handle_error
143 * Xen event channel upcall interrupt handler.
144 * Only used when the hypervisor supports direct vector callbacks.
148 IDTVEC(xen_intr_upcall)
152 FAKE_MCOUNT(TF_EIP(%esp))
154 call xen_intr_handle_upcall
162 * Global address space TLB shootdown.
169 movl $KDSEL, %eax /* Kernel data selector */
172 #if defined(COUNT_XINVLTLB_HITS) || defined(COUNT_IPIS)
174 movl $KPSEL, %eax /* Private space selector */
176 movl PCPU(CPUID), %eax
178 #ifdef COUNT_XINVLTLB_HITS
179 incl xhits_gbl(,%eax,4)
182 movl ipi_invltlb_counts(,%eax,4),%eax
187 movl %cr3, %eax /* invalidate the TLB */
191 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */
201 * Single page TLB shootdown
208 movl $KDSEL, %eax /* Kernel data selector */
211 #if defined(COUNT_XINVLTLB_HITS) || defined(COUNT_IPIS)
213 movl $KPSEL, %eax /* Private space selector */
215 movl PCPU(CPUID), %eax
217 #ifdef COUNT_XINVLTLB_HITS
218 incl xhits_pg(,%eax,4)
221 movl ipi_invlpg_counts(,%eax,4),%eax
226 movl smp_tlb_addr1, %eax
227 invlpg (%eax) /* invalidate single page */
230 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */
240 * Page range TLB shootdown.
248 movl $KDSEL, %eax /* Kernel data selector */
251 #if defined(COUNT_XINVLTLB_HITS) || defined(COUNT_IPIS)
253 movl $KPSEL, %eax /* Private space selector */
255 movl PCPU(CPUID), %eax
257 #ifdef COUNT_XINVLTLB_HITS
258 incl xhits_rng(,%eax,4)
261 movl ipi_invlrng_counts(,%eax,4),%eax
266 movl smp_tlb_addr1, %edx
267 movl smp_tlb_addr2, %eax
268 1: invlpg (%edx) /* invalidate single page */
269 addl $PAGE_SIZE, %edx
274 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */
292 movl $KDSEL, %eax /* Kernel data selector */
297 movl $KPSEL, %eax /* Private space selector */
299 movl PCPU(CPUID), %eax
301 movl ipi_invlcache_counts(,%eax,4),%eax
308 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */
318 * Handler for IPIs sent via the per-cpu IPI bitmap.
323 IDTVEC(ipi_intr_bitmap_handler)
329 movl $0, LA_EOI(%edx) /* End Of Interrupt to APIC */
331 FAKE_MCOUNT(TF_EIP(%esp))
333 call ipi_bitmap_handler
338 * Executed by a CPU when it receives an IPI_STOP from another CPU.
348 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */
356 * Executed by a CPU when it receives an IPI_SUSPEND from another CPU.
367 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */
369 call cpususpend_handler
376 * Executed by a CPU when it receives a RENDEZVOUS IPI from another CPU.
378 * - Calls the generic rendezvous action function.
388 movl PCPU(CPUID), %eax
389 movl ipi_rendezvous_counts(,%eax,4), %eax
392 call smp_rendezvous_action
395 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */
400 * Clean up when we lose out on the lazy context switch optimization.
401 * ie: when we are about to release a PTD but a cpu is still borrowing it.
409 call pmap_lazyfix_action
412 movl $0, LA_EOI(%eax) /* End Of Interrupt to APIC */