1 /*****************************************************************************
4 * Random collection of macros and definition
6 * Copyright (c) 2003, 2004 Keir Fraser (on behalf of the Xen team)
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to
11 * deal in the Software without restriction, including without limitation the
12 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
13 * sell copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
22 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
24 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
30 #ifndef _MACHINE_XEN_XEN_OS_H_
31 #define _MACHINE_XEN_XEN_OS_H_
34 #define CONFIG_X86_PAE
37 /* Everything below this point is not included by assembler (.S) files. */
40 /* REP NOP (PAUSE) is a good thing to insert into busy-wait loops. */
41 static inline void rep_nop(void)
43 __asm__ __volatile__ ( "rep;nop" : : : "memory" );
45 #define cpu_relax() rep_nop()
48 void xc_printf(const char *fmt, ...);
53 #include <sys/time.h> /* XXX for pcpu.h */
54 #include <sys/pcpu.h> /* XXX for PCPU_GET */
56 smp_processor_id(void)
58 if (__predict_true(gdtset))
59 return PCPU_GET(cpuid);
64 #define smp_processor_id() 0
68 #define PANIC_IF(exp) if (__predict_false(exp)) {printf("panic - %s: %s:%d\n",#exp, __FILE__, __LINE__); panic("%s: %s:%d", #exp, __FILE__, __LINE__);}
72 * Crude memory allocator for memory allocation early in boot.
74 void *bootmem_alloc(unsigned int size);
75 void bootmem_free(void *ptr, unsigned int size);
78 * STI/CLI equivalents. These basically set and clear the virtual
79 * event_enable flag in the shared_info structure. Note that when
80 * the enable bit is set, there may be pending events to be handled.
81 * We may therefore call into do_hypervisor_callback() directly.
87 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
88 _vcpu->evtchn_upcall_mask = 1; \
96 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
97 _vcpu->evtchn_upcall_mask = 0; \
98 barrier(); /* unmask then check (avoid races) */ \
99 if (__predict_false(_vcpu->evtchn_upcall_pending)) \
100 force_evtchn_callback(); \
103 #define __restore_flags(x) \
105 vcpu_info_t *_vcpu; \
107 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
108 if ((_vcpu->evtchn_upcall_mask = (x)) == 0) { \
109 barrier(); /* unmask then check (avoid races) */ \
110 if (__predict_false(_vcpu->evtchn_upcall_pending)) \
111 force_evtchn_callback(); \
116 * Add critical_{enter, exit}?
119 #define __save_and_cli(x) \
121 vcpu_info_t *_vcpu; \
122 _vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()]; \
123 (x) = _vcpu->evtchn_upcall_mask; \
124 _vcpu->evtchn_upcall_mask = 1; \
129 #define cli() __cli()
130 #define sti() __sti()
131 #define save_flags(x) __save_flags(x)
132 #define restore_flags(x) __restore_flags(x)
133 #define save_and_cli(x) __save_and_cli(x)
135 #define local_irq_save(x) __save_and_cli(x)
136 #define local_irq_restore(x) __restore_flags(x)
137 #define local_irq_disable() __cli()
138 #define local_irq_enable() __sti()
140 #define mtx_lock_irqsave(lock, x) {local_irq_save((x)); mtx_lock_spin((lock));}
141 #define mtx_unlock_irqrestore(lock, x) {mtx_unlock_spin((lock)); local_irq_restore((x)); }
142 #define spin_lock_irqsave mtx_lock_irqsave
143 #define spin_unlock_irqrestore mtx_unlock_irqrestore
147 /* This is a barrier for the compiler only, NOT the processor! */
148 #define barrier() __asm__ __volatile__("": : :"memory")
150 #define LOCK_PREFIX ""
152 #define ADDR (*(volatile long *) addr)
154 * Make sure gcc doesn't try to be clever and move things around
155 * on us. We need to use _exactly_ the address the user gave us,
156 * not some alias that contains the same information.
158 typedef struct { volatile int counter; } atomic_t;
160 #define xen_xchg(ptr,v) \
161 ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
162 struct __xchg_dummy { unsigned long a[100]; };
163 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
164 static __inline unsigned long __xchg(unsigned long x, volatile void * ptr,
169 __asm__ __volatile__("xchgb %b0,%1"
171 :"m" (*__xg(ptr)), "0" (x)
175 __asm__ __volatile__("xchgw %w0,%1"
177 :"m" (*__xg(ptr)), "0" (x)
181 __asm__ __volatile__("xchgl %0,%1"
183 :"m" (*__xg(ptr)), "0" (x)
191 * test_and_clear_bit - Clear a bit and return its old value
193 * @addr: Address to count from
195 * This operation is atomic and cannot be reordered.
196 * It also implies a memory barrier.
198 static __inline int test_and_clear_bit(int nr, volatile void * addr)
202 __asm__ __volatile__( LOCK_PREFIX
203 "btrl %2,%1\n\tsbbl %0,%0"
204 :"=r" (oldbit),"=m" (ADDR)
205 :"Ir" (nr) : "memory");
209 static __inline int constant_test_bit(int nr, const volatile void * addr)
211 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
214 static __inline int variable_test_bit(int nr, volatile void * addr)
218 __asm__ __volatile__(
219 "btl %2,%1\n\tsbbl %0,%0"
221 :"m" (ADDR),"Ir" (nr));
225 #define test_bit(nr,addr) \
226 (__builtin_constant_p(nr) ? \
227 constant_test_bit((nr),(addr)) : \
228 variable_test_bit((nr),(addr)))
232 * set_bit - Atomically set a bit in memory
233 * @nr: the bit to set
234 * @addr: the address to start counting from
236 * This function is atomic and may not be reordered. See __set_bit()
237 * if you do not require the atomic guarantees.
238 * Note that @nr may be almost arbitrarily large; this function is not
239 * restricted to acting on a single-word quantity.
241 static __inline__ void set_bit(int nr, volatile void * addr)
243 __asm__ __volatile__( LOCK_PREFIX
250 * clear_bit - Clears a bit in memory
252 * @addr: Address to start counting from
254 * clear_bit() is atomic and may not be reordered. However, it does
255 * not contain a memory barrier, so if it is used for locking purposes,
256 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
257 * in order to ensure changes are visible on other processors.
259 static __inline__ void clear_bit(int nr, volatile void * addr)
261 __asm__ __volatile__( LOCK_PREFIX
268 * atomic_inc - increment atomic variable
269 * @v: pointer of type atomic_t
271 * Atomically increments @v by 1. Note that the guaranteed
272 * useful range of an atomic_t is only 24 bits.
274 static __inline__ void atomic_inc(atomic_t *v)
276 __asm__ __volatile__(
283 #define rdtscll(val) \
284 __asm__ __volatile__("rdtsc" : "=A" (val))
286 #endif /* !__ASSEMBLY__ */
288 #endif /* _MACHINE_XEN_XEN_OS_H_ */