2 * Copyright (c) 2001 Jake Burkholder.
3 * Copyright (c) 2011 Marius Strobl <marius@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #ifndef _MACHINE_ASMACROS_H_
31 #define _MACHINE_ASMACROS_H_
36 * Normal and alternate %g6 point to the pcb of the current process. Normal,
37 * alternate and interrupt %g7 point to per-cpu data.
43 * Alternate %g5 points to a per-cpu panic stack, which is used as a last
44 * resort, and for temporarily saving alternate globals.
51 * Atomically decrement an integer in memory.
53 #define ATOMIC_DEC_INT(r1, r2, r3) \
56 casa [r1] ASI_N, r2, r3 ; \
62 * Atomically increment an integer in memory.
64 #define ATOMIC_INC_INT(r1, r2, r3) \
67 casa [r1] ASI_N, r2, r3 ; \
73 * Atomically increment a long in memory.
75 #define ATOMIC_INC_LONG(r1, r2, r3) \
78 casxa [r1] ASI_N, r2, r3 ; \
84 * Atomically clear a number of bits of an integer in memory.
86 #define ATOMIC_CLEAR_INT(r1, r2, r3, bits) \
88 9: andn r2, bits, r3 ; \
89 casa [r1] ASI_N, r2, r3 ; \
95 * Atomically clear a number of bits of a long in memory.
97 #define ATOMIC_CLEAR_LONG(r1, r2, r3, bits) \
99 9: andn r2, bits, r3 ; \
100 casxa [r1] ASI_N, r2, r3 ; \
106 * Atomically load an integer from memory.
108 #define ATOMIC_LOAD_INT(r1, val) \
110 casa [r1] ASI_N, %g0, val
113 * Atomically load a long from memory.
115 #define ATOMIC_LOAD_LONG(r1, val) \
117 casxa [r1] ASI_N, %g0, val
120 * Atomically set a number of bits of an integer in memory.
122 #define ATOMIC_SET_INT(r1, r2, r3, bits) \
124 9: or r2, bits, r3 ; \
125 casa [r1] ASI_N, r2, r3 ; \
131 * Atomically set a number of bits of a long in memory.
133 #define ATOMIC_SET_LONG(r1, r2, r3, bits) \
135 9: or r2, bits, r3 ; \
136 casxa [r1] ASI_N, r2, r3 ; \
142 * Atomically store an integer in memory.
144 #define ATOMIC_STORE_INT(r1, r2, r3, val) \
147 casa [r1] ASI_N, r2, r3 ; \
153 * Atomically store a long in memory.
155 #define ATOMIC_STORE_LONG(r1, r2, r3, val) \
158 casxa [r1] ASI_N, r2, r3 ; \
163 #define PCPU(member) PCPU_REG + PC_ ## member
164 #define PCPU_ADDR(member, reg) \
165 add PCPU_REG, PC_ ## member, reg
170 #define PANIC(msg, r1) \
179 #define KASSERT(r1, msg) \
185 #define KASSERT(r1, msg)
188 #define PUTS(msg, r1) \
196 #define _ALIGN_DATA .align 8
202 .type name, @object ; \
208 * Generate atomic compare and swap, load and store instructions for the
209 * corresponding width and ASI (or not). Note that we want to evaluate the
210 * macro args before concatenating, so that EMPTY really turns into nothing.
212 #define _LD(w, a) ld ## w ## a
213 #define _ST(w, a) st ## w ## a
214 #define _CAS(w, a) cas ## w ## a
216 #define LD(w, a) _LD(w, a)
217 #define ST(w, a) _ST(w, a)
218 #define CAS(w, a) _CAS(w, a)
224 #endif /* !_MACHINE_ASMACROS_H_ */