2 * Copyright (c) 2003 Peter Wemm.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
7 * This code is derived from software contributed to Berkeley by
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_atpic.h"
46 #include "opt_compat.h"
52 #include "opt_kstack_pages.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include <sys/param.h>
59 #include <sys/systm.h>
63 #include <sys/callout.h>
64 #include <sys/clock.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
87 #include <sys/ucontext.h>
88 #include <sys/vmmeter.h>
91 #include <vm/vm_extern.h>
92 #include <vm/vm_kern.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_map.h>
95 #include <vm/vm_object.h>
96 #include <vm/vm_pager.h>
97 #include <vm/vm_param.h>
101 #error KDB must be enabled in order for DDB to work!
106 #include <net/netisr.h>
108 #include <machine/clock.h>
109 #include <machine/cpu.h>
110 #include <machine/cputypes.h>
111 #include <machine/intr_machdep.h>
112 #include <machine/md_var.h>
113 #include <machine/metadata.h>
114 #include <machine/pc/bios.h>
115 #include <machine/pcb.h>
116 #include <machine/proc.h>
117 #include <machine/reg.h>
118 #include <machine/sigframe.h>
119 #include <machine/specialreg.h>
121 #include <machine/perfmon.h>
123 #include <machine/tss.h>
125 #include <machine/smp.h>
129 #include <amd64/isa/icu.h>
131 #include <machine/apicvar.h>
134 #include <isa/isareg.h>
137 /* Sanity check for __curthread() */
138 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
140 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
142 extern void printcpuinfo(void); /* XXX header file */
143 extern void identify_cpu(void);
144 extern void panicifcpuunsupported(void);
146 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
147 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
149 static void cpu_startup(void *);
150 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
151 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
152 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
155 extern vm_offset_t ksym_start, ksym_end;
158 /* Intel ICH registers */
159 #define ICH_PMBASE 0x400
160 #define ICH_SMI_EN ICH_PMBASE + 0x30
162 int _udatasel, _ucodesel, _ucode32sel;
170 * The number of PHYSMAP entries must be one less than the number of
171 * PHYSSEG entries because the PHYSMAP entry that spans the largest
172 * physical address that is accessible by ISA DMA is split into two
175 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
177 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
178 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
180 /* must be 2 less so 0 0 can signal end of chunks */
181 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
182 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
184 struct kva_md_info kmi;
186 static struct trapframe proc0_tf;
187 struct region_descriptor r_gdt, r_idt;
189 struct pcpu __pcpu[MAXCPU];
193 struct mem_range_softc mem_range_softc;
202 * On MacBooks, we need to disallow the legacy USB circuit to
203 * generate an SMI# because this can cause several problems,
204 * namely: incorrect CPU frequency detection and failure to
206 * We do this by disabling a bit in the SMI_EN (SMI Control and
207 * Enable register) of the Intel ICH LPC Interface Bridge.
209 sysenv = getenv("smbios.system.product");
210 if (sysenv != NULL) {
211 if (strncmp(sysenv, "MacBook", 7) == 0) {
213 printf("Disabling LEGACY_USB_EN bit on "
215 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
221 * Good {morning,afternoon,evening,night}.
225 panicifcpuunsupported();
229 printf("usable memory = %ju (%ju MB)\n", ptoa((uintmax_t)physmem),
230 ptoa((uintmax_t)physmem) / 1048576);
233 * Display any holes after the first chunk of extended memory.
238 printf("Physical memory chunk(s):\n");
239 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
242 size = phys_avail[indx + 1] - phys_avail[indx];
244 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
245 (uintmax_t)phys_avail[indx],
246 (uintmax_t)phys_avail[indx + 1] - 1,
247 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
251 vm_ksubmap_init(&kmi);
253 printf("avail memory = %ju (%ju MB)\n",
254 ptoa((uintmax_t)cnt.v_free_count),
255 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
258 * Set up buffers, so they can be used to read disk labels.
261 vm_pager_bufferinit();
267 * Send an interrupt to process.
269 * Stack is set up to allow sigcode stored
270 * at top to call routine, followed by kcall
271 * to sigreturn routine below. After sigreturn
272 * resets the signal mask, the stack, and the
273 * frame pointer, it returns to the user
277 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
279 struct sigframe sf, *sfp;
284 struct trapframe *regs;
290 PROC_LOCK_ASSERT(p, MA_OWNED);
291 sig = ksi->ksi_signo;
293 mtx_assert(&psp->ps_mtx, MA_OWNED);
295 oonstack = sigonstack(regs->tf_rsp);
297 /* Save user context. */
298 bzero(&sf, sizeof(sf));
299 sf.sf_uc.uc_sigmask = *mask;
300 sf.sf_uc.uc_stack = td->td_sigstk;
301 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
302 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
303 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
304 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(*regs));
305 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
306 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
309 /* Allocate space for the signal handler context. */
310 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
311 SIGISMEMBER(psp->ps_sigonstack, sig)) {
312 sp = td->td_sigstk.ss_sp +
313 td->td_sigstk.ss_size - sizeof(struct sigframe);
314 #if defined(COMPAT_43)
315 td->td_sigstk.ss_flags |= SS_ONSTACK;
318 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
319 /* Align to 16 bytes. */
320 sfp = (struct sigframe *)((unsigned long)sp & ~0xFul);
322 /* Translate the signal if appropriate. */
323 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
324 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
326 /* Build the argument list for the signal handler. */
327 regs->tf_rdi = sig; /* arg 1 in %rdi */
328 regs->tf_rdx = (register_t)&sfp->sf_uc; /* arg 3 in %rdx */
329 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
330 /* Signal handler installed with SA_SIGINFO. */
331 regs->tf_rsi = (register_t)&sfp->sf_si; /* arg 2 in %rsi */
332 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
334 /* Fill in POSIX parts */
335 sf.sf_si = ksi->ksi_info;
336 sf.sf_si.si_signo = sig; /* maybe a translated signal */
337 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
339 /* Old FreeBSD-style arguments. */
340 regs->tf_rsi = ksi->ksi_code; /* arg 2 in %rsi */
341 regs->tf_rcx = (register_t)ksi->ksi_addr; /* arg 4 in %rcx */
342 sf.sf_ahu.sf_handler = catcher;
344 mtx_unlock(&psp->ps_mtx);
348 * Copy the sigframe out to the user's stack.
350 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
352 printf("process %ld has trashed its stack\n", (long)p->p_pid);
358 regs->tf_rsp = (long)sfp;
359 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
360 regs->tf_rflags &= ~(PSL_T | PSL_D);
361 regs->tf_cs = _ucodesel;
363 mtx_lock(&psp->ps_mtx);
367 * System call to cleanup state after a signal
368 * has been taken. Reset signal mask and
369 * stack state from context left by sendsig (above).
370 * Return to previous pc and psl as specified by
371 * context left by sendsig. Check carefully to
372 * make sure that the user has not modified the
373 * state to gain improper privileges.
380 struct sigreturn_args /* {
381 const struct __ucontext *sigcntxp;
385 struct proc *p = td->td_proc;
386 struct trapframe *regs;
387 const ucontext_t *ucp;
392 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
397 rflags = ucp->uc_mcontext.mc_rflags;
399 * Don't allow users to change privileged or reserved flags.
402 * XXX do allow users to change the privileged flag PSL_RF.
403 * The cpu sets PSL_RF in tf_rflags for faults. Debuggers
404 * should sometimes set it there too. tf_rflags is kept in
405 * the signal context during signal handling and there is no
406 * other place to remember it, so the PSL_RF bit may be
407 * corrupted by the signal handler without us knowing.
408 * Corruption of the PSL_RF bit at worst causes one more or
409 * one less debugger trap, so allowing it is fairly harmless.
411 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
412 printf("sigreturn: rflags = 0x%lx\n", rflags);
417 * Don't allow users to load a valid privileged %cs. Let the
418 * hardware check for invalid selectors, excess privilege in
419 * other selectors, invalid %eip's and invalid %esp's.
421 cs = ucp->uc_mcontext.mc_cs;
422 if (!CS_SECURE(cs)) {
423 printf("sigreturn: cs = 0x%x\n", cs);
424 ksiginfo_init_trap(&ksi);
425 ksi.ksi_signo = SIGBUS;
426 ksi.ksi_code = BUS_OBJERR;
427 ksi.ksi_trapno = T_PROTFLT;
428 ksi.ksi_addr = (void *)regs->tf_rip;
429 trapsignal(td, &ksi);
433 ret = set_fpcontext(td, &ucp->uc_mcontext);
436 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(*regs));
439 #if defined(COMPAT_43)
440 if (ucp->uc_mcontext.mc_onstack & 1)
441 td->td_sigstk.ss_flags |= SS_ONSTACK;
443 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
446 td->td_sigmask = ucp->uc_sigmask;
447 SIG_CANTMASK(td->td_sigmask);
450 td->td_pcb->pcb_flags |= PCB_FULLCTX;
451 return (EJUSTRETURN);
454 #ifdef COMPAT_FREEBSD4
456 freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap)
459 return sigreturn(td, (struct sigreturn_args *)uap);
465 * Machine dependent boot() routine
467 * I haven't seen anything to put here yet
468 * Possibly some stuff might be grafted back here from boot()
475 /* Get current clock frequency for the given cpu id. */
477 cpu_est_clockrate(int cpu_id, uint64_t *rate)
482 if (pcpu_find(cpu_id) == NULL || rate == NULL)
485 /* If we're booting, trust the rate calibrated moments ago. */
492 /* Schedule ourselves on the indicated cpu. */
493 thread_lock(curthread);
494 sched_bind(curthread, cpu_id);
495 thread_unlock(curthread);
498 /* Calibrate by measuring a short delay. */
499 reg = intr_disable();
506 thread_lock(curthread);
507 sched_unbind(curthread);
508 thread_unlock(curthread);
512 * Calculate the difference in readings, convert to Mhz, and
513 * subtract 0.5% of the total. Empirical testing has shown that
514 * overhead in DELAY() works out to approximately this value.
517 *rate = tsc2 * 1000 - tsc2 * 5;
522 * Shutdown the CPU as much as possible
532 * Hook to idle the CPU when possible. In the SMP case we default to
533 * off because a halted cpu will not currently pick up a new thread in the
534 * run queue until the next timer tick. If turned on this will result in
535 * approximately a 4.2% loss in real time performance in buildworld tests
536 * (but improves user and sys times oddly enough), and saves approximately
537 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
539 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
540 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
541 * Then we can have our cake and eat it too.
543 * XXX I'm turning it on for SMP as well by default for now. It seems to
544 * help lock contention somewhat, and this is critical for HTT. -Peter
546 static int cpu_idle_hlt = 1;
547 TUNABLE_INT("machdep.cpu_idle_hlt", &cpu_idle_hlt);
548 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
549 &cpu_idle_hlt, 0, "Idle loop HLT enable");
552 cpu_idle_default(void)
555 * we must absolutely guarentee that hlt is the
556 * absolute next instruction after sti or we
557 * introduce a timing window.
559 __asm __volatile("sti; hlt");
563 * Note that we have to be careful here to avoid a race between checking
564 * sched_runnable() and actually halting. If we don't do this, we may waste
565 * the time between calling hlt and the next interrupt even though there
566 * is a runnable process.
573 if (mp_grab_cpu_hlt())
578 if (sched_runnable())
585 /* Other subsystems (e.g., ACPI) can hook this later. */
586 void (*cpu_idle_hook)(void) = cpu_idle_default;
589 * Reset registers to default values on exec.
592 exec_setregs(td, entry, stack, ps_strings)
598 struct trapframe *regs = td->td_frame;
599 struct pcb *pcb = td->td_pcb;
602 wrmsr(MSR_FSBASE, 0);
603 wrmsr(MSR_KGSBASE, 0); /* User value while we're in the kernel */
607 pcb->pcb_flags &= ~(PCB_32BIT | PCB_GS32BIT);
612 pcb->pcb_ds = _udatasel;
613 pcb->pcb_es = _udatasel;
614 pcb->pcb_fs = _udatasel;
615 pcb->pcb_gs = _udatasel;
616 pcb->pcb_initial_fpucw = __INITIAL_FPUCW__;
618 bzero((char *)regs, sizeof(struct trapframe));
619 regs->tf_rip = entry;
620 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8;
621 regs->tf_rdi = stack; /* argv */
622 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
623 regs->tf_ss = _udatasel;
624 regs->tf_cs = _ucodesel;
627 * Reset the hardware debug registers if they were in use.
628 * They won't have any meaning for the newly exec'd process.
630 if (pcb->pcb_flags & PCB_DBREGS) {
637 if (pcb == PCPU_GET(curpcb)) {
639 * Clear the debug registers on the running
640 * CPU, otherwise they will end up affecting
641 * the next process we switch to.
645 pcb->pcb_flags &= ~PCB_DBREGS;
649 * Drop the FP state if we hold it, so that the process gets a
650 * clean FP state if it uses the FPU again.
662 * CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
663 * BSP. See the comments there about why we set them.
665 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
670 * Initialize amd64 and configure to run kernel
674 * Initialize segments & interrupt table
677 struct user_segment_descriptor gdt[NGDT * MAXCPU];/* global descriptor tables */
678 static struct gate_descriptor idt0[NIDT];
679 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
681 static char dblfault_stack[PAGE_SIZE] __aligned(16);
683 struct amd64tss common_tss[MAXCPU];
685 /* software prototypes -- in more palatable form */
686 struct soft_segment_descriptor gdt_segs[] = {
687 /* GNULL_SEL 0 Null Descriptor */
688 { 0x0, /* segment base address */
690 0, /* segment type */
691 0, /* segment descriptor priority level */
692 0, /* segment descriptor present */
694 0, /* default 32 vs 16 bit size */
695 0 /* limit granularity (byte/page units)*/ },
696 /* GCODE_SEL 1 Code Descriptor for kernel */
697 { 0x0, /* segment base address */
698 0xfffff, /* length - all address space */
699 SDT_MEMERA, /* segment type */
700 SEL_KPL, /* segment descriptor priority level */
701 1, /* segment descriptor present */
703 0, /* default 32 vs 16 bit size */
704 1 /* limit granularity (byte/page units)*/ },
705 /* GDATA_SEL 2 Data Descriptor for kernel */
706 { 0x0, /* segment base address */
707 0xfffff, /* length - all address space */
708 SDT_MEMRWA, /* segment type */
709 SEL_KPL, /* segment descriptor priority level */
710 1, /* segment descriptor present */
712 0, /* default 32 vs 16 bit size */
713 1 /* limit granularity (byte/page units)*/ },
714 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
715 { 0x0, /* segment base address */
716 0xfffff, /* length - all address space */
717 SDT_MEMERA, /* segment type */
718 SEL_UPL, /* segment descriptor priority level */
719 1, /* segment descriptor present */
721 1, /* default 32 vs 16 bit size */
722 1 /* limit granularity (byte/page units)*/ },
723 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
724 { 0x0, /* segment base address */
725 0xfffff, /* length - all address space */
726 SDT_MEMRWA, /* segment type */
727 SEL_UPL, /* segment descriptor priority level */
728 1, /* segment descriptor present */
730 1, /* default 32 vs 16 bit size */
731 1 /* limit granularity (byte/page units)*/ },
732 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
733 { 0x0, /* segment base address */
734 0xfffff, /* length - all address space */
735 SDT_MEMERA, /* segment type */
736 SEL_UPL, /* segment descriptor priority level */
737 1, /* segment descriptor present */
739 0, /* default 32 vs 16 bit size */
740 1 /* limit granularity (byte/page units)*/ },
741 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
743 0x0, /* segment base address */
744 sizeof(struct amd64tss)-1,/* length */
745 SDT_SYSTSS, /* segment type */
746 SEL_KPL, /* segment descriptor priority level */
747 1, /* segment descriptor present */
749 0, /* unused - default 32 vs 16 bit size */
750 0 /* limit granularity (byte/page units)*/ },
751 /* Actually, the TSS is a system descriptor which is double size */
752 { 0x0, /* segment base address */
754 0, /* segment type */
755 0, /* segment descriptor priority level */
756 0, /* segment descriptor present */
758 0, /* default 32 vs 16 bit size */
759 0 /* limit granularity (byte/page units)*/ },
760 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
761 { 0x0, /* segment base address */
762 0xfffff, /* length - all address space */
763 SDT_MEMRWA, /* segment type */
764 SEL_UPL, /* segment descriptor priority level */
765 1, /* segment descriptor present */
767 1, /* default 32 vs 16 bit size */
768 1 /* limit granularity (byte/page units)*/ },
772 setidt(idx, func, typ, dpl, ist)
779 struct gate_descriptor *ip;
782 ip->gd_looffset = (uintptr_t)func;
783 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
789 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
793 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
794 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
795 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
796 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
797 IDTVEC(xmm), IDTVEC(dblfault),
798 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
802 struct user_segment_descriptor *sd;
803 struct soft_segment_descriptor *ssd;
806 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
807 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
808 ssd->ssd_type = sd->sd_type;
809 ssd->ssd_dpl = sd->sd_dpl;
810 ssd->ssd_p = sd->sd_p;
811 ssd->ssd_long = sd->sd_long;
812 ssd->ssd_def32 = sd->sd_def32;
813 ssd->ssd_gran = sd->sd_gran;
818 struct soft_segment_descriptor *ssd;
819 struct user_segment_descriptor *sd;
822 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
823 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
824 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
825 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
826 sd->sd_type = ssd->ssd_type;
827 sd->sd_dpl = ssd->ssd_dpl;
828 sd->sd_p = ssd->ssd_p;
829 sd->sd_long = ssd->ssd_long;
830 sd->sd_def32 = ssd->ssd_def32;
831 sd->sd_gran = ssd->ssd_gran;
836 struct soft_segment_descriptor *ssd;
837 struct system_segment_descriptor *sd;
840 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
841 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
842 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
843 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
844 sd->sd_type = ssd->ssd_type;
845 sd->sd_dpl = ssd->ssd_dpl;
846 sd->sd_p = ssd->ssd_p;
847 sd->sd_gran = ssd->ssd_gran;
850 #if !defined(DEV_ATPIC) && defined(DEV_ISA)
851 #include <isa/isavar.h>
853 isa_irq_pending(void)
863 * Populate the (physmap) array with base/bound pairs describing the
864 * available physical memory in the system, then test this memory and
865 * build the phys_avail array describing the actually-available memory.
867 * If we cannot accurately determine the physical memory map, then use
868 * value from the 0xE801 call, and failing that, the RTC.
870 * Total memory size may be set by the kernel environment variable
871 * hw.physmem or the compile-time define MAXMEM.
873 * XXX first should be vm_paddr_t.
876 getmemsize(caddr_t kmdp, u_int64_t first)
878 int i, off, physmap_idx, pa_indx, da_indx;
879 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
880 u_long physmem_tunable;
882 struct bios_smap *smapbase, *smap, *smapend;
884 quad_t dcons_addr, dcons_size;
886 bzero(physmap, sizeof(physmap));
891 * get memory map from INT 15:E820, kindly supplied by the loader.
893 * subr_module.c says:
894 * "Consumer may safely assume that size value precedes data."
895 * ie: an int32_t immediately precedes smap.
897 smapbase = (struct bios_smap *)preload_search_info(kmdp,
898 MODINFO_METADATA | MODINFOMD_SMAP);
899 if (smapbase == NULL)
900 panic("No BIOS smap info from loader!");
902 smapsize = *((u_int32_t *)smapbase - 1);
903 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
905 for (smap = smapbase; smap < smapend; smap++) {
906 if (boothowto & RB_VERBOSE)
907 printf("SMAP type=%02x base=%016lx len=%016lx\n",
908 smap->type, smap->base, smap->length);
910 if (smap->type != SMAP_TYPE_MEMORY)
913 if (smap->length == 0)
916 for (i = 0; i <= physmap_idx; i += 2) {
917 if (smap->base < physmap[i + 1]) {
918 if (boothowto & RB_VERBOSE)
920 "Overlapping or non-monotonic memory region, ignoring second region\n");
925 if (smap->base == physmap[physmap_idx + 1]) {
926 physmap[physmap_idx + 1] += smap->length;
931 if (physmap_idx == PHYSMAP_SIZE) {
933 "Too many segments in the physical address map, giving up\n");
936 physmap[physmap_idx] = smap->base;
937 physmap[physmap_idx + 1] = smap->base + smap->length;
941 * Find the 'base memory' segment for SMP
944 for (i = 0; i <= physmap_idx; i += 2) {
945 if (physmap[i] == 0x00000000) {
946 basemem = physmap[i + 1] / 1024;
951 panic("BIOS smap did not include a basemem segment!");
954 /* make hole for AP bootstrap code */
955 physmap[1] = mp_bootaddress(physmap[1] / 1024);
959 * Maxmem isn't the "maximum memory", it's one larger than the
960 * highest page of the physical address space. It should be
961 * called something like "Maxphyspage". We may adjust this
962 * based on ``hw.physmem'' and the results of the memory test.
964 Maxmem = atop(physmap[physmap_idx + 1]);
970 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
971 Maxmem = atop(physmem_tunable);
974 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
977 if (Maxmem > atop(physmap[physmap_idx + 1]))
978 Maxmem = atop(physmap[physmap_idx + 1]);
980 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
981 (boothowto & RB_VERBOSE))
982 printf("Physical memory use set to %ldK\n", Maxmem * 4);
984 /* call pmap initialization to make new kernel address space */
985 pmap_bootstrap(&first);
988 * Size up each available chunk of physical memory.
990 physmap[0] = PAGE_SIZE; /* mask off page 0 */
993 phys_avail[pa_indx++] = physmap[0];
994 phys_avail[pa_indx] = physmap[0];
995 dump_avail[da_indx] = physmap[0];
999 * Get dcons buffer address
1001 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1002 getenv_quad("dcons.size", &dcons_size) == 0)
1006 * physmap is in bytes, so when converting to page boundaries,
1007 * round up the start address and round down the end address.
1009 for (i = 0; i <= physmap_idx; i += 2) {
1012 end = ptoa((vm_paddr_t)Maxmem);
1013 if (physmap[i + 1] < end)
1014 end = trunc_page(physmap[i + 1]);
1015 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1016 int tmp, page_bad, full;
1017 int *ptr = (int *)CADDR1;
1021 * block out kernel memory as not available.
1023 if (pa >= 0x100000 && pa < first)
1027 * block out dcons buffer
1030 && pa >= trunc_page(dcons_addr)
1031 && pa < dcons_addr + dcons_size)
1037 * map page into kernel: valid, read/write,non-cacheable
1039 *pte = pa | PG_V | PG_RW | PG_N;
1044 * Test for alternating 1's and 0's
1046 *(volatile int *)ptr = 0xaaaaaaaa;
1047 if (*(volatile int *)ptr != 0xaaaaaaaa)
1050 * Test for alternating 0's and 1's
1052 *(volatile int *)ptr = 0x55555555;
1053 if (*(volatile int *)ptr != 0x55555555)
1058 *(volatile int *)ptr = 0xffffffff;
1059 if (*(volatile int *)ptr != 0xffffffff)
1064 *(volatile int *)ptr = 0x0;
1065 if (*(volatile int *)ptr != 0x0)
1068 * Restore original value.
1073 * Adjust array of valid/good pages.
1075 if (page_bad == TRUE)
1078 * If this good page is a continuation of the
1079 * previous set of good pages, then just increase
1080 * the end pointer. Otherwise start a new chunk.
1081 * Note that "end" points one higher than end,
1082 * making the range >= start and < end.
1083 * If we're also doing a speculative memory
1084 * test and we at or past the end, bump up Maxmem
1085 * so that we keep going. The first bad page
1086 * will terminate the loop.
1088 if (phys_avail[pa_indx] == pa) {
1089 phys_avail[pa_indx] += PAGE_SIZE;
1092 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1094 "Too many holes in the physical address space, giving up\n");
1099 phys_avail[pa_indx++] = pa; /* start */
1100 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1104 if (dump_avail[da_indx] == pa) {
1105 dump_avail[da_indx] += PAGE_SIZE;
1108 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1112 dump_avail[da_indx++] = pa; /* start */
1113 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1125 * The last chunk must contain at least one page plus the message
1126 * buffer to avoid complicating other code (message buffer address
1127 * calculation, etc.).
1129 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1130 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1131 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1132 phys_avail[pa_indx--] = 0;
1133 phys_avail[pa_indx--] = 0;
1136 Maxmem = atop(phys_avail[pa_indx]);
1138 /* Trim off space for the message buffer. */
1139 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1141 /* Map the message buffer. */
1142 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1143 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1148 hammer_time(u_int64_t modulep, u_int64_t physfree)
1156 thread0.td_kstack = physfree + KERNBASE;
1157 bzero((void *)thread0.td_kstack, KSTACK_PAGES * PAGE_SIZE);
1158 physfree += KSTACK_PAGES * PAGE_SIZE;
1159 thread0.td_pcb = (struct pcb *)
1160 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
1163 * This may be done better later if it gets more high level
1164 * components in it. If so just link td->td_proc here.
1166 proc_linkup0(&proc0, &thread0);
1168 preload_metadata = (caddr_t)(uintptr_t)(modulep + KERNBASE);
1169 preload_bootstrap_relocate(KERNBASE);
1170 kmdp = preload_search_by_type("elf kernel");
1172 kmdp = preload_search_by_type("elf64 kernel");
1173 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1174 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + KERNBASE;
1176 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1177 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1180 /* Init basic tunables, hz etc */
1184 * make gdt memory segments
1186 gdt_segs[GPROC0_SEL].ssd_base = (uintptr_t)&common_tss[0];
1188 for (x = 0; x < NGDT; x++) {
1189 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1190 ssdtosd(&gdt_segs[x], &gdt[x]);
1192 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1193 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1195 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1196 r_gdt.rd_base = (long) gdt;
1200 wrmsr(MSR_FSBASE, 0); /* User value */
1201 wrmsr(MSR_GSBASE, (u_int64_t)pc);
1202 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1204 pcpu_init(pc, 0, sizeof(struct pcpu));
1205 PCPU_SET(prvspace, pc);
1206 PCPU_SET(curthread, &thread0);
1207 PCPU_SET(curpcb, thread0.td_pcb);
1208 PCPU_SET(tssp, &common_tss[0]);
1209 PCPU_SET(gs32p, &gdt[GUGS32_SEL]);
1212 * Initialize mutexes.
1214 * icu_lock: in order to allow an interrupt to occur in a critical
1215 * section, to set pcpu->ipending (etc...) properly, we
1216 * must be able to get the icu lock, so it can't be
1220 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
1223 for (x = 0; x < NIDT; x++)
1224 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1225 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1226 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1227 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1228 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1229 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1230 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1231 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1232 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1233 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1234 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1235 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1236 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1237 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1238 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1239 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1240 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1241 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1242 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1243 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1245 r_idt.rd_limit = sizeof(idt0) - 1;
1246 r_idt.rd_base = (long) idt;
1250 * Initialize the i8254 before the console so that console
1251 * initialization can use DELAY().
1256 * Initialize the console before we print anything out.
1265 /* Reset and mask the atpics and leave them shut down. */
1269 * Point the ICU spurious interrupt vectors at the APIC spurious
1270 * interrupt handler.
1272 setidt(IDT_IO_INTS + 7, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1273 setidt(IDT_IO_INTS + 15, IDTVEC(spuriousint), SDT_SYSIGT, SEL_KPL, 0);
1276 #error "have you forgotten the isa device?";
1282 if (boothowto & RB_KDB)
1283 kdb_enter_why(KDB_WHY_BOOTFLAGS,
1284 "Boot flags requested debugger");
1287 identify_cpu(); /* Final stage of CPU initialization */
1288 initializecpu(); /* Initialize CPU registers */
1290 /* make an initial tss so cpu can get interrupt stack on syscall! */
1291 common_tss[0].tss_rsp0 = thread0.td_kstack + \
1292 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb);
1293 /* Ensure the stack is aligned to 16 bytes */
1294 common_tss[0].tss_rsp0 &= ~0xFul;
1295 PCPU_SET(rsp0, common_tss[0].tss_rsp0);
1297 /* doublefault stack space, runs on ist1 */
1298 common_tss[0].tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1300 /* Set the IO permission bitmap (empty due to tss seg limit) */
1301 common_tss[0].tss_iobase = sizeof(struct amd64tss);
1303 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1306 /* Set up the fast syscall stuff */
1307 msr = rdmsr(MSR_EFER) | EFER_SCE;
1308 wrmsr(MSR_EFER, msr);
1309 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1310 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1311 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1312 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1313 wrmsr(MSR_STAR, msr);
1314 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1316 getmemsize(kmdp, physfree);
1317 init_param2(physmem);
1319 /* now running on new page tables, configured,and u/iom is accessible */
1321 msgbufinit(msgbufp, MSGBUF_SIZE);
1324 /* transfer to user mode */
1326 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1327 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1328 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1330 /* setup proc 0's pcb */
1331 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
1332 thread0.td_pcb->pcb_cr3 = KPML4phys;
1333 thread0.td_frame = &proc0_tf;
1335 env = getenv("kernelname");
1337 strlcpy(kernelname, env, sizeof(kernelname));
1339 /* Location of kernel stack for locore */
1340 return ((u_int64_t)thread0.td_pcb);
1344 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
1347 pcpu->pc_acpi_id = 0xffffffff;
1351 spinlock_enter(void)
1356 if (td->td_md.md_spinlock_count == 0)
1357 td->td_md.md_saved_flags = intr_disable();
1358 td->td_md.md_spinlock_count++;
1369 td->td_md.md_spinlock_count--;
1370 if (td->td_md.md_spinlock_count == 0)
1371 intr_restore(td->td_md.md_saved_flags);
1375 * Construct a PCB from a trapframe. This is called from kdb_trap() where
1376 * we want to start a backtrace from the function that caused us to enter
1377 * the debugger. We have the context in the trapframe, but base the trace
1378 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
1379 * enough for a backtrace.
1382 makectx(struct trapframe *tf, struct pcb *pcb)
1385 pcb->pcb_r12 = tf->tf_r12;
1386 pcb->pcb_r13 = tf->tf_r13;
1387 pcb->pcb_r14 = tf->tf_r14;
1388 pcb->pcb_r15 = tf->tf_r15;
1389 pcb->pcb_rbp = tf->tf_rbp;
1390 pcb->pcb_rbx = tf->tf_rbx;
1391 pcb->pcb_rip = tf->tf_rip;
1392 pcb->pcb_rsp = (ISPL(tf->tf_cs)) ? tf->tf_rsp : (long)(tf + 1) - 8;
1396 ptrace_set_pc(struct thread *td, unsigned long addr)
1398 td->td_frame->tf_rip = addr;
1403 ptrace_single_step(struct thread *td)
1405 td->td_frame->tf_rflags |= PSL_T;
1410 ptrace_clear_single_step(struct thread *td)
1412 td->td_frame->tf_rflags &= ~PSL_T;
1417 fill_regs(struct thread *td, struct reg *regs)
1419 struct trapframe *tp;
1422 regs->r_r15 = tp->tf_r15;
1423 regs->r_r14 = tp->tf_r14;
1424 regs->r_r13 = tp->tf_r13;
1425 regs->r_r12 = tp->tf_r12;
1426 regs->r_r11 = tp->tf_r11;
1427 regs->r_r10 = tp->tf_r10;
1428 regs->r_r9 = tp->tf_r9;
1429 regs->r_r8 = tp->tf_r8;
1430 regs->r_rdi = tp->tf_rdi;
1431 regs->r_rsi = tp->tf_rsi;
1432 regs->r_rbp = tp->tf_rbp;
1433 regs->r_rbx = tp->tf_rbx;
1434 regs->r_rdx = tp->tf_rdx;
1435 regs->r_rcx = tp->tf_rcx;
1436 regs->r_rax = tp->tf_rax;
1437 regs->r_rip = tp->tf_rip;
1438 regs->r_cs = tp->tf_cs;
1439 regs->r_rflags = tp->tf_rflags;
1440 regs->r_rsp = tp->tf_rsp;
1441 regs->r_ss = tp->tf_ss;
1446 set_regs(struct thread *td, struct reg *regs)
1448 struct trapframe *tp;
1452 rflags = regs->r_rflags & 0xffffffff;
1453 if (!EFL_SECURE(rflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
1455 tp->tf_r15 = regs->r_r15;
1456 tp->tf_r14 = regs->r_r14;
1457 tp->tf_r13 = regs->r_r13;
1458 tp->tf_r12 = regs->r_r12;
1459 tp->tf_r11 = regs->r_r11;
1460 tp->tf_r10 = regs->r_r10;
1461 tp->tf_r9 = regs->r_r9;
1462 tp->tf_r8 = regs->r_r8;
1463 tp->tf_rdi = regs->r_rdi;
1464 tp->tf_rsi = regs->r_rsi;
1465 tp->tf_rbp = regs->r_rbp;
1466 tp->tf_rbx = regs->r_rbx;
1467 tp->tf_rdx = regs->r_rdx;
1468 tp->tf_rcx = regs->r_rcx;
1469 tp->tf_rax = regs->r_rax;
1470 tp->tf_rip = regs->r_rip;
1471 tp->tf_cs = regs->r_cs;
1472 tp->tf_rflags = rflags;
1473 tp->tf_rsp = regs->r_rsp;
1474 tp->tf_ss = regs->r_ss;
1475 td->td_pcb->pcb_flags |= PCB_FULLCTX;
1479 /* XXX check all this stuff! */
1480 /* externalize from sv_xmm */
1482 fill_fpregs_xmm(struct savefpu *sv_xmm, struct fpreg *fpregs)
1484 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
1485 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1489 bzero(fpregs, sizeof(*fpregs));
1491 /* FPU control/status */
1492 penv_fpreg->en_cw = penv_xmm->en_cw;
1493 penv_fpreg->en_sw = penv_xmm->en_sw;
1494 penv_fpreg->en_tw = penv_xmm->en_tw;
1495 penv_fpreg->en_opcode = penv_xmm->en_opcode;
1496 penv_fpreg->en_rip = penv_xmm->en_rip;
1497 penv_fpreg->en_rdp = penv_xmm->en_rdp;
1498 penv_fpreg->en_mxcsr = penv_xmm->en_mxcsr;
1499 penv_fpreg->en_mxcsr_mask = penv_xmm->en_mxcsr_mask;
1502 for (i = 0; i < 8; ++i)
1503 bcopy(sv_xmm->sv_fp[i].fp_acc.fp_bytes, fpregs->fpr_acc[i], 10);
1506 for (i = 0; i < 16; ++i)
1507 bcopy(sv_xmm->sv_xmm[i].xmm_bytes, fpregs->fpr_xacc[i], 16);
1510 /* internalize from fpregs into sv_xmm */
1512 set_fpregs_xmm(struct fpreg *fpregs, struct savefpu *sv_xmm)
1514 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1515 struct envxmm *penv_fpreg = (struct envxmm *)&fpregs->fpr_env;
1519 /* FPU control/status */
1520 penv_xmm->en_cw = penv_fpreg->en_cw;
1521 penv_xmm->en_sw = penv_fpreg->en_sw;
1522 penv_xmm->en_tw = penv_fpreg->en_tw;
1523 penv_xmm->en_opcode = penv_fpreg->en_opcode;
1524 penv_xmm->en_rip = penv_fpreg->en_rip;
1525 penv_xmm->en_rdp = penv_fpreg->en_rdp;
1526 penv_xmm->en_mxcsr = penv_fpreg->en_mxcsr;
1527 penv_xmm->en_mxcsr_mask = penv_fpreg->en_mxcsr_mask & cpu_mxcsr_mask;
1530 for (i = 0; i < 8; ++i)
1531 bcopy(fpregs->fpr_acc[i], sv_xmm->sv_fp[i].fp_acc.fp_bytes, 10);
1534 for (i = 0; i < 16; ++i)
1535 bcopy(fpregs->fpr_xacc[i], sv_xmm->sv_xmm[i].xmm_bytes, 16);
1538 /* externalize from td->pcb */
1540 fill_fpregs(struct thread *td, struct fpreg *fpregs)
1543 fill_fpregs_xmm(&td->td_pcb->pcb_save, fpregs);
1547 /* internalize to td->pcb */
1549 set_fpregs(struct thread *td, struct fpreg *fpregs)
1552 set_fpregs_xmm(fpregs, &td->td_pcb->pcb_save);
1557 * Get machine context.
1560 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
1562 struct trapframe *tp;
1565 PROC_LOCK(curthread->td_proc);
1566 mcp->mc_onstack = sigonstack(tp->tf_rsp);
1567 PROC_UNLOCK(curthread->td_proc);
1568 mcp->mc_r15 = tp->tf_r15;
1569 mcp->mc_r14 = tp->tf_r14;
1570 mcp->mc_r13 = tp->tf_r13;
1571 mcp->mc_r12 = tp->tf_r12;
1572 mcp->mc_r11 = tp->tf_r11;
1573 mcp->mc_r10 = tp->tf_r10;
1574 mcp->mc_r9 = tp->tf_r9;
1575 mcp->mc_r8 = tp->tf_r8;
1576 mcp->mc_rdi = tp->tf_rdi;
1577 mcp->mc_rsi = tp->tf_rsi;
1578 mcp->mc_rbp = tp->tf_rbp;
1579 mcp->mc_rbx = tp->tf_rbx;
1580 mcp->mc_rcx = tp->tf_rcx;
1581 mcp->mc_rflags = tp->tf_rflags;
1582 if (flags & GET_MC_CLEAR_RET) {
1585 mcp->mc_rflags &= ~PSL_C;
1587 mcp->mc_rax = tp->tf_rax;
1588 mcp->mc_rdx = tp->tf_rdx;
1590 mcp->mc_rip = tp->tf_rip;
1591 mcp->mc_cs = tp->tf_cs;
1592 mcp->mc_rsp = tp->tf_rsp;
1593 mcp->mc_ss = tp->tf_ss;
1594 mcp->mc_len = sizeof(*mcp);
1595 get_fpcontext(td, mcp);
1600 * Set machine context.
1602 * However, we don't set any but the user modifiable flags, and we won't
1603 * touch the cs selector.
1606 set_mcontext(struct thread *td, const mcontext_t *mcp)
1608 struct trapframe *tp;
1613 if (mcp->mc_len != sizeof(*mcp))
1615 rflags = (mcp->mc_rflags & PSL_USERCHANGE) |
1616 (tp->tf_rflags & ~PSL_USERCHANGE);
1617 ret = set_fpcontext(td, mcp);
1620 tp->tf_r15 = mcp->mc_r15;
1621 tp->tf_r14 = mcp->mc_r14;
1622 tp->tf_r13 = mcp->mc_r13;
1623 tp->tf_r12 = mcp->mc_r12;
1624 tp->tf_r11 = mcp->mc_r11;
1625 tp->tf_r10 = mcp->mc_r10;
1626 tp->tf_r9 = mcp->mc_r9;
1627 tp->tf_r8 = mcp->mc_r8;
1628 tp->tf_rdi = mcp->mc_rdi;
1629 tp->tf_rsi = mcp->mc_rsi;
1630 tp->tf_rbp = mcp->mc_rbp;
1631 tp->tf_rbx = mcp->mc_rbx;
1632 tp->tf_rdx = mcp->mc_rdx;
1633 tp->tf_rcx = mcp->mc_rcx;
1634 tp->tf_rax = mcp->mc_rax;
1635 tp->tf_rip = mcp->mc_rip;
1636 tp->tf_rflags = rflags;
1637 tp->tf_rsp = mcp->mc_rsp;
1638 tp->tf_ss = mcp->mc_ss;
1639 td->td_pcb->pcb_flags |= PCB_FULLCTX;
1644 get_fpcontext(struct thread *td, mcontext_t *mcp)
1647 mcp->mc_ownedfp = fpugetregs(td, (struct savefpu *)&mcp->mc_fpstate);
1648 mcp->mc_fpformat = fpuformat();
1652 set_fpcontext(struct thread *td, const mcontext_t *mcp)
1654 struct savefpu *fpstate;
1656 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
1658 else if (mcp->mc_fpformat != _MC_FPFMT_XMM)
1660 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
1661 /* We don't care what state is left in the FPU or PCB. */
1663 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
1664 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
1666 * XXX we violate the dubious requirement that fpusetregs()
1667 * be called with interrupts disabled.
1668 * XXX obsolete on trap-16 systems?
1670 fpstate = (struct savefpu *)&mcp->mc_fpstate;
1671 fpstate->sv_env.en_mxcsr &= cpu_mxcsr_mask;
1672 fpusetregs(td, fpstate);
1679 fpstate_drop(struct thread *td)
1684 if (PCPU_GET(fpcurthread) == td)
1687 * XXX force a full drop of the fpu. The above only drops it if we
1690 * XXX I don't much like fpugetregs()'s semantics of doing a full
1691 * drop. Dropping only to the pcb matches fnsave's behaviour.
1692 * We only need to drop to !PCB_INITDONE in sendsig(). But
1693 * sendsig() is the only caller of fpugetregs()... perhaps we just
1694 * have too many layers.
1696 curthread->td_pcb->pcb_flags &= ~PCB_FPUINITDONE;
1701 fill_dbregs(struct thread *td, struct dbreg *dbregs)
1706 dbregs->dr[0] = rdr0();
1707 dbregs->dr[1] = rdr1();
1708 dbregs->dr[2] = rdr2();
1709 dbregs->dr[3] = rdr3();
1710 dbregs->dr[6] = rdr6();
1711 dbregs->dr[7] = rdr7();
1714 dbregs->dr[0] = pcb->pcb_dr0;
1715 dbregs->dr[1] = pcb->pcb_dr1;
1716 dbregs->dr[2] = pcb->pcb_dr2;
1717 dbregs->dr[3] = pcb->pcb_dr3;
1718 dbregs->dr[6] = pcb->pcb_dr6;
1719 dbregs->dr[7] = pcb->pcb_dr7;
1735 set_dbregs(struct thread *td, struct dbreg *dbregs)
1741 load_dr0(dbregs->dr[0]);
1742 load_dr1(dbregs->dr[1]);
1743 load_dr2(dbregs->dr[2]);
1744 load_dr3(dbregs->dr[3]);
1745 load_dr6(dbregs->dr[6]);
1746 load_dr7(dbregs->dr[7]);
1749 * Don't let an illegal value for dr7 get set. Specifically,
1750 * check for undefined settings. Setting these bit patterns
1751 * result in undefined behaviour and can lead to an unexpected
1752 * TRCTRAP or a general protection fault right here.
1753 * Upper bits of dr6 and dr7 must not be set
1755 for (i = 0; i < 4; i++) {
1756 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
1758 if (td->td_frame->tf_cs == _ucode32sel &&
1759 DBREG_DR7_LEN(dbregs->dr[7], i) == DBREG_DR7_LEN_8)
1762 if ((dbregs->dr[6] & 0xffffffff00000000ul) != 0 ||
1763 (dbregs->dr[7] & 0xffffffff00000000ul) != 0)
1769 * Don't let a process set a breakpoint that is not within the
1770 * process's address space. If a process could do this, it
1771 * could halt the system by setting a breakpoint in the kernel
1772 * (if ddb was enabled). Thus, we need to check to make sure
1773 * that no breakpoints are being enabled for addresses outside
1774 * process's address space.
1776 * XXX - what about when the watched area of the user's
1777 * address space is written into from within the kernel
1778 * ... wouldn't that still cause a breakpoint to be generated
1779 * from within kernel mode?
1782 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
1783 /* dr0 is enabled */
1784 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
1787 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
1788 /* dr1 is enabled */
1789 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
1792 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
1793 /* dr2 is enabled */
1794 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
1797 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
1798 /* dr3 is enabled */
1799 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
1803 pcb->pcb_dr0 = dbregs->dr[0];
1804 pcb->pcb_dr1 = dbregs->dr[1];
1805 pcb->pcb_dr2 = dbregs->dr[2];
1806 pcb->pcb_dr3 = dbregs->dr[3];
1807 pcb->pcb_dr6 = dbregs->dr[6];
1808 pcb->pcb_dr7 = dbregs->dr[7];
1810 pcb->pcb_flags |= PCB_DBREGS;
1820 load_dr7(0); /* Turn off the control bits first */
1829 * Return > 0 if a hardware breakpoint has been hit, and the
1830 * breakpoint was in user space. Return 0, otherwise.
1833 user_dbreg_trap(void)
1835 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
1836 u_int64_t bp; /* breakpoint bits extracted from dr6 */
1837 int nbp; /* number of breakpoints that triggered */
1838 caddr_t addr[4]; /* breakpoint addresses */
1842 if ((dr7 & 0x000000ff) == 0) {
1844 * all GE and LE bits in the dr7 register are zero,
1845 * thus the trap couldn't have been caused by the
1846 * hardware debug registers
1853 bp = dr6 & 0x0000000f;
1857 * None of the breakpoint bits are set meaning this
1858 * trap was not caused by any of the debug registers
1864 * at least one of the breakpoints were hit, check to see
1865 * which ones and if any of them are user space addresses
1869 addr[nbp++] = (caddr_t)rdr0();
1872 addr[nbp++] = (caddr_t)rdr1();
1875 addr[nbp++] = (caddr_t)rdr2();
1878 addr[nbp++] = (caddr_t)rdr3();
1881 for (i = 0; i < nbp; i++) {
1882 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
1884 * addr[i] is in user space
1891 * None of the breakpoints are in user space.
1899 * Provide inb() and outb() as functions. They are normally only
1900 * available as macros calling inlined functions, thus cannot be
1901 * called from the debugger.
1903 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
1909 /* silence compiler warnings */
1911 void outb(u_int, u_char);
1918 * We use %%dx and not %1 here because i/o is done at %dx and not at
1919 * %edx, while gcc generates inferior code (movw instead of movl)
1920 * if we tell it to load (u_short) port.
1922 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
1927 outb(u_int port, u_char data)
1931 * Use an unnecessary assignment to help gcc's register allocator.
1932 * This make a large difference for gcc-1.40 and a tiny difference
1933 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
1934 * best results. gcc-2.6.0 can't handle this.
1937 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));