1 /* $NetBSD: atomic.h,v 1.1 2002/10/19 12:22:34 bsh Exp $ */
4 * Copyright (C) 2003-2004 Olivier Houchard
5 * Copyright (C) 1994-1997 Mark Brinicombe
6 * Copyright (C) 1994 Brini
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Brini.
22 * 4. The name of Brini may not be used to endorse or promote products
23 * derived from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR
26 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
27 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
31 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
33 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
34 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 #ifndef _MACHINE_ATOMIC_H_
40 #define _MACHINE_ATOMIC_H_
46 #include <sys/types.h>
49 #define I32_bit (1 << 7) /* IRQ disable */
52 #define F32_bit (1 << 6) /* FIQ disable */
55 #define __with_interrupts_disabled(expr) \
57 u_int cpsr_save, tmp; \
63 : "=r" (cpsr_save), "=r" (tmp) \
64 : "I" (I32_bit | F32_bit) \
74 #define ARM_RAS_START 0xe0000004
75 #define ARM_RAS_END 0xe0000008
77 static __inline uint32_t
78 __swp(uint32_t val, volatile uint32_t *ptr)
80 __asm __volatile("swp %0, %2, [%3]"
81 : "=&r" (val), "=m" (*ptr)
82 : "r" (val), "r" (ptr), "m" (*ptr)
90 atomic_set_32(volatile uint32_t *address, uint32_t setmask)
92 __with_interrupts_disabled(*address |= setmask);
96 atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
98 __with_interrupts_disabled(*address &= ~clearmask);
101 static __inline u_int32_t
102 atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
106 __with_interrupts_disabled(
119 atomic_add_32(volatile u_int32_t *p, u_int32_t val)
121 __with_interrupts_disabled(*p += val);
125 atomic_subtract_32(volatile u_int32_t *p, u_int32_t val)
127 __with_interrupts_disabled(*p -= val);
130 static __inline uint32_t
131 atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
135 __with_interrupts_disabled(
145 static __inline u_int32_t
146 atomic_cmpset_32(volatile u_int32_t *p, volatile u_int32_t cmpval, volatile u_int32_t newval)
148 register int done, ras_start;
150 __asm __volatile("1:\n"
152 "mov %0, #0xe0000004\n"
154 "mov %0, #0xe0000008\n"
162 "mov %0, #0xe0000004\n"
164 "mov %1, #0xffffffff\n"
165 "mov %0, #0xe0000008\n"
169 : "=r" (ras_start), "=r" (done)
170 ,"+r" (p), "+r" (cmpval), "+r" (newval) : : "memory");
175 atomic_add_32(volatile u_int32_t *p, u_int32_t val)
177 int ras_start, start;
179 __asm __volatile("1:\n"
181 "mov %0, #0xe0000004\n"
183 "mov %0, #0xe0000008\n"
190 "mov %0, #0xe0000004\n"
193 "mov %1, #0xffffffff\n"
194 "mov %0, #0xe0000008\n"
196 : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val)
201 atomic_subtract_32(volatile u_int32_t *p, u_int32_t val)
203 int ras_start, start;
205 __asm __volatile("1:\n"
207 "mov %0, #0xe0000004\n"
209 "mov %0, #0xe0000008\n"
216 "mov %0, #0xe0000004\n"
219 "mov %1, #0xffffffff\n"
220 "mov %0, #0xe0000008\n"
223 : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (val)
228 atomic_set_32(volatile uint32_t *address, uint32_t setmask)
230 int ras_start, start;
232 __asm __volatile("1:\n"
234 "mov %0, #0xe0000004\n"
236 "mov %0, #0xe0000008\n"
243 "mov %0, #0xe0000004\n"
246 "mov %1, #0xffffffff\n"
247 "mov %0, #0xe0000008\n"
250 : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (setmask)
255 atomic_clear_32(volatile uint32_t *address, uint32_t clearmask)
257 int ras_start, start;
259 __asm __volatile("1:\n"
261 "mov %0, #0xe0000004\n"
263 "mov %0, #0xe0000008\n"
270 "mov %0, #0xe0000004\n"
273 "mov %1, #0xffffffff\n"
274 "mov %0, #0xe0000008\n"
276 : "=r" (ras_start), "=r" (start), "+r" (address), "+r" (clearmask)
281 static __inline uint32_t
282 atomic_fetchadd_32(volatile uint32_t *p, uint32_t v)
284 uint32_t ras_start, start;
286 __asm __volatile("1:\n"
288 "mov %0, #0xe0000004\n"
290 "mov %0, #0xe0000008\n"
297 "mov %0, #0xe0000004\n"
300 "mov %0, #0xe0000008\n"
301 "mov %3, #0xffffffff\n"
303 : "=r" (ras_start), "=r" (start), "+r" (p), "+r" (v)
312 atomic_load_32(volatile uint32_t *v)
319 atomic_store_32(volatile uint32_t *dst, uint32_t src)
324 static __inline uint32_t
325 atomic_readandclear_32(volatile u_int32_t *p)
328 return (__swp(0, p));
331 #undef __with_interrupts_disabled
335 #define atomic_add_long(p, v) \
336 atomic_add_32((volatile u_int *)(p), (u_int)(v))
337 #define atomic_add_acq_long atomic_add_long
338 #define atomic_add_rel_long atomic_add_long
339 #define atomic_subtract_long(p, v) \
340 atomic_subtract_32((volatile u_int *)(p), (u_int)(v))
341 #define atomic_subtract_acq_long atomic_subtract_long
342 #define atomic_subtract_rel_long atomic_subtract_long
343 #define atomic_clear_long(p, v) \
344 atomic_clear_32((volatile u_int *)(p), (u_int)(v))
345 #define atomic_clear_acq_long atomic_clear_long
346 #define atomic_clear_rel_long atomic_clear_long
347 #define atomic_set_long(p, v) \
348 atomic_set_32((volatile u_int *)(p), (u_int)(v))
349 #define atomic_set_acq_long atomic_set_long
350 #define atomic_set_rel_long atomic_set_long
351 #define atomic_cmpset_long(dst, old, new) \
352 atomic_cmpset_32((volatile u_int *)(dst), (u_int)(old), (u_int)(new))
353 #define atomic_cmpset_acq_long atomic_cmpset_long
354 #define atomic_cmpset_rel_long atomic_cmpset_long
355 #define atomic_fetchadd_long(p, v) \
356 atomic_fetchadd_32((volatile u_int *)(p), (u_int)(v))
357 #define atomic_readandclear_long(p) \
358 atomic_readandclear_long((volatile u_int *)(p))
359 #define atomic_load_long(p) \
360 atomic_load_32((volatile u_int *)(p))
361 #define atomic_load_acq_long atomic_load_long
362 #define atomic_store_rel_long(p, v) \
363 atomic_store_rel_32((volatile u_int *)(p), (u_int)(v))
366 #define atomic_clear_ptr atomic_clear_32
367 #define atomic_set_ptr atomic_set_32
368 #define atomic_cmpset_ptr atomic_cmpset_32
369 #define atomic_cmpset_rel_ptr atomic_cmpset_ptr
370 #define atomic_cmpset_acq_ptr atomic_cmpset_ptr
371 #define atomic_store_ptr atomic_store_32
372 #define atomic_store_rel_ptr atomic_store_ptr
374 #define atomic_add_int atomic_add_32
375 #define atomic_add_acq_int atomic_add_int
376 #define atomic_add_rel_int atomic_add_int
377 #define atomic_subtract_int atomic_subtract_32
378 #define atomic_subtract_acq_int atomic_subtract_int
379 #define atomic_subtract_rel_int atomic_subtract_int
380 #define atomic_clear_int atomic_clear_32
381 #define atomic_clear_acq_int atomic_clear_int
382 #define atomic_clear_rel_int atomic_clear_int
383 #define atomic_set_int atomic_set_32
384 #define atomic_set_acq_int atomic_set_int
385 #define atomic_set_rel_int atomic_set_int
386 #define atomic_cmpset_int atomic_cmpset_32
387 #define atomic_cmpset_acq_int atomic_cmpset_int
388 #define atomic_cmpset_rel_int atomic_cmpset_int
389 #define atomic_fetchadd_int atomic_fetchadd_32
390 #define atomic_readandclear_int atomic_readandclear_32
391 #define atomic_load_acq_int atomic_load_32
392 #define atomic_store_rel_int atomic_store_32
394 #define atomic_add_acq_32 atomic_add_32
395 #define atomic_add_rel_32 atomic_add_32
396 #define atomic_subtract_acq_32 atomic_subtract_32
397 #define atomic_subtract_rel_32 atomic_subtract_32
398 #define atomic_clear_acq_32 atomic_clear_32
399 #define atomic_clear_rel_32 atomic_clear_32
400 #define atomic_set_acq_32 atomic_set_32
401 #define atomic_set_rel_32 atomic_set_32
402 #define atomic_cmpset_acq_32 atomic_cmpset_32
403 #define atomic_cmpset_rel_32 atomic_cmpset_32
404 #define atomic_load_acq_32 atomic_load_32
405 #define atomic_store_rel_32 atomic_store_32
407 #endif /* _MACHINE_ATOMIC_H_ */