1 /* $NetBSD: ixp425var.h,v 1.10 2006/04/10 03:36:03 simonb Exp $ */
5 * Ichiro FUKUHARA <ichiro@ichiro.org>.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Ichiro FUKUHARA.
19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific
21 * prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 #include <sys/queue.h>
45 #include <machine/bus.h>
47 #include <dev/pci/pcivar.h>
52 bus_space_tag_t sc_iot;
53 bus_space_handle_t sc_gpio_ioh;
54 bus_space_handle_t sc_exp_ioh;
56 u_int32_t sc_intrmask;
58 struct rman sc_irq_rman;
59 struct rman sc_mem_rman;
60 bus_dma_tag_t sc_dmat;
63 struct ixppcib_softc {
68 struct resource *sc_csr;
69 struct resource *sc_mem;
71 struct rman sc_io_rman;
72 struct rman sc_mem_rman;
73 struct rman sc_irq_rman;
75 struct bus_space sc_pci_memt;
76 struct bus_space sc_pci_iot;
77 bus_dma_tag_t sc_dmat;
80 #define EXP_BUS_WRITE_4(sc, reg, data) \
81 bus_space_write_4(sc->sc_iot, sc->sc_exp_ioh, reg, data)
82 #define EXP_BUS_READ_4(sc, reg) \
83 bus_space_read_4(sc->sc_iot, sc->sc_exp_ioh, reg)
85 #define GPIO_CONF_WRITE_4(sc, reg, data) \
86 bus_space_write_4(sc->sc_iot, sc->sc_gpio_ioh, reg, data)
87 #define GPIO_CONF_READ_4(sc, reg) \
88 bus_space_read_4(sc->sc_iot, sc->sc_gpio_ioh, reg)
90 extern struct bus_space ixp425_bs_tag;
91 extern struct bus_space ixp425_a4x_bs_tag;
93 void ixp425_io_bs_init(bus_space_tag_t, void *);
94 void ixp425_mem_bs_init(bus_space_tag_t, void *);
96 uint32_t ixp425_sdram_size(void);
98 int ixp425_md_route_interrupt(device_t, device_t, int);
99 void ixp425_md_attach(device_t);
101 int getvbase(uint32_t, uint32_t, uint32_t *);
107 #define IXP425_IVAR(d) ((struct ixp425_ivar *) device_get_ivars(d))
110 IXP425_IVAR_ADDR, /* base physical address */
111 IXP425_IVAR_IRQ /* irq/gpio pin assignment */
114 #endif /* _IXP425VAR_H_ */