1 /**************************************************************************
3 Copyright (c) 2007-2008, Chelsio Inc.
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
12 2. Neither the name of the Chelsio Corporation nor the names of its
13 contributors may be used to endorse or promote products derived from
14 this software without specific prior written permission.
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE.
31 ***************************************************************************/
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/ctype.h>
36 #include <sys/endian.h>
40 #include <sys/mutex.h>
42 #include <dev/mii/mii.h>
45 #include <common/cxgb_version.h>
46 #include <cxgb_config.h>
48 #include <dev/cxgb/common/cxgb_version.h>
49 #include <dev/cxgb/cxgb_config.h>
52 #ifndef _CXGB_OSDEP_H_
53 #define _CXGB_OSDEP_H_
55 typedef struct adapter adapter_t;
59 TP_TMR_RES = 200, /* TP timer resolution in usec */
60 MAX_NPORTS = 4, /* max # of ports */
61 TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */
62 TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */
71 #define PANIC_IF(exp) do { \
73 panic("BUG: %s", #exp); \
77 #define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif)
78 #define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri))
79 #define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl))
80 #define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header)
81 #define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len)
82 #define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag)
87 #define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
88 #define m_get_toep(m) ((m)->m_pkthdr.header)
89 #define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
91 #define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
92 #define m_get_socket(m) ((m)->m_pkthdr.header)
94 #define KTR_CXGB KTR_SPARE2
95 void cxgb_log_tcb(struct adapter *sc, unsigned int tid);
97 #define MT_DONTFREE 128
99 #if __FreeBSD_version > 700030
101 #define FIRMWARE_LATEST
104 #if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))
105 #define FIRMWARE_LATEST
108 #if __FreeBSD_version > 700000
109 #define MSI_SUPPORTED
110 #define TSO_SUPPORTED
111 #define VLAN_SUPPORTED
112 #define TASKQUEUE_CURRENT
114 #define if_name(ifp) (ifp)->if_xname
115 #define M_SANITY(m, n)
118 #define __read_mostly __attribute__((__section__(".data.read_mostly")))
121 * Workaround for weird Chelsio issue
123 #if __FreeBSD_version > 700029
124 #define PRIV_SUPPORTED
127 #define CXGB_TX_CLEANUP_THRESHOLD 32
131 #define DPRINTF printf
136 #define TX_MAX_SIZE (1 << 16) /* 64KB */
137 #define TX_MAX_SEGS 36 /* maximum supported by card */
139 #define TX_MAX_DESC 4 /* max descriptors per packet */
142 #define TX_START_MIN_DESC (TX_MAX_DESC << 2)
143 #define TX_START_MAX_DESC (TX_MAX_DESC << 3) /* maximum number of descriptors
144 * call to start used per */
146 #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors
147 * to clean per iteration */
148 #define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single
151 #define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be
152 * aggregated into a single TX WR
156 #if defined(__i386__) || defined(__amd64__)
157 #define mb() __asm volatile("mfence":::"memory")
158 #define rmb() __asm volatile("lfence":::"memory")
159 #define wmb() __asm volatile("sfence" ::: "memory")
160 #define smp_mb() mb()
162 #define L1_CACHE_BYTES 128
164 void prefetch(void *x)
166 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
169 extern void kdb_backtrace(void);
171 #define WARN_ON(condition) do { \
172 if (__predict_false((condition)!=0)) { \
173 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
179 #else /* !i386 && !amd64 */
185 #define L1_CACHE_BYTES 32
190 volatile uint32_t br_cons;
191 volatile uint32_t br_prod;
196 struct buf_ring *buf_ring_alloc(int count, int flags);
197 void buf_ring_free(struct buf_ring *);
200 buf_ring_count(struct buf_ring *mr)
202 int size = mr->br_size;
203 uint32_t mask = size - 1;
205 return ((size + mr->br_prod - mr->br_cons) & mask);
209 buf_ring_empty(struct buf_ring *mr)
211 return (mr->br_cons == mr->br_prod);
215 buf_ring_full(struct buf_ring *mr)
219 mask = mr->br_size - 1;
220 return (mr->br_cons == ((mr->br_prod + 1) & mask));
224 * The producer and consumer are independently locked
225 * this relies on the consumer providing his own serialization
228 static __inline void *
229 buf_ring_dequeue(struct buf_ring *mr)
231 uint32_t prod, cons, mask;
234 ring = (caddr_t *)mr->br_ring;
235 mask = mr->br_size - 1;
243 mr->br_cons = (cons + 1) & mask;
251 __buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
255 for (i = 0; i < mr->br_size; i++)
256 if (m == mr->br_ring[i])
257 panic("%s:%d m=%p present prod=%d cons=%d idx=%d", file,
258 line, m, mr->br_prod, mr->br_cons, i);
262 buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
264 mtx_lock(&mr->br_lock);
265 __buf_ring_scan(mr, m, file, line);
266 mtx_unlock(&mr->br_lock);
271 __buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
276 buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
282 __buf_ring_enqueue(struct buf_ring *mr, void *m, char *file, int line)
285 uint32_t prod, cons, mask;
288 mask = mr->br_size - 1;
292 __buf_ring_scan(mr, m, file, line);
293 if (((prod + 1) & mask) != cons) {
294 KASSERT(mr->br_ring[prod] == NULL, ("overwriting entry"));
295 mr->br_ring[prod] = m;
297 mr->br_prod = (prod + 1) & mask;
306 buf_ring_enqueue_(struct buf_ring *mr, void *m, char *file, int line)
310 mtx_lock(&mr->br_lock);
311 err = __buf_ring_enqueue(mr, m, file, line);
312 mtx_unlock(&mr->br_lock);
317 #define buf_ring_enqueue(mr, m) buf_ring_enqueue_((mr), (m), __FILE__, __LINE__)
320 static __inline void *
321 buf_ring_peek(struct buf_ring *mr)
323 int prod, cons, mask;
326 ring = (caddr_t *)mr->br_ring;
327 mask = mr->br_size - 1;
337 #define DBG_RX (1 << 0)
338 static const int debug_flags = DBG_RX;
341 #define DBG(flag, msg) do { \
342 if ((flag & debug_flags)) \
349 #include <sys/syslog.h>
351 #define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC)
352 #define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
354 #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
355 #define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__)
356 #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
358 #define t3_os_sleep(x) DELAY((x) * 1000)
360 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
362 #define max_t(type, a, b) (type)max((a), (b))
363 #define net_device ifnet
364 #define cpu_to_be32 htobe32
366 /* Standard PHY definitions */
367 #define BMCR_LOOPBACK BMCR_LOOP
368 #define BMCR_ISOLATE BMCR_ISO
369 #define BMCR_ANENABLE BMCR_AUTOEN
370 #define BMCR_SPEED1000 BMCR_SPEED1
371 #define BMCR_SPEED100 BMCR_SPEED0
372 #define BMCR_ANRESTART BMCR_STARTNEG
373 #define BMCR_FULLDPLX BMCR_FDX
374 #define BMSR_LSTATUS BMSR_LINK
375 #define BMSR_ANEGCOMPLETE BMSR_ACOMP
377 #define MII_LPA MII_ANLPAR
378 #define MII_ADVERTISE MII_ANAR
379 #define MII_CTRL1000 MII_100T2CR
381 #define ADVERTISE_PAUSE_CAP ANAR_FC
382 #define ADVERTISE_PAUSE_ASYM ANAR_X_PAUSE_ASYM
383 #define ADVERTISE_PAUSE ANAR_X_PAUSE_SYM
384 #define ADVERTISE_1000HALF ANAR_X_HD
385 #define ADVERTISE_1000FULL ANAR_X_FD
386 #define ADVERTISE_10FULL ANAR_10_FD
387 #define ADVERTISE_10HALF ANAR_10
388 #define ADVERTISE_100FULL ANAR_TX_FD
389 #define ADVERTISE_100HALF ANAR_TX
392 #define ADVERTISE_1000XHALF ANAR_X_HD
393 #define ADVERTISE_1000XFULL ANAR_X_FD
394 #define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM
395 #define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM
397 #define ADVERTISE_CSMA ANAR_CSMA
398 #define ADVERTISE_NPAGE ANAR_NP
401 /* Standard PCI Extended Capaibilities definitions */
402 #define PCI_CAP_ID_VPD 0x03
403 #define PCI_VPD_ADDR 2
404 #define PCI_VPD_ADDR_F 0x8000
405 #define PCI_VPD_DATA 4
407 #define PCI_CAP_ID_EXP 0x10
408 #define PCI_EXP_DEVCTL 8
409 #define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
410 #define PCI_EXP_LNKCTL 16
411 #define PCI_EXP_LNKSTA 18
414 * Linux compatibility macros
417 /* Some simple translations */
419 #define udelay(x) DELAY(x)
420 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
421 #define le32_to_cpu(x) le32toh(x)
422 #define le16_to_cpu(x) le16toh(x)
423 #define cpu_to_le32(x) htole32(x)
424 #define swab32(x) bswap32(x)
425 #define simple_strtoul strtoul
428 #ifndef LINUX_TYPES_DEFINED
430 typedef uint16_t u16;
431 typedef uint32_t u32;
432 typedef uint64_t u64;
434 typedef uint8_t __u8;
435 typedef uint16_t __u16;
436 typedef uint32_t __u32;
437 typedef uint8_t __be8;
438 typedef uint16_t __be16;
439 typedef uint32_t __be32;
440 typedef uint64_t __be64;
444 #if BYTE_ORDER == BIG_ENDIAN
445 #define __BIG_ENDIAN_BITFIELD
446 #elif BYTE_ORDER == LITTLE_ENDIAN
447 #define __LITTLE_ENDIAN_BITFIELD
449 #error "Must set BYTE_ORDER"
452 /* Indicates what features are supported by the interface. */
453 #define SUPPORTED_10baseT_Half (1 << 0)
454 #define SUPPORTED_10baseT_Full (1 << 1)
455 #define SUPPORTED_100baseT_Half (1 << 2)
456 #define SUPPORTED_100baseT_Full (1 << 3)
457 #define SUPPORTED_1000baseT_Half (1 << 4)
458 #define SUPPORTED_1000baseT_Full (1 << 5)
459 #define SUPPORTED_Autoneg (1 << 6)
460 #define SUPPORTED_TP (1 << 7)
461 #define SUPPORTED_AUI (1 << 8)
462 #define SUPPORTED_MII (1 << 9)
463 #define SUPPORTED_FIBRE (1 << 10)
464 #define SUPPORTED_BNC (1 << 11)
465 #define SUPPORTED_10000baseT_Full (1 << 12)
466 #define SUPPORTED_Pause (1 << 13)
467 #define SUPPORTED_Asym_Pause (1 << 14)
469 /* Indicates what features are advertised by the interface. */
470 #define ADVERTISED_10baseT_Half (1 << 0)
471 #define ADVERTISED_10baseT_Full (1 << 1)
472 #define ADVERTISED_100baseT_Half (1 << 2)
473 #define ADVERTISED_100baseT_Full (1 << 3)
474 #define ADVERTISED_1000baseT_Half (1 << 4)
475 #define ADVERTISED_1000baseT_Full (1 << 5)
476 #define ADVERTISED_Autoneg (1 << 6)
477 #define ADVERTISED_TP (1 << 7)
478 #define ADVERTISED_AUI (1 << 8)
479 #define ADVERTISED_MII (1 << 9)
480 #define ADVERTISED_FIBRE (1 << 10)
481 #define ADVERTISED_BNC (1 << 11)
482 #define ADVERTISED_10000baseT_Full (1 << 12)
483 #define ADVERTISED_Pause (1 << 13)
484 #define ADVERTISED_Asym_Pause (1 << 14)
486 /* Enable or disable autonegotiation. If this is set to enable,
487 * the forced link modes above are completely ignored.
489 #define AUTONEG_DISABLE 0x00
490 #define AUTONEG_ENABLE 0x01
493 #define SPEED_100 100
494 #define SPEED_1000 1000
495 #define SPEED_10000 10000
496 #define DUPLEX_HALF 0
497 #define DUPLEX_FULL 1