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32 ******************************************************************************/
35 #include "e1000_api.h"
37 static u8 e1000_calculate_checksum(u8 *buffer, u32 length);
40 * e1000_calculate_checksum - Calculate checksum for buffer
41 * @buffer: pointer to EEPROM
42 * @length: size of EEPROM to calculate a checksum for
44 * Calculates the checksum for some buffer on a specified length. The
45 * checksum calculated is returned.
47 static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
52 DEBUGFUNC("e1000_calculate_checksum");
57 for (i = 0; i < length; i++)
60 return (u8) (0 - sum);
64 * e1000_mng_enable_host_if_generic - Checks host interface is enabled
65 * @hw: pointer to the HW structure
67 * Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND
69 * This function checks whether the HOST IF is enabled for command operation
70 * and also checks whether the previous command is completed. It busy waits
71 * in case of previous command is not completed.
73 s32 e1000_mng_enable_host_if_generic(struct e1000_hw *hw)
76 s32 ret_val = E1000_SUCCESS;
79 DEBUGFUNC("e1000_mng_enable_host_if_generic");
81 /* Check that the host interface is enabled. */
82 hicr = E1000_READ_REG(hw, E1000_HICR);
83 if ((hicr & E1000_HICR_EN) == 0) {
84 DEBUGOUT("E1000_HOST_EN bit disabled.\n");
85 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
88 /* check the previous command is completed */
89 for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) {
90 hicr = E1000_READ_REG(hw, E1000_HICR);
91 if (!(hicr & E1000_HICR_C))
96 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) {
97 DEBUGOUT("Previous command timeout failed .\n");
98 ret_val = -E1000_ERR_HOST_INTERFACE_COMMAND;
107 * e1000_check_mng_mode_generic - Generic check management mode
108 * @hw: pointer to the HW structure
110 * Reads the firmware semaphore register and returns TRUE (>0) if
111 * manageability is enabled, else FALSE (0).
113 bool e1000_check_mng_mode_generic(struct e1000_hw *hw)
117 DEBUGFUNC("e1000_check_mng_mode_generic");
119 fwsm = E1000_READ_REG(hw, E1000_FWSM);
121 return (fwsm & E1000_FWSM_MODE_MASK) ==
122 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
126 * e1000_enable_tx_pkt_filtering_generic - Enable packet filtering on TX
127 * @hw: pointer to the HW structure
129 * Enables packet filtering on transmit packets if manageability is enabled
130 * and host interface is enabled.
132 bool e1000_enable_tx_pkt_filtering_generic(struct e1000_hw *hw)
134 struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie;
135 u32 *buffer = (u32 *)&hw->mng_cookie;
137 s32 ret_val, hdr_csum, csum;
139 bool tx_filter = TRUE;
141 DEBUGFUNC("e1000_enable_tx_pkt_filtering_generic");
143 /* No manageability, no filtering */
144 if (!hw->mac.ops.check_mng_mode(hw)) {
150 * If we can't read from the host interface for whatever
151 * reason, disable filtering.
153 ret_val = hw->mac.ops.mng_enable_host_if(hw);
154 if (ret_val != E1000_SUCCESS) {
159 /* Read in the header. Length and offset are in dwords. */
160 len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2;
161 offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2;
162 for (i = 0; i < len; i++) {
163 *(buffer + i) = E1000_READ_REG_ARRAY_DWORD(hw,
167 hdr_csum = hdr->checksum;
169 csum = e1000_calculate_checksum((u8 *)hdr,
170 E1000_MNG_DHCP_COOKIE_LENGTH);
172 * If either the checksums or signature don't match, then
173 * the cookie area isn't considered valid, in which case we
174 * take the safe route of assuming Tx filtering is enabled.
176 if (hdr_csum != csum)
178 if (hdr->signature != E1000_IAMT_SIGNATURE)
181 /* Cookie area is valid, make the final check for filtering. */
182 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING))
186 hw->mac.tx_pkt_filtering = tx_filter;
191 * e1000_mng_write_dhcp_info_generic - Writes DHCP info to host interface
192 * @hw: pointer to the HW structure
193 * @buffer: pointer to the host interface
194 * @length: size of the buffer
196 * Writes the DHCP information to the host interface.
198 s32 e1000_mng_write_dhcp_info_generic(struct e1000_hw *hw, u8 *buffer,
201 struct e1000_host_mng_command_header hdr;
205 DEBUGFUNC("e1000_mng_write_dhcp_info_generic");
207 hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD;
208 hdr.command_length = length;
213 /* Enable the host interface */
214 ret_val = hw->mac.ops.mng_enable_host_if(hw);
218 /* Populate the host interface with the contents of "buffer". */
219 ret_val = hw->mac.ops.mng_host_if_write(hw, buffer, length,
220 sizeof(hdr), &(hdr.checksum));
224 /* Write the manageability command header */
225 ret_val = hw->mac.ops.mng_write_cmd_header(hw, &hdr);
229 /* Tell the ARC a new command is pending. */
230 hicr = E1000_READ_REG(hw, E1000_HICR);
231 E1000_WRITE_REG(hw, E1000_HICR, hicr | E1000_HICR_C);
238 * e1000_mng_write_cmd_header_generic - Writes manageability command header
239 * @hw: pointer to the HW structure
240 * @hdr: pointer to the host interface command header
242 * Writes the command header after does the checksum calculation.
244 s32 e1000_mng_write_cmd_header_generic(struct e1000_hw *hw,
245 struct e1000_host_mng_command_header *hdr)
247 u16 i, length = sizeof(struct e1000_host_mng_command_header);
249 DEBUGFUNC("e1000_mng_write_cmd_header_generic");
251 /* Write the whole command header structure with new checksum. */
253 hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length);
256 /* Write the relevant command block into the ram area. */
257 for (i = 0; i < length; i++) {
258 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, i,
260 E1000_WRITE_FLUSH(hw);
263 return E1000_SUCCESS;
267 * e1000_mng_host_if_write_generic - Write to the manageability host interface
268 * @hw: pointer to the HW structure
269 * @buffer: pointer to the host interface buffer
270 * @length: size of the buffer
271 * @offset: location in the buffer to write to
272 * @sum: sum of the data (not checksum)
274 * This function writes the buffer content at the offset given on the host if.
275 * It also does alignment considerations to do the writes in most efficient
276 * way. Also fills up the sum of the buffer in *buffer parameter.
278 s32 e1000_mng_host_if_write_generic(struct e1000_hw *hw, u8 *buffer,
279 u16 length, u16 offset, u8 *sum)
284 s32 ret_val = E1000_SUCCESS;
285 u16 remaining, i, j, prev_bytes;
287 DEBUGFUNC("e1000_mng_host_if_write_generic");
289 /* sum = only sum of the data and it is not checksum */
291 if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) {
292 ret_val = -E1000_ERR_PARAM;
297 prev_bytes = offset & 0x3;
301 data = E1000_READ_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset);
302 for (j = prev_bytes; j < sizeof(u32); j++) {
303 *(tmp + j) = *bufptr++;
306 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset, data);
307 length -= j - prev_bytes;
311 remaining = length & 0x3;
314 /* Calculate length in DWORDs */
318 * The device driver writes the relevant command block into the
321 for (i = 0; i < length; i++) {
322 for (j = 0; j < sizeof(u32); j++) {
323 *(tmp + j) = *bufptr++;
327 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i,
331 for (j = 0; j < sizeof(u32); j++) {
333 *(tmp + j) = *bufptr++;
339 E1000_WRITE_REG_ARRAY_DWORD(hw, E1000_HOST_IF, offset + i, data);
347 * e1000_enable_mng_pass_thru - Enable processing of ARP's
348 * @hw: pointer to the HW structure
350 * Verifies the hardware needs to allow ARPs to be processed by the host.
352 bool e1000_enable_mng_pass_thru(struct e1000_hw *hw)
356 bool ret_val = FALSE;
358 DEBUGFUNC("e1000_enable_mng_pass_thru");
360 if (!hw->mac.asf_firmware_present)
363 manc = E1000_READ_REG(hw, E1000_MANC);
365 if (!(manc & E1000_MANC_RCV_TCO_EN) ||
366 !(manc & E1000_MANC_EN_MAC_ADDR_FILTER))
369 if (hw->mac.arc_subsystem_valid) {
370 fwsm = E1000_READ_REG(hw, E1000_FWSM);
371 factps = E1000_READ_REG(hw, E1000_FACTPS);
373 if (!(factps & E1000_FACTPS_MNGCG) &&
374 ((fwsm & E1000_FWSM_MODE_MASK) ==
375 (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) {
380 if ((manc & E1000_MANC_SMBUS_EN) &&
381 !(manc & E1000_MANC_ASF_EN)) {