3 * Copyright (c) 1997-2007 by Matthew Jacob
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
35 * Mailbox Command Opcodes
37 #define MBOX_NO_OP 0x0000
38 #define MBOX_LOAD_RAM 0x0001
39 #define MBOX_EXEC_FIRMWARE 0x0002
40 #define MBOX_DUMP_RAM 0x0003
41 #define MBOX_WRITE_RAM_WORD 0x0004
42 #define MBOX_READ_RAM_WORD 0x0005
43 #define MBOX_MAILBOX_REG_TEST 0x0006
44 #define MBOX_VERIFY_CHECKSUM 0x0007
45 #define MBOX_ABOUT_FIRMWARE 0x0008
46 #define MBOX_LOAD_RISC_RAM_2100 0x0009
48 #define MBOX_LOAD_RISC_RAM 0x000b
50 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d
51 #define MBOX_CHECK_FIRMWARE 0x000e
52 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f
53 #define MBOX_INIT_REQ_QUEUE 0x0010
54 #define MBOX_INIT_RES_QUEUE 0x0011
55 #define MBOX_EXECUTE_IOCB 0x0012
56 #define MBOX_WAKE_UP 0x0013
57 #define MBOX_STOP_FIRMWARE 0x0014
58 #define MBOX_ABORT 0x0015
59 #define MBOX_ABORT_DEVICE 0x0016
60 #define MBOX_ABORT_TARGET 0x0017
61 #define MBOX_BUS_RESET 0x0018
62 #define MBOX_STOP_QUEUE 0x0019
63 #define MBOX_START_QUEUE 0x001a
64 #define MBOX_SINGLE_STEP_QUEUE 0x001b
65 #define MBOX_ABORT_QUEUE 0x001c
66 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
68 #define MBOX_GET_FIRMWARE_STATUS 0x001f
69 #define MBOX_GET_INIT_SCSI_ID 0x0020
70 #define MBOX_GET_SELECT_TIMEOUT 0x0021
71 #define MBOX_GET_RETRY_COUNT 0x0022
72 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
73 #define MBOX_GET_CLOCK_RATE 0x0024
74 #define MBOX_GET_ACT_NEG_STATE 0x0025
75 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
76 #define MBOX_GET_SBUS_PARAMS 0x0027
77 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS
78 #define MBOX_GET_TARGET_PARAMS 0x0028
79 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
80 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a
86 #define MBOX_SET_INIT_SCSI_ID 0x0030
87 #define MBOX_SET_SELECT_TIMEOUT 0x0031
88 #define MBOX_SET_RETRY_COUNT 0x0032
89 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
90 #define MBOX_SET_CLOCK_RATE 0x0034
91 #define MBOX_SET_ACT_NEG_STATE 0x0035
92 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
93 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
94 #define MBOX_SET_PCI_PARAMETERS 0x0037
95 #define MBOX_SET_TARGET_PARAMS 0x0038
96 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
97 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a
103 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
104 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
105 #define MBOX_EXEC_BIOS_IOCB 0x0042
106 #define MBOX_SET_FW_FEATURES 0x004a
107 #define MBOX_GET_FW_FEATURES 0x004b
108 #define FW_FEATURE_FAST_POST 0x1
109 #define FW_FEATURE_LVD_NOTIFY 0x2
110 #define FW_FEATURE_RIO_32BIT 0x4
111 #define FW_FEATURE_RIO_16BIT 0x8
113 #define MBOX_INIT_REQ_QUEUE_A64 0x0052
114 #define MBOX_INIT_RES_QUEUE_A64 0x0053
116 #define MBOX_ENABLE_TARGET_MODE 0x0055
117 #define ENABLE_TARGET_FLAG 0x8000
118 #define ENABLE_TQING_FLAG 0x0004
119 #define ENABLE_MANDATORY_DISC 0x0002
120 #define MBOX_GET_TARGET_STATUS 0x0056
122 /* These are for the ISP2X00 FC cards */
123 #define MBOX_GET_LOOP_ID 0x0020
124 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028
125 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038
126 #define MBOX_GET_RESOURCE_COUNT 0x0042
127 #define MBOX_REQUEST_OFFLINE_MODE 0x0043
128 #define MBOX_ENHANCED_GET_PDB 0x0047
129 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
130 #define MBOX_INIT_FIRMWARE 0x0060
131 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
132 #define MBOX_INIT_LIP 0x0062
133 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063
134 #define MBOX_GET_PORT_DB 0x0064
135 #define MBOX_CLEAR_ACA 0x0065
136 #define MBOX_TARGET_RESET 0x0066
137 #define MBOX_CLEAR_TASK_SET 0x0067
138 #define MBOX_ABORT_TASK_SET 0x0068
139 #define MBOX_GET_FW_STATE 0x0069
140 #define MBOX_GET_PORT_NAME 0x006A
141 #define MBOX_GET_LINK_STATUS 0x006B
142 #define MBOX_INIT_LIP_RESET 0x006C
143 #define MBOX_SEND_SNS 0x006E
144 #define MBOX_FABRIC_LOGIN 0x006F
145 #define MBOX_SEND_CHANGE_REQUEST 0x0070
146 #define MBOX_FABRIC_LOGOUT 0x0071
147 #define MBOX_INIT_LIP_LOGIN 0x0072
148 #define MBOX_LUN_RESET 0x007E
150 #define MBOX_DRIVER_HEARTBEAT 0x005B
151 #define MBOX_FW_HEARTBEAT 0x005C
153 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */
154 #define MBGSD_GET_RATE 0
155 #define MBGSD_SET_RATE 1
156 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */
157 #define MBGSD_ONEGB 0
158 #define MBGSD_TWOGB 1
160 #define MBGSD_FOURGB 3 /* 24XX only */
163 #define ISP2100_SET_PCI_PARAM 0x00ff
165 #define MBOX_BUSY 0x04
168 * Mailbox Command Complete Status Codes
170 #define MBOX_COMMAND_COMPLETE 0x4000
171 #define MBOX_INVALID_COMMAND 0x4001
172 #define MBOX_HOST_INTERFACE_ERROR 0x4002
173 #define MBOX_TEST_FAILED 0x4003
174 #define MBOX_COMMAND_ERROR 0x4005
175 #define MBOX_COMMAND_PARAM_ERROR 0x4006
176 #define MBOX_PORT_ID_USED 0x4007
177 #define MBOX_LOOP_ID_USED 0x4008
178 #define MBOX_ALL_IDS_USED 0x4009
179 #define MBOX_NOT_LOGGED_IN 0x400A
180 /* pseudo mailbox completion codes */
181 #define MBOX_REGS_BUSY 0x6000 /* registers in use */
182 #define MBOX_TIMEOUT 0x6001 /* command timed out */
184 #define MBLOGALL 0x000f
185 #define MBLOGNONE 0x0000
186 #define MBLOGMASK(x) ((x) & 0xf)
189 * Asynchronous event status codes
191 #define ASYNC_BUS_RESET 0x8001
192 #define ASYNC_SYSTEM_ERROR 0x8002
193 #define ASYNC_RQS_XFER_ERR 0x8003
194 #define ASYNC_RSP_XFER_ERR 0x8004
195 #define ASYNC_QWAKEUP 0x8005
196 #define ASYNC_TIMEOUT_RESET 0x8006
197 #define ASYNC_DEVICE_RESET 0x8007
198 #define ASYNC_EXTMSG_UNDERRUN 0x800A
199 #define ASYNC_SCAM_INT 0x800B
200 #define ASYNC_HUNG_SCSI 0x800C
201 #define ASYNC_KILLED_BUS 0x800D
202 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
203 #define ASYNC_LIP_OCCURRED 0x8010
204 #define ASYNC_LOOP_UP 0x8011
205 #define ASYNC_LOOP_DOWN 0x8012
206 #define ASYNC_LOOP_RESET 0x8013
207 #define ASYNC_PDB_CHANGED 0x8014
208 #define ASYNC_CHANGE_NOTIFY 0x8015
209 #define ASYNC_LIP_F8 0x8016
210 #define ASYNC_LIP_ERROR 0x8017
211 #define ASYNC_SECURITY_UPDATE 0x801B
212 #define ASYNC_CMD_CMPLT 0x8020
213 #define ASYNC_CTIO_DONE 0x8021
214 #define ASYNC_IP_XMIT_DONE 0x8022
215 #define ASYNC_IP_RECV_DONE 0x8023
216 #define ASYNC_IP_BROADCAST 0x8024
217 #define ASYNC_IP_RCVQ_LOW 0x8025
218 #define ASYNC_IP_RCVQ_EMPTY 0x8026
219 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027
220 #define ASYNC_PTPMODE 0x8030
221 #define ASYNC_RIO1 0x8031
222 #define ASYNC_RIO2 0x8032
223 #define ASYNC_RIO3 0x8033
224 #define ASYNC_RIO4 0x8034
225 #define ASYNC_RIO5 0x8035
226 #define ASYNC_CONNMODE 0x8036
227 #define ISP_CONN_LOOP 1
228 #define ISP_CONN_PTP 2
229 #define ISP_CONN_BADLIP 3
230 #define ISP_CONN_FATAL 4
231 #define ISP_CONN_LOOPBACK 5
232 #define ASYNC_RIO_RESP 0x8040
233 #define ASYNC_RIO_COMP 0x8042
234 #define ASYNC_RCV_ERR 0x8048
237 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
238 * mailbox command to enable this.
240 #define ASYNC_QFULL_SENT 0x8049
245 #define ASYNC_RJT_SENT 0x8049
248 * All IOCB Queue entries are this size
250 #define QENTRY_LEN 64
253 * Command Structure Definitions
267 #define DSTYPE_32BIT 0
268 #define DSTYPE_64BIT 1
270 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */
271 uint32_t ds_segment; /* unused */
272 uint32_t ds_base; /* 32 bit address of DSD list */
277 * These elements get swizzled around for SBus instances.
279 #define ISP_SWAP8(a, b) { \
286 uint8_t rqs_entry_type;
287 uint8_t rqs_entry_count;
292 /* RQS Flag definitions */
293 #define RQSFLAG_CONTINUATION 0x01
294 #define RQSFLAG_FULL 0x02
295 #define RQSFLAG_BADHEADER 0x04
296 #define RQSFLAG_BADPACKET 0x08
297 #define RQSFLAG_MASK 0x0f
299 /* RQS entry_type definitions */
300 #define RQSTYPE_REQUEST 0x01
301 #define RQSTYPE_DATASEG 0x02
302 #define RQSTYPE_RESPONSE 0x03
303 #define RQSTYPE_MARKER 0x04
304 #define RQSTYPE_CMDONLY 0x05
305 #define RQSTYPE_ATIO 0x06 /* Target Mode */
306 #define RQSTYPE_CTIO 0x07 /* Target Mode */
307 #define RQSTYPE_SCAM 0x08
308 #define RQSTYPE_A64 0x09
309 #define RQSTYPE_A64_CONT 0x0a
310 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
311 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
312 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */
313 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
314 #define RQSTYPE_CTIO1 0x0f /* Target Mode */
315 #define RQSTYPE_STATUS_CONT 0x10
316 #define RQSTYPE_T2RQS 0x11
317 #define RQSTYPE_CTIO7 0x12
318 #define RQSTYPE_IP_XMIT 0x13
319 #define RQSTYPE_TSK_MGMT 0x14
320 #define RQSTYPE_T4RQS 0x15
321 #define RQSTYPE_ATIO2 0x16 /* Target Mode */
322 #define RQSTYPE_CTIO2 0x17 /* Target Mode */
323 #define RQSTYPE_T7RQS 0x18
324 #define RQSTYPE_T3RQS 0x19
325 #define RQSTYPE_IP_XMIT_64 0x1b
326 #define RQSTYPE_CTIO4 0x1e /* Target Mode */
327 #define RQSTYPE_CTIO3 0x1f /* Target Mode */
328 #define RQSTYPE_RIO1 0x21
329 #define RQSTYPE_RIO2 0x22
330 #define RQSTYPE_IP_RECV 0x23
331 #define RQSTYPE_IP_RECV_CONT 0x24
332 #define RQSTYPE_CT_PASSTHRU 0x29
333 #define RQSTYPE_MS_PASSTHRU 0x29
334 #define RQSTYPE_ABORT_IO 0x33
335 #define RQSTYPE_T6RQS 0x48
336 #define RQSTYPE_LOGIN 0x52
337 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */
338 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */
349 uint16_t req_reserved;
351 uint16_t req_seg_count;
353 ispds_t req_dataseg[ISP_RQDSEG];
355 #define ISP_RQDSEG_A64 2
360 uint8_t mrk_reserved0;
362 uint16_t mrk_modifier;
365 uint8_t mrk_reserved1[48];
372 uint8_t mrk_modifier;
373 uint8_t mrk_reserved0;
374 uint8_t mrk_reserved1;
376 uint16_t mrk_reserved2;
378 uint8_t mrk_reserved3[40];
382 #define SYNC_DEVICE 0
383 #define SYNC_TARGET 1
387 #define ISP_RQDSEG_T2 3
395 uint16_t req_reserved;
397 uint16_t req_seg_count;
399 uint32_t req_totalcnt;
400 ispds_t req_dataseg[ISP_RQDSEG_T2];
409 uint16_t req_reserved;
411 uint16_t req_seg_count;
413 uint32_t req_totalcnt;
414 ispds_t req_dataseg[ISP_RQDSEG_T2];
417 #define ISP_RQDSEG_T3 2
425 uint16_t req_reserved;
427 uint16_t req_seg_count;
429 uint32_t req_totalcnt;
430 ispds64_t req_dataseg[ISP_RQDSEG_T3];
432 #define ispreq64_t ispreqt3_t /* same as.... */
440 uint16_t req_reserved;
442 uint16_t req_seg_count;
444 uint32_t req_totalcnt;
445 ispds64_t req_dataseg[ISP_RQDSEG_T3];
448 /* req_flag values */
449 #define REQFLAG_NODISCON 0x0001
450 #define REQFLAG_HTAG 0x0002
451 #define REQFLAG_OTAG 0x0004
452 #define REQFLAG_STAG 0x0008
453 #define REQFLAG_TARGET_RTN 0x0010
455 #define REQFLAG_NODATA 0x0000
456 #define REQFLAG_DATA_IN 0x0020
457 #define REQFLAG_DATA_OUT 0x0040
458 #define REQFLAG_DATA_UNKNOWN 0x0060
460 #define REQFLAG_DISARQ 0x0100
461 #define REQFLAG_FRC_ASYNC 0x0200
462 #define REQFLAG_FRC_SYNC 0x0400
463 #define REQFLAG_FRC_WIDE 0x0800
464 #define REQFLAG_NOPARITY 0x1000
465 #define REQFLAG_STOPQ 0x2000
466 #define REQFLAG_XTRASNS 0x4000
467 #define REQFLAG_PRIORITY 0x8000
476 uint16_t req_reserved;
478 uint16_t req_seg_count;
496 uint16_t req_seg_count;
497 uint16_t req_fc_rsp_dsd_length;
500 uint16_t req_fc_cmnd_dsd_length;
501 uint16_t req_fc_cmnd_dsd_a1500;
502 uint16_t req_fc_cmnd_dsd_a3116;
503 uint16_t req_fc_cmnd_dsd_a4732;
504 uint16_t req_fc_cmnd_dsd_a6348;
505 uint16_t req_fc_rsp_dsd_a1500;
506 uint16_t req_fc_rsp_dsd_a3116;
507 uint16_t req_fc_rsp_dsd_a4732;
508 uint16_t req_fc_rsp_dsd_a6348;
509 uint32_t req_totalcnt;
513 ispds64_t req_dataseg;
521 uint16_t req_seg_count;
522 uint16_t req_reserved;
524 uint8_t req_alen_datadir;
525 uint8_t req_task_management;
526 uint8_t req_task_attribute;
533 ispds64_t req_dataseg;
536 /* I/O Abort Structure */
538 isphdr_t abrt_header;
539 uint32_t abrt_handle;
541 uint16_t abrt_options;
542 uint32_t abrt_cmd_handle;
543 uint8_t abrt_reserved[32];
547 uint8_t abrt_reserved1[12];
549 #define ISP24XX_ABRT_NO_ABTS 0x01 /* don't actually send an ABTS */
550 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */
555 uint32_t req_reserved;
556 ispds_t req_dataseg[ISP_CDSEG];
559 #define ISP_CDSEG64 5
562 ispds64_t req_dataseg[ISP_CDSEG64];
568 uint16_t req_scsi_status;
569 uint16_t req_completion_status;
570 uint16_t req_state_flags;
571 uint16_t req_status_flags;
573 #define req_response_len req_time /* FC only */
574 uint16_t req_sense_len;
576 uint8_t req_response[8]; /* FC only */
577 uint8_t req_sense_data[32];
581 * Status Continuation
585 uint8_t req_sense_data[60];
594 uint16_t req_completion_status;
597 uint16_t req_reserved0;
598 uint16_t req_state_flags;
599 uint16_t req_reserved1;
600 uint16_t req_scsi_status;
601 uint32_t req_fcp_residual;
602 uint32_t req_sense_len;
603 uint32_t req_response_len;
604 uint8_t req_rsp_sense[28];
605 } isp24xx_statusreq_t;
608 * For Qlogic 2X00, the high order byte of SCSI status has
609 * additional meaning.
611 #define RQCS_RU 0x800 /* Residual Under */
612 #define RQCS_RO 0x400 /* Residual Over */
613 #define RQCS_RESID (RQCS_RU|RQCS_RO)
614 #define RQCS_SV 0x200 /* Sense Length Valid */
615 #define RQCS_RV 0x100 /* FCP Response Length Valid */
624 uint16_t ctp_nphdl; /* n-port handle */
625 uint16_t ctp_cmd_cnt; /* Command DSD count */
626 uint16_t ctp_vpidx; /* low 8 bits */
628 uint16_t ctp_reserved0;
629 uint16_t ctp_rsp_cnt; /* Response DSD count */
630 uint16_t ctp_reserved1[5];
631 uint32_t ctp_rsp_bcnt; /* Response byte count */
632 uint32_t ctp_cmd_bcnt; /* Command byte count */
633 ispds64_t ctp_dataseg[2];
642 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */
645 uint16_t ms_reserved1; /* low 8 bits */
647 uint16_t ms_cmd_cnt; /* Command DSD count */
648 uint16_t ms_tot_cnt; /* Total DSD Count */
649 uint8_t ms_type; /* MS type */
650 uint8_t ms_r_ctl; /* R_CTL */
651 uint16_t ms_rxid; /* RX_ID */
652 uint16_t ms_reserved2;
654 uint32_t ms_rsp_bcnt; /* Response byte count */
655 uint32_t ms_cmd_bcnt; /* Command byte count */
656 ispds64_t ms_dataseg[2];
660 * Completion Status Codes.
662 #define RQCS_COMPLETE 0x0000
663 #define RQCS_DMA_ERROR 0x0002
664 #define RQCS_RESET_OCCURRED 0x0004
665 #define RQCS_ABORTED 0x0005
666 #define RQCS_TIMEOUT 0x0006
667 #define RQCS_DATA_OVERRUN 0x0007
668 #define RQCS_DATA_UNDERRUN 0x0015
669 #define RQCS_QUEUE_FULL 0x001C
671 /* 1X00 Only Completion Codes */
672 #define RQCS_INCOMPLETE 0x0001
673 #define RQCS_TRANSPORT_ERROR 0x0003
674 #define RQCS_COMMAND_OVERRUN 0x0008
675 #define RQCS_STATUS_OVERRUN 0x0009
676 #define RQCS_BAD_MESSAGE 0x000a
677 #define RQCS_NO_MESSAGE_OUT 0x000b
678 #define RQCS_EXT_ID_FAILED 0x000c
679 #define RQCS_IDE_MSG_FAILED 0x000d
680 #define RQCS_ABORT_MSG_FAILED 0x000e
681 #define RQCS_REJECT_MSG_FAILED 0x000f
682 #define RQCS_NOP_MSG_FAILED 0x0010
683 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
684 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
685 #define RQCS_ID_MSG_FAILED 0x0013
686 #define RQCS_UNEXP_BUS_FREE 0x0014
687 #define RQCS_XACT_ERR1 0x0018
688 #define RQCS_XACT_ERR2 0x0019
689 #define RQCS_XACT_ERR3 0x001A
690 #define RQCS_BAD_ENTRY 0x001B
691 #define RQCS_PHASE_SKIPPED 0x001D
692 #define RQCS_ARQS_FAILED 0x001E
693 #define RQCS_WIDE_FAILED 0x001F
694 #define RQCS_SYNCXFER_FAILED 0x0020
695 #define RQCS_LVD_BUSERR 0x0021
697 /* 2X00 Only Completion Codes */
698 #define RQCS_PORT_UNAVAILABLE 0x0028
699 #define RQCS_PORT_LOGGED_OUT 0x0029
700 #define RQCS_PORT_CHANGED 0x002A
701 #define RQCS_PORT_BUSY 0x002B
703 /* 24XX Only Completion Codes */
704 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */
705 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */
706 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */
707 #define RQCS_24XX_TMO 0x0030 /* task management overrun */
711 * 1X00 specific State Flags
713 #define RQSF_GOT_BUS 0x0100
714 #define RQSF_GOT_TARGET 0x0200
715 #define RQSF_SENT_CDB 0x0400
716 #define RQSF_XFRD_DATA 0x0800
717 #define RQSF_GOT_STATUS 0x1000
718 #define RQSF_GOT_SENSE 0x2000
719 #define RQSF_XFER_COMPLETE 0x4000
722 * 2X00 specific State Flags
723 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
725 #define RQSF_DATA_IN 0x0020
726 #define RQSF_DATA_OUT 0x0040
727 #define RQSF_STAG 0x0008
728 #define RQSF_OTAG 0x0004
729 #define RQSF_HTAG 0x0002
733 #define RQSTF_DISCONNECT 0x0001
734 #define RQSTF_SYNCHRONOUS 0x0002
735 #define RQSTF_PARITY_ERROR 0x0004
736 #define RQSTF_BUS_RESET 0x0008
737 #define RQSTF_DEVICE_RESET 0x0010
738 #define RQSTF_ABORTED 0x0020
739 #define RQSTF_TIMEOUT 0x0040
740 #define RQSTF_NEGOTIATION 0x0080
743 * 2X00 specific state flags
747 /* RQSF_GOT_STATUS */
748 /* RQSF_XFER_COMPLETE */
751 * 2X00 specific status flags
755 #define RQSTF_DMA_ERROR 0x0080
756 #define RQSTF_LOGOUT 0x2000
761 #ifndef ISP_EXEC_THROTTLE
762 #define ISP_EXEC_THROTTLE 16
766 * About Firmware returns an 'attribute' word in mailbox 6.
767 * These attributes are for 2200 and 2300.
769 #define ISP_FW_ATTR_TMODE 0x01
770 #define ISP_FW_ATTR_SCCLUN 0x02
771 #define ISP_FW_ATTR_FABRIC 0x04
772 #define ISP_FW_ATTR_CLASS2 0x08
773 #define ISP_FW_ATTR_FCTAPE 0x10
774 #define ISP_FW_ATTR_IP 0x20
775 #define ISP_FW_ATTR_VI 0x40
776 #define ISP_FW_ATTR_VI_SOLARIS 0x80
777 #define ISP_FW_ATTR_2KLOGINS 0x100 /* XXX: just a guess */
779 /* and these are for the 2400 */
780 #define ISP2400_FW_ATTR_CLASS2 (1 << 0)
781 #define ISP2400_FW_ATTR_IP (1 << 1)
782 #define ISP2400_FW_ATTR_MULTIID (1 << 2)
783 #define ISP2400_FW_ATTR_SB2 (1 << 3)
784 #define ISP2400_FW_ATTR_T10CRC (1 << 4)
785 #define ISP2400_FW_ATTR_VI (1 << 5)
786 #define ISP2400_FW_ATTR_EXPFW (1 << 13)
789 * Reduced Interrupt Operation Response Queue Entreis
794 uint32_t req_handles[15];
799 uint16_t req_handles[30];
803 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures
807 * Initialization Control Block
809 * Version One (prime) format.
813 uint8_t icb_reserved0;
814 uint16_t icb_fwoptions;
815 uint16_t icb_maxfrmlen;
816 uint16_t icb_maxalloc;
817 uint16_t icb_execthrottle;
818 uint8_t icb_retry_count;
819 uint8_t icb_retry_delay;
820 uint8_t icb_portname[8];
821 uint16_t icb_hardaddr;
822 uint8_t icb_iqdevtype;
823 uint8_t icb_logintime;
824 uint8_t icb_nodename[8];
825 uint16_t icb_rqstout;
826 uint16_t icb_rspnsin;
827 uint16_t icb_rqstqlen;
828 uint16_t icb_rsltqlen;
829 uint16_t icb_rqstaddr[4];
830 uint16_t icb_respaddr[4];
831 uint16_t icb_lunenables;
834 uint16_t icb_lunetimeout;
835 uint16_t icb_reserved1;
836 uint16_t icb_xfwoptions;
837 uint8_t icb_racctimer;
838 uint8_t icb_idelaytimer;
839 uint16_t icb_zfwoptions;
840 uint16_t icb_reserved2[13];
843 #define ICB_VERSION1 1
845 #define ICBOPT_EXTENDED 0x8000
846 #define ICBOPT_BOTH_WWNS 0x4000
847 #define ICBOPT_FULL_LOGIN 0x2000
848 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */
849 #define ICBOPT_PREVLOOP 0x0800
850 #define ICBOPT_SRCHDOWN 0x0400
851 #define ICBOPT_NOLIP 0x0200
852 #define ICBOPT_PDBCHANGE_AE 0x0100
853 #define ICBOPT_INI_TGTTYPE 0x0080
854 #define ICBOPT_INI_ADISC 0x0040
855 #define ICBOPT_INI_DISABLE 0x0020
856 #define ICBOPT_TGT_ENABLE 0x0010
857 #define ICBOPT_FAST_POST 0x0008
858 #define ICBOPT_FULL_DUPLEX 0x0004
859 #define ICBOPT_FAIRNESS 0x0002
860 #define ICBOPT_HARD_ADDRESS 0x0001
862 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */
863 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */
864 #define ICBXOPT_FCTAPE_CONFIRM 0x2000
865 #define ICBXOPT_FCTAPE 0x1000
866 #define ICBXOPT_CLASS2_ACK0 0x0200
867 #define ICBXOPT_CLASS2 0x0100
868 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */
869 #define ICBXOPT_TOPO_MASK 0x0070
870 #define ICBXOPT_LOOP_ONLY 0x0000
871 #define ICBXOPT_PTP_ONLY 0x0010
872 #define ICBXOPT_LOOP_2_PTP 0x0020
873 #define ICBXOPT_PTP_2_LOOP 0x0030
875 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
876 * RIO is not defined for the 23XX cards (just 2200)
878 #define ICBXOPT_RIO_OFF 0
879 #define ICBXOPT_RIO_16BIT 1
880 #define ICBXOPT_RIO_32BIT 2
881 #define ICBXOPT_RIO_16BIT_IOCB 3
882 #define ICBXOPT_RIO_32BIT_IOCB 4
883 #define ICBXOPT_ZIO 5
884 #define ICBXOPT_TIMER_MASK 0x7
886 #define ICBZOPT_RATE_MASK 0xC000
887 #define ICBZOPT_RATE_ONEGB 0x0000
888 #define ICBZOPT_RATE_AUTO 0x8000
889 #define ICBZOPT_RATE_TWOGB 0x4000
890 #define ICBZOPT_50_OHM 0x2000
891 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */
892 #define ICBZOPT_RSPSZ_MASK 0x0030
893 #define ICBZOPT_RSPSZ_24 0x0000
894 #define ICBZOPT_RSPSZ_12 0x0010
895 #define ICBZOPT_RSPSZ_24A 0x0020
896 #define ICBZOPT_RSPSZ_32 0x0030
897 #define ICBZOPT_SOFTID 0x0002
898 #define ICBZOPT_ENA_RDXFR_RDY 0x0001
900 /* 2400 F/W options */
901 #define ICB2400_OPT1_BOTH_WWNS 0x00004000
902 #define ICB2400_OPT1_FULL_LOGIN 0x00002000
903 #define ICB2400_OPT1_PREVLOOP 0x00000800
904 #define ICB2400_OPT1_SRCHDOWN 0x00000400
905 #define ICB2400_OPT1_NOLIP 0x00000200
906 #define ICB2400_OPT1_INI_DISABLE 0x00000020
907 #define ICB2400_OPT1_TGT_ENABLE 0x00000010
908 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004
909 #define ICB2400_OPT1_FAIRNESS 0x00000002
910 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001
912 #define ICB2400_OPT2_FCTAPE 0x00001000
913 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200
914 #define ICB2400_OPT2_CLASS2 0x00000100
915 #define ICB2400_OPT2_NO_PLAY 0x00000080
916 #define ICB2400_OPT2_TOPO_MASK 0x00000070
917 #define ICB2400_OPT2_LOOP_ONLY 0x00000000
918 #define ICB2400_OPT2_PTP_ONLY 0x00000010
919 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020
920 #define ICB2400_OPT2_PTP_2_LOOP 0x00000030
921 #define ICB2400_OPT2_TIMER_MASK 0x00000007
922 #define ICB2400_OPT2_ZIO 0x00000005
923 #define ICB2400_OPT2_ZIO1 0x00000006
925 #define ICB2400_OPT3_75_OHM 0x00010000
926 #define ICB2400_OPT3_RATE_MASK 0x0000E000
927 #define ICB2400_OPT3_RATE_ONEGB 0x00000000
928 #define ICB2400_OPT3_RATE_TWOGB 0x00002000
929 #define ICB2400_OPT3_RATE_AUTO 0x00004000
930 #define ICB2400_OPT3_RATE_FOURGB 0x00006000
931 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200
932 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080
933 #define ICB2400_OPT3_ENA_OOF 0x00000040
934 /* note that a response size flag of zero is reserved! */
935 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030
936 #define ICB2400_OPT3_RSPSZ_12 0x00000010
937 #define ICB2400_OPT3_RSPSZ_24 0x00000020
938 #define ICB2400_OPT3_RSPSZ_32 0x00000030
939 #define ICB2400_OPT3_SOFTID 0x00000002
941 #define ICB_MIN_FRMLEN 256
942 #define ICB_MAX_FRMLEN 2112
943 #define ICB_DFLT_FRMLEN 1024
944 #define ICB_DFLT_ALLOC 256
945 #define ICB_DFLT_THROTTLE 16
946 #define ICB_DFLT_RDELAY 5
947 #define ICB_DFLT_RCOUNT 3
949 #define ICB_LOGIN_TOV 30
950 #define ICB_LUN_ENABLE_TOV 180
954 * And somebody at QLogic had a great idea that you could just change
955 * the structure *and* keep the version number the same as the other cards.
958 uint16_t icb_version;
959 uint16_t icb_reserved0;
960 uint16_t icb_maxfrmlen;
961 uint16_t icb_execthrottle;
962 uint16_t icb_xchgcnt;
963 uint16_t icb_hardaddr;
964 uint8_t icb_portname[8];
965 uint8_t icb_nodename[8];
966 uint16_t icb_rspnsin;
967 uint16_t icb_rqstout;
968 uint16_t icb_retry_count;
970 uint16_t icb_rsltqlen;
971 uint16_t icb_rqstqlen;
972 uint16_t icb_ldn_nols;
973 uint16_t icb_prqstqlen;
974 uint16_t icb_rqstaddr[4];
975 uint16_t icb_respaddr[4];
976 uint16_t icb_priaddr[4];
977 uint16_t icb_reserved1[4];
978 uint16_t icb_atio_in;
979 uint16_t icb_atioqlen;
980 uint16_t icb_atioqaddr[4];
981 uint16_t icb_idelaytimer;
982 uint16_t icb_logintime;
983 uint32_t icb_fwoptions1;
984 uint32_t icb_fwoptions2;
985 uint32_t icb_fwoptions3;
986 uint16_t icb_reserved2[12];
989 #define RQRSP_ADDR0015 0
990 #define RQRSP_ADDR1631 1
991 #define RQRSP_ADDR3247 2
992 #define RQRSP_ADDR4863 3
1004 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \
1005 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \
1006 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \
1007 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \
1008 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \
1009 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \
1010 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \
1011 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \
1012 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff)
1014 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \
1015 wwn = ((uint64_t) array[ICB_NNM0]) | \
1016 ((uint64_t) array[ICB_NNM1] << 8) | \
1017 ((uint64_t) array[ICB_NNM2] << 16) | \
1018 ((uint64_t) array[ICB_NNM3] << 24) | \
1019 ((uint64_t) array[ICB_NNM4] << 32) | \
1020 ((uint64_t) array[ICB_NNM5] << 40) | \
1021 ((uint64_t) array[ICB_NNM6] << 48) | \
1022 ((uint64_t) array[ICB_NNM7] << 56)
1025 * Port Data Base Element
1029 uint16_t pdb_options;
1032 uint8_t pdb_hardaddr_bits[4];
1033 uint8_t pdb_portid_bits[4];
1034 uint8_t pdb_nodename[8];
1035 uint8_t pdb_portname[8];
1036 uint16_t pdb_execthrottle;
1037 uint16_t pdb_exec_count;
1038 uint8_t pdb_retry_count;
1039 uint8_t pdb_retry_delay;
1040 uint16_t pdb_resalloc;
1041 uint16_t pdb_curalloc;
1044 uint16_t pdb_tl_next;
1045 uint16_t pdb_tl_last;
1046 uint16_t pdb_features; /* PLOGI, Common Service */
1047 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */
1048 uint16_t pdb_roi; /* PLOGI, Common Service */
1050 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */
1051 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */
1052 uint16_t pdb_ncseq; /* PLOGI, Class 3 */
1053 uint16_t pdb_noseq; /* PLOGI, Class 3 */
1054 uint16_t pdb_labrtflg;
1055 uint16_t pdb_lstopflg;
1056 uint16_t pdb_sqhead;
1057 uint16_t pdb_sqtail;
1058 uint16_t pdb_ptimer;
1059 uint16_t pdb_nxt_seqid;
1060 uint16_t pdb_fcount;
1061 uint16_t pdb_prli_len;
1062 uint16_t pdb_prli_svc0;
1063 uint16_t pdb_prli_svc3;
1064 uint16_t pdb_loopid;
1065 uint16_t pdb_il_ptr;
1066 uint16_t pdb_sl_ptr;
1069 #define PDB_OPTIONS_XMITTING (1<<11)
1070 #define PDB_OPTIONS_LNKXMIT (1<<10)
1071 #define PDB_OPTIONS_ABORTED (1<<9)
1072 #define PDB_OPTIONS_ADISC (1<<1)
1074 #define PDB_STATE_DISCOVERY 0
1075 #define PDB_STATE_WDISC_ACK 1
1076 #define PDB_STATE_PLOGI 2
1077 #define PDB_STATE_PLOGI_ACK 3
1078 #define PDB_STATE_PRLI 4
1079 #define PDB_STATE_PRLI_ACK 5
1080 #define PDB_STATE_LOGGED_IN 6
1081 #define PDB_STATE_PORT_UNAVAIL 7
1082 #define PDB_STATE_PRLO 8
1083 #define PDB_STATE_PRLO_ACK 9
1084 #define PDB_STATE_PLOGO 10
1085 #define PDB_STATE_PLOG_ACK 11
1087 #define SVC3_TGT_ROLE 0x10
1088 #define SVC3_INI_ROLE 0x20
1089 #define SVC3_ROLE_MASK 0x30
1090 #define SVC3_ROLE_SHIFT 4
1092 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
1093 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2])
1096 * Port Data Base Element- 24XX cards
1100 uint8_t pdb_curstate;
1101 uint8_t pdb_laststate;
1102 uint8_t pdb_hardaddr_bits[4];
1103 uint8_t pdb_portid_bits[4];
1104 #define pdb_nxt_seqid_2400 pdb_portid_bits[3]
1105 uint16_t pdb_retry_timer;
1106 uint16_t pdb_handle;
1107 uint16_t pdb_rcv_dsize;
1108 uint16_t pdb_reserved0;
1109 uint16_t pdb_prli_svc0;
1110 uint16_t pdb_prli_svc3;
1111 uint8_t pdb_portname[8];
1112 uint8_t pdb_nodename[8];
1113 uint8_t pdb_reserved1[24];
1116 #define PDB2400_TID_SUPPORTED 0x4000
1117 #define PDB2400_FC_TAPE 0x0080
1118 #define PDB2400_CLASS2_ACK0 0x0040
1119 #define PDB2400_FCP_CONF 0x0020
1120 #define PDB2400_CLASS2 0x0010
1121 #define PDB2400_ADDR_VALID 0x0002
1124 * Common elements from the above two structures that are actually useful to us.
1129 uint32_t s3_role : 8,
1131 uint8_t portname[8];
1132 uint8_t nodename[8];
1136 * Genericized Port Login/Logout software structure
1144 /* the flags to use are those for PLOGX_FLG_* below */
1147 * ISP24XX- Login/Logout Port IOCB
1150 isphdr_t plogx_header;
1151 uint32_t plogx_handle;
1152 uint16_t plogx_status;
1153 uint16_t plogx_nphdl;
1154 uint16_t plogx_flags;
1155 uint16_t plogx_vphdl; /* low 8 bits */
1156 uint16_t plogx_portlo; /* low 16 bits */
1157 uint16_t plogx_rspsz_porthi;
1164 #define PLOGX_STATUS_OK 0x00
1165 #define PLOGX_STATUS_UNAVAIL 0x28
1166 #define PLOGX_STATUS_LOGOUT 0x29
1167 #define PLOGX_STATUS_IOCBERR 0x31
1169 #define PLOGX_IOCBERR_NOLINK 0x01
1170 #define PLOGX_IOCBERR_NOIOCB 0x02
1171 #define PLOGX_IOCBERR_NOXGHG 0x03
1172 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */
1173 #define PLOGX_IOCBERR_NOFABRIC 0x05
1174 #define PLOGX_IOCBERR_NOTREADY 0x07
1175 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */
1176 #define PLOGX_IOCBERR_NOPCB 0x0a
1177 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */
1178 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */
1179 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */
1180 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */
1181 #define PLOGX_IOCBERR_NOHANDLE 0x1c
1182 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */
1184 #define PLOGX_FLG_CMD_MASK 0xf
1185 #define PLOGX_FLG_CMD_PLOGI 0
1186 #define PLOGX_FLG_CMD_PRLI 1
1187 #define PLOGX_FLG_CMD_PDISC 2
1188 #define PLOGX_FLG_CMD_LOGO 8
1189 #define PLOGX_FLG_CMD_PRLO 9
1190 #define PLOGX_FLG_CMD_TPRLO 10
1192 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */
1193 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */
1194 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */
1195 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */
1196 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */
1197 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */
1198 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */
1200 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */
1201 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */
1204 * Simple Name Server Data Structures
1206 #define SNS_GA_NXT 0x100
1207 #define SNS_GPN_ID 0x112
1208 #define SNS_GNN_ID 0x113
1209 #define SNS_GFF_ID 0x11F
1210 #define SNS_GID_FT 0x171
1211 #define SNS_RFT_ID 0x217
1213 uint16_t snscb_rblen; /* response buffer length (words) */
1214 uint16_t snscb_reserved0;
1215 uint16_t snscb_addr[4]; /* response buffer address */
1216 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1217 uint16_t snscb_reserved1;
1218 uint16_t snscb_data[1]; /* variable data */
1219 } sns_screq_t; /* Subcommand Request Structure */
1222 uint16_t snscb_rblen; /* response buffer length (words) */
1223 uint16_t snscb_reserved0;
1224 uint16_t snscb_addr[4]; /* response buffer address */
1225 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1226 uint16_t snscb_reserved1;
1228 uint16_t snscb_reserved2;
1229 uint32_t snscb_reserved3;
1230 uint32_t snscb_port;
1232 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
1235 uint16_t snscb_rblen; /* response buffer length (words) */
1236 uint16_t snscb_reserved0;
1237 uint16_t snscb_addr[4]; /* response buffer address */
1238 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1239 uint16_t snscb_reserved1;
1241 uint16_t snscb_reserved2;
1242 uint32_t snscb_reserved3;
1243 uint32_t snscb_portid;
1245 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
1248 uint16_t snscb_rblen; /* response buffer length (words) */
1249 uint16_t snscb_reserved0;
1250 uint16_t snscb_addr[4]; /* response buffer address */
1251 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1252 uint16_t snscb_reserved1;
1254 uint16_t snscb_mword_div_2;
1255 uint32_t snscb_reserved3;
1256 uint32_t snscb_fc4_type;
1258 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
1261 uint16_t snscb_rblen; /* response buffer length (words) */
1262 uint16_t snscb_reserved0;
1263 uint16_t snscb_addr[4]; /* response buffer address */
1264 uint16_t snscb_sblen; /* subcommand buffer length (words) */
1265 uint16_t snscb_reserved1;
1267 uint16_t snscb_reserved2;
1268 uint32_t snscb_reserved3;
1269 uint32_t snscb_port;
1270 uint32_t snscb_fc4_types[8];
1272 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
1275 ct_hdr_t snscb_cthdr;
1276 uint8_t snscb_port_type;
1277 uint8_t snscb_port_id[3];
1278 uint8_t snscb_portname[8];
1279 uint16_t snscb_data[1]; /* variable data */
1280 } sns_scrsp_t; /* Subcommand Response Structure */
1283 ct_hdr_t snscb_cthdr;
1284 uint8_t snscb_port_type;
1285 uint8_t snscb_port_id[3];
1286 uint8_t snscb_portname[8];
1287 uint8_t snscb_pnlen; /* symbolic port name length */
1288 uint8_t snscb_pname[255]; /* symbolic port name */
1289 uint8_t snscb_nodename[8];
1290 uint8_t snscb_nnlen; /* symbolic node name length */
1291 uint8_t snscb_nname[255]; /* symbolic node name */
1292 uint8_t snscb_ipassoc[8];
1293 uint8_t snscb_ipaddr[16];
1294 uint8_t snscb_svc_class[4];
1295 uint8_t snscb_fc4_types[32];
1296 uint8_t snscb_fpname[8];
1297 uint8_t snscb_reserved;
1298 uint8_t snscb_hardaddr[3];
1299 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */
1300 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t))
1303 ct_hdr_t snscb_cthdr;
1304 uint8_t snscb_wwn[8];
1306 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t))
1309 ct_hdr_t snscb_cthdr;
1310 uint32_t snscb_fc4_features[32];
1312 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t))
1315 ct_hdr_t snscb_cthdr;
1321 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
1322 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
1325 * Other Misc Structures
1328 /* ELS Pass Through */
1331 uint32_t els_handle;
1332 uint16_t els_status;
1334 uint16_t els_xmit_dsd_count; /* outgoing only */
1338 uint16_t els_recv_dsd_count; /* outgoing only */
1340 uint8_t els_reserved1;
1342 uint8_t els_did_mid;
1344 uint8_t els_reserved2;
1345 uint16_t els_reserved3;
1346 uint16_t els_ctl_flags;
1349 uint32_t _els_bytecnt;
1350 uint32_t _els_subcode1;
1351 uint32_t _els_subcode2;
1352 uint8_t _els_reserved4[20];
1355 uint32_t _els_recv_bytecnt;
1356 uint32_t _els_xmit_bytecnt;
1357 uint32_t _els_xmit_dsd_length;
1358 uint16_t _els_xmit_dsd_a1500;
1359 uint16_t _els_xmit_dsd_a3116;
1360 uint16_t _els_xmit_dsd_a4732;
1361 uint16_t _els_xmit_dsd_a6348;
1362 uint32_t _els_recv_dsd_length;
1363 uint16_t _els_recv_dsd_a1500;
1364 uint16_t _els_recv_dsd_a3116;
1365 uint16_t _els_recv_dsd_a4732;
1366 uint16_t _els_recv_dsd_a6348;
1369 #define els_bytecnt inout.in._els_bytecnt
1370 #define els_subcode1 inout.in._els_subcode1
1371 #define els_subcode2 inout.in._els_subcode2
1372 #define els_reserved4 inout.in._els_reserved4
1373 #define els_recv_bytecnt inout.out._els_recv_bytecnt
1374 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt
1375 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length
1376 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500
1377 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116
1378 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732
1379 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348
1380 #define els_recv_dsd_length inout.out._els_recv_dsd_length
1381 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500
1382 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116
1383 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732
1384 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348
1388 * A handy package structure for running FC-SCSI commands via RUN IOCB A64.
1397 uint32_t data_length;
1404 uint32_t data_residual;
1407 uint16_t sense_length;
1408 uint8_t sense_data[32];
1412 #endif /* _ISPMBOX_H */