sys/dev/sound/pci/hda/hdac.c

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
   4  * Copyright (c) 2008 Alexander Motin <mav@FreeBSD.org>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 /*
  30  * Intel High Definition Audio (Controller) driver for FreeBSD. Be advised
  31  * that this driver still in its early stage, and possible of rewrite are
  32  * pretty much guaranteed. There are supposedly several distinct parent/child
  33  * busses to make this "perfect", but as for now and for the sake of
  34  * simplicity, everything is gobble up within single source.
  35  *
  36  * List of subsys:
  37  *     1) HDA Controller support
  38  *     2) HDA Codecs support, which may include
  39  *        - HDA
  40  *        - Modem
  41  *        - HDMI
  42  *     3) Widget parser - the real magic of why this driver works on so
  43  *        many hardwares with minimal vendor specific quirk. The original
  44  *        parser was written using Ruby and can be found at
  45  *        http://people.freebsd.org/~ariff/HDA/parser.rb . This crude
  46  *        ruby parser take the verbose dmesg dump as its input. Refer to
  47  *        http://www.microsoft.com/whdc/device/audio/default.mspx for various
  48  *        interesting documents, especially UAA (Universal Audio Architecture).
  49  *     4) Possible vendor specific support.
  50  *        (snd_hda_intel, snd_hda_ati, etc..)
  51  *
  52  * Thanks to Ahmad Ubaidah Omar @ Defenxis Sdn. Bhd. for the
  53  * Compaq V3000 with Conexant HDA.
  54  *
  55  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  56  *    *                                                                 *
  57  *    *        This driver is a collaborative effort made by:           *
  58  *    *                                                                 *
  59  *    *          Stephane E. Potvin <sepotvin@videotron.ca>             *
  60  *    *               Andrea Bittau <a.bittau@cs.ucl.ac.uk>             *
  61  *    *               Wesley Morgan <morganw@chemikals.org>             *
  62  *    *              Daniel Eischen <deischen@FreeBSD.org>              *
  63  *    *             Maxime Guillaud <bsd-ports@mguillaud.net>           *
  64  *    *              Ariff Abdullah <ariff@FreeBSD.org>                 *
  65  *    *             Alexander Motin <mav@FreeBSD.org>                   *
  66  *    *                                                                 *
  67  *    *   ....and various people from freebsd-multimedia@FreeBSD.org    *
  68  *    *                                                                 *
  69  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  70  */
  71
  72 #include <dev/sound/pcm/sound.h>
  73 #include <dev/pci/pcireg.h>
  74 #include <dev/pci/pcivar.h>
  75
  76 #include <sys/ctype.h>
  77 #include <sys/taskqueue.h>
  78
  79 #include <dev/sound/pci/hda/hdac_private.h>
  80 #include <dev/sound/pci/hda/hdac_reg.h>
  81 #include <dev/sound/pci/hda/hda_reg.h>
  82 #include <dev/sound/pci/hda/hdac.h>
  83
  84 #include "mixer_if.h"
  85
  86 #define HDA_DRV_TEST_REV        "20090329_0131"
  87
  88 SND_DECLARE_FILE("$FreeBSD$");
  89
  90 #define HDA_BOOTVERBOSE(stmt)   do {                    \
  91         if (bootverbose != 0 || snd_verbose > 3) {      \
  92                 stmt                                    \
  93         }                                               \
  94 } while(0)
  95
  96 #define HDA_BOOTHVERBOSE(stmt)  do {                    \
  97         if (snd_verbose > 3) {                          \
  98                 stmt                                    \
  99         }                                               \
 100 } while(0)
 101
 102 #if 1
 103 #undef HDAC_INTR_EXTRA
 104 #define HDAC_INTR_EXTRA         1
 105 #endif
 106
 107 #define hdac_lock(sc)           snd_mtxlock((sc)->lock)
 108 #define hdac_unlock(sc)         snd_mtxunlock((sc)->lock)
 109 #define hdac_lockassert(sc)     snd_mtxassert((sc)->lock)
 110 #define hdac_lockowned(sc)      mtx_owned((sc)->lock)
 111
 112 #undef HDAC_MSI_ENABLED
 113 #if __FreeBSD_version >= 700026 ||                                      \
 114     (__FreeBSD_version < 700000 && __FreeBSD_version >= 602106)
 115 #define HDAC_MSI_ENABLED        1
 116 #endif
 117
 118 #define HDA_FLAG_MATCH(fl, v)   (((fl) & (v)) == (v))
 119 #define HDA_DEV_MATCH(fl, v)    ((fl) == (v) || \
 120                                 (fl) == 0xffffffff || \
 121                                 (((fl) & 0xffff0000) == 0xffff0000 && \
 122                                 ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \
 123                                 (((fl) & 0x0000ffff) == 0x0000ffff && \
 124                                 ((fl) & 0xffff0000) == ((v) & 0xffff0000)))
 125 #define HDA_MATCH_ALL           0xffffffff
 126 #define HDAC_INVALID            0xffffffff
 127
 128 /* Default controller / jack sense poll: 250ms */
 129 #define HDAC_POLL_INTERVAL      max(hz >> 2, 1)
 130
 131 /*
 132  * Make room for possible 4096 playback/record channels, in 100 years to come.
 133  */
 134 #define HDAC_TRIGGER_NONE       0x00000000
 135 #define HDAC_TRIGGER_PLAY       0x00000fff
 136 #define HDAC_TRIGGER_REC        0x00fff000
 137 #define HDAC_TRIGGER_UNSOL      0x80000000
 138
 139 #define HDA_MODEL_CONSTRUCT(vendor, model)      \
 140                 (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
 141
 142 /* Controller models */
 143
 144 /* Intel */
 145 #define INTEL_VENDORID          0x8086
 146 #define HDA_INTEL_82801F        HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
 147 #define HDA_INTEL_63XXESB       HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
 148 #define HDA_INTEL_82801G        HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
 149 #define HDA_INTEL_82801H        HDA_MODEL_CONSTRUCT(INTEL, 0x284b)
 150 #define HDA_INTEL_82801I        HDA_MODEL_CONSTRUCT(INTEL, 0x293e)
 151 #define HDA_INTEL_82801J        HDA_MODEL_CONSTRUCT(INTEL, 0x3a3e)
 152 #define HDA_INTEL_PCH           HDA_MODEL_CONSTRUCT(INTEL, 0x3b56)
 153 #define HDA_INTEL_SCH           HDA_MODEL_CONSTRUCT(INTEL, 0x811b)
 154 #define HDA_INTEL_ALL           HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
 155
 156 /* Nvidia */
 157 #define NVIDIA_VENDORID         0x10de
 158 #define HDA_NVIDIA_MCP51        HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)
 159 #define HDA_NVIDIA_MCP55        HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)
 160 #define HDA_NVIDIA_MCP61_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)
 161 #define HDA_NVIDIA_MCP61_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)
 162 #define HDA_NVIDIA_MCP65_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)
 163 #define HDA_NVIDIA_MCP65_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)
 164 #define HDA_NVIDIA_MCP67_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)
 165 #define HDA_NVIDIA_MCP67_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)
 166 #define HDA_NVIDIA_MCP78_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0774)
 167 #define HDA_NVIDIA_MCP78_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0775)
 168 #define HDA_NVIDIA_MCP78_3      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0776)
 169 #define HDA_NVIDIA_MCP78_4      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0777)
 170 #define HDA_NVIDIA_MCP73_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fc)
 171 #define HDA_NVIDIA_MCP73_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x07fd)
 172 #define HDA_NVIDIA_MCP79_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac0)
 173 #define HDA_NVIDIA_MCP79_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac1)
 174 #define HDA_NVIDIA_MCP79_3      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac2)
 175 #define HDA_NVIDIA_MCP79_4      HDA_MODEL_CONSTRUCT(NVIDIA, 0x0ac3)
 176 #define HDA_NVIDIA_ALL          HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)
 177
 178 /* ATI */
 179 #define ATI_VENDORID            0x1002
 180 #define HDA_ATI_SB450           HDA_MODEL_CONSTRUCT(ATI, 0x437b)
 181 #define HDA_ATI_SB600           HDA_MODEL_CONSTRUCT(ATI, 0x4383)
 182 #define HDA_ATI_RS600           HDA_MODEL_CONSTRUCT(ATI, 0x793b)
 183 #define HDA_ATI_RS690           HDA_MODEL_CONSTRUCT(ATI, 0x7919)
 184 #define HDA_ATI_RS780           HDA_MODEL_CONSTRUCT(ATI, 0x960f)
 185 #define HDA_ATI_R600            HDA_MODEL_CONSTRUCT(ATI, 0xaa00)
 186 #define HDA_ATI_RV630           HDA_MODEL_CONSTRUCT(ATI, 0xaa08)
 187 #define HDA_ATI_RV610           HDA_MODEL_CONSTRUCT(ATI, 0xaa10)
 188 #define HDA_ATI_RV670           HDA_MODEL_CONSTRUCT(ATI, 0xaa18)
 189 #define HDA_ATI_RV635           HDA_MODEL_CONSTRUCT(ATI, 0xaa20)
 190 #define HDA_ATI_RV620           HDA_MODEL_CONSTRUCT(ATI, 0xaa28)
 191 #define HDA_ATI_RV770           HDA_MODEL_CONSTRUCT(ATI, 0xaa30)
 192 #define HDA_ATI_RV730           HDA_MODEL_CONSTRUCT(ATI, 0xaa38)
 193 #define HDA_ATI_RV710           HDA_MODEL_CONSTRUCT(ATI, 0xaa40)
 194 #define HDA_ATI_RV740           HDA_MODEL_CONSTRUCT(ATI, 0xaa48)
 195 #define HDA_ATI_ALL             HDA_MODEL_CONSTRUCT(ATI, 0xffff)
 196
 197 /* VIA */
 198 #define VIA_VENDORID            0x1106
 199 #define HDA_VIA_VT82XX          HDA_MODEL_CONSTRUCT(VIA, 0x3288)
 200 #define HDA_VIA_ALL             HDA_MODEL_CONSTRUCT(VIA, 0xffff)
 201
 202 /* SiS */
 203 #define SIS_VENDORID            0x1039
 204 #define HDA_SIS_966             HDA_MODEL_CONSTRUCT(SIS, 0x7502)
 205 #define HDA_SIS_ALL             HDA_MODEL_CONSTRUCT(SIS, 0xffff)
 206
 207 /* ULI */
 208 #define ULI_VENDORID            0x10b9
 209 #define HDA_ULI_M5461           HDA_MODEL_CONSTRUCT(ULI, 0x5461)
 210 #define HDA_ULI_ALL             HDA_MODEL_CONSTRUCT(ULI, 0xffff)
 211
 212 /* OEM/subvendors */
 213
 214 /* Intel */
 215 #define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600)
 216
 217 /* HP/Compaq */
 218 #define HP_VENDORID             0x103c
 219 #define HP_V3000_SUBVENDOR      HDA_MODEL_CONSTRUCT(HP, 0x30b5)
 220 #define HP_NX7400_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a2)
 221 #define HP_NX6310_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30aa)
 222 #define HP_NX6325_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30b0)
 223 #define HP_XW4300_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x3013)
 224 #define HP_3010_SUBVENDOR       HDA_MODEL_CONSTRUCT(HP, 0x3010)
 225 #define HP_DV5000_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a5)
 226 #define HP_DC7700S_SUBVENDOR    HDA_MODEL_CONSTRUCT(HP, 0x2801)
 227 #define HP_DC7700_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x2802)
 228 #define HP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(HP, 0xffff)
 229 /* What is wrong with XN 2563 anyway? (Got the picture ?) */
 230 #define HP_NX6325_SUBVENDORX    0x103c30b0
 231
 232 /* Dell */
 233 #define DELL_VENDORID           0x1028
 234 #define DELL_D630_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01f9)
 235 #define DELL_D820_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01cc)
 236 #define DELL_V1400_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x0227)
 237 #define DELL_V1500_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x0228)
 238 #define DELL_I1300_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x01c9)
 239 #define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7)
 240 #define DELL_OPLX745_SUBVENDOR  HDA_MODEL_CONSTRUCT(DELL, 0x01da)
 241 #define DELL_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(DELL, 0xffff)
 242
 243 /* Clevo */
 244 #define CLEVO_VENDORID          0x1558
 245 #define CLEVO_D900T_SUBVENDOR   HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)
 246 #define CLEVO_ALL_SUBVENDOR     HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)
 247
 248 /* Acer */
 249 #define ACER_VENDORID           0x1025
 250 #define ACER_A5050_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x010f)
 251 #define ACER_A4520_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0127)
 252 #define ACER_A4710_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x012f)
 253 #define ACER_A4715_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0133)
 254 #define ACER_3681WXM_SUBVENDOR  HDA_MODEL_CONSTRUCT(ACER, 0x0110)
 255 #define ACER_T6292_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x011b)
 256 #define ACER_T5320_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x011f)
 257 #define ACER_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ACER, 0xffff)
 258
 259 /* Asus */
 260 #define ASUS_VENDORID           0x1043
 261 #define ASUS_A8X_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1153)
 262 #define ASUS_U5F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 263 #define ASUS_W6F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 264 #define ASUS_A7M_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1323)
 265 #define ASUS_F3JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1338)
 266 #define ASUS_G2K_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1339)
 267 #define ASUS_A7T_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)
 268 #define ASUS_W2J_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1971)
 269 #define ASUS_M5200_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x1993)
 270 #define ASUS_P1AH2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 271 #define ASUS_M2NPVMX_SUBVENDOR  HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 272 #define ASUS_M2V_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)
 273 #define ASUS_P5BWD_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)
 274 #define ASUS_M2N_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x8234)
 275 #define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)
 276 #define ASUS_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0xffff)
 277
 278 /* IBM / Lenovo */
 279 #define IBM_VENDORID            0x1014
 280 #define IBM_M52_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0x02f6)
 281 #define IBM_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0xffff)
 282
 283 /* Lenovo */
 284 #define LENOVO_VENDORID         0x17aa
 285 #define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)
 286 #define LENOVO_3KN200_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x384e)
 287 #define LENOVO_TCA55_SUBVENDOR  HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)
 288 #define LENOVO_ALL_SUBVENDOR    HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)
 289
 290 /* Samsung */
 291 #define SAMSUNG_VENDORID        0x144d
 292 #define SAMSUNG_Q1_SUBVENDOR    HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)
 293 #define SAMSUNG_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)
 294
 295 /* Medion ? */
 296 #define MEDION_VENDORID                 0x161f
 297 #define MEDION_MD95257_SUBVENDOR        HDA_MODEL_CONSTRUCT(MEDION, 0x203d)
 298 #define MEDION_ALL_SUBVENDOR            HDA_MODEL_CONSTRUCT(MEDION, 0xffff)
 299
 300 /* Apple Computer Inc. */
 301 #define APPLE_VENDORID          0x106b
 302 #define APPLE_MB3_SUBVENDOR     HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)
 303
 304 /* Sony */
 305 #define SONY_VENDORID           0x104d
 306 #define SONY_S5_SUBVENDOR       HDA_MODEL_CONSTRUCT(SONY, 0x81cc)
 307 #define SONY_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(SONY, 0xffff)
 308
 309 /*
 310  * Apple Intel MacXXXX seems using Sigmatel codec/vendor id
 311  * instead of their own, which is beyond my comprehension
 312  * (see HDA_CODEC_STAC9221 below).
 313  */
 314 #define APPLE_INTEL_MAC         0x76808384
 315
 316 /* LG Electronics */
 317 #define LG_VENDORID             0x1854
 318 #define LG_LW20_SUBVENDOR       HDA_MODEL_CONSTRUCT(LG, 0x0018)
 319 #define LG_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(LG, 0xffff)
 320
 321 /* Fujitsu Siemens */
 322 #define FS_VENDORID             0x1734
 323 #define FS_PA1510_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10b8)
 324 #define FS_SI1848_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10cd)
 325 #define FS_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FS, 0xffff)
 326
 327 /* Fujitsu Limited */
 328 #define FL_VENDORID             0x10cf
 329 #define FL_S7020D_SUBVENDOR     HDA_MODEL_CONSTRUCT(FL, 0x1326)
 330 #define FL_U1010_SUBVENDOR      HDA_MODEL_CONSTRUCT(FL, 0x142d)
 331 #define FL_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FL, 0xffff)
 332
 333 /* Toshiba */
 334 #define TOSHIBA_VENDORID        0x1179
 335 #define TOSHIBA_U200_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)
 336 #define TOSHIBA_A135_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)
 337 #define TOSHIBA_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)
 338
 339 /* Micro-Star International (MSI) */
 340 #define MSI_VENDORID            0x1462
 341 #define MSI_MS1034_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x0349)
 342 #define MSI_MS034A_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x034a)
 343 #define MSI_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(MSI, 0xffff)
 344
 345 /* Giga-Byte Technology */
 346 #define GB_VENDORID             0x1458
 347 #define GB_G33S2H_SUBVENDOR     HDA_MODEL_CONSTRUCT(GB, 0xa022)
 348 #define GP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(GB, 0xffff)
 349
 350 /* Uniwill ? */
 351 #define UNIWILL_VENDORID        0x1584
 352 #define UNIWILL_9075_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)
 353 #define UNIWILL_9080_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)
 354
 355
 356 /* Misc constants.. */
 357 #define HDA_AMP_VOL_DEFAULT     (-1)
 358 #define HDA_AMP_MUTE_DEFAULT    (0xffffffff)
 359 #define HDA_AMP_MUTE_NONE       (0)
 360 #define HDA_AMP_MUTE_LEFT       (1 << 0)
 361 #define HDA_AMP_MUTE_RIGHT      (1 << 1)
 362 #define HDA_AMP_MUTE_ALL        (HDA_AMP_MUTE_LEFT | HDA_AMP_MUTE_RIGHT)
 363
 364 #define HDA_AMP_LEFT_MUTED(v)   ((v) & (HDA_AMP_MUTE_LEFT))
 365 #define HDA_AMP_RIGHT_MUTED(v)  (((v) & HDA_AMP_MUTE_RIGHT) >> 1)
 366
 367 #define HDA_ADC_MONITOR         (1 << 0)
 368
 369 #define HDA_CTL_OUT             1
 370 #define HDA_CTL_IN              2
 371
 372 #define HDA_GPIO_MAX            8
 373 /* 0 - 7 = GPIO , 8 = Flush */
 374 #define HDA_QUIRK_GPIO0         (1 << 0)
 375 #define HDA_QUIRK_GPIO1         (1 << 1)
 376 #define HDA_QUIRK_GPIO2         (1 << 2)
 377 #define HDA_QUIRK_GPIO3         (1 << 3)
 378 #define HDA_QUIRK_GPIO4         (1 << 4)
 379 #define HDA_QUIRK_GPIO5         (1 << 5)
 380 #define HDA_QUIRK_GPIO6         (1 << 6)
 381 #define HDA_QUIRK_GPIO7         (1 << 7)
 382 #define HDA_QUIRK_GPIOFLUSH     (1 << 8)
 383
 384 /* 9 - 25 = anything else */
 385 #define HDA_QUIRK_SOFTPCMVOL    (1 << 9)
 386 #define HDA_QUIRK_FIXEDRATE     (1 << 10)
 387 #define HDA_QUIRK_FORCESTEREO   (1 << 11)
 388 #define HDA_QUIRK_EAPDINV       (1 << 12)
 389 #define HDA_QUIRK_DMAPOS        (1 << 13)
 390 #define HDA_QUIRK_SENSEINV      (1 << 14)
 391
 392 /* 26 - 31 = vrefs */
 393 #define HDA_QUIRK_IVREF50       (1 << 26)
 394 #define HDA_QUIRK_IVREF80       (1 << 27)
 395 #define HDA_QUIRK_IVREF100      (1 << 28)
 396 #define HDA_QUIRK_OVREF50       (1 << 29)
 397 #define HDA_QUIRK_OVREF80       (1 << 30)
 398 #define HDA_QUIRK_OVREF100      (1 << 31)
 399
 400 #define HDA_QUIRK_IVREF         (HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF80 | \
 401                                                         HDA_QUIRK_IVREF100)
 402 #define HDA_QUIRK_OVREF         (HDA_QUIRK_OVREF50 | HDA_QUIRK_OVREF80 | \
 403                                                         HDA_QUIRK_OVREF100)
 404 #define HDA_QUIRK_VREF          (HDA_QUIRK_IVREF | HDA_QUIRK_OVREF)
 405
 406 #if __FreeBSD_version < 600000
 407 #define taskqueue_drain(...)
 408 #endif
 409
 410 static const struct {
 411         char *key;
 412         uint32_t value;
 413 } hdac_quirks_tab[] = {
 414         { "gpio0", HDA_QUIRK_GPIO0 },
 415         { "gpio1", HDA_QUIRK_GPIO1 },
 416         { "gpio2", HDA_QUIRK_GPIO2 },
 417         { "gpio3", HDA_QUIRK_GPIO3 },
 418         { "gpio4", HDA_QUIRK_GPIO4 },
 419         { "gpio5", HDA_QUIRK_GPIO5 },
 420         { "gpio6", HDA_QUIRK_GPIO6 },
 421         { "gpio7", HDA_QUIRK_GPIO7 },
 422         { "gpioflush", HDA_QUIRK_GPIOFLUSH },
 423         { "softpcmvol", HDA_QUIRK_SOFTPCMVOL },
 424         { "fixedrate", HDA_QUIRK_FIXEDRATE },
 425         { "forcestereo", HDA_QUIRK_FORCESTEREO },
 426         { "eapdinv", HDA_QUIRK_EAPDINV },
 427         { "dmapos", HDA_QUIRK_DMAPOS },
 428         { "senseinv", HDA_QUIRK_SENSEINV },
 429         { "ivref50", HDA_QUIRK_IVREF50 },
 430         { "ivref80", HDA_QUIRK_IVREF80 },
 431         { "ivref100", HDA_QUIRK_IVREF100 },
 432         { "ovref50", HDA_QUIRK_OVREF50 },
 433         { "ovref80", HDA_QUIRK_OVREF80 },
 434         { "ovref100", HDA_QUIRK_OVREF100 },
 435         { "ivref", HDA_QUIRK_IVREF },
 436         { "ovref", HDA_QUIRK_OVREF },
 437         { "vref", HDA_QUIRK_VREF },
 438 };
 439 #define HDAC_QUIRKS_TAB_LEN     \
 440                 (sizeof(hdac_quirks_tab) / sizeof(hdac_quirks_tab[0]))
 441
 442 #define HDA_BDL_MIN     2
 443 #define HDA_BDL_MAX     256
 444 #define HDA_BDL_DEFAULT HDA_BDL_MIN
 445
 446 #define HDA_BLK_MIN     HDAC_DMA_ALIGNMENT
 447 #define HDA_BLK_ALIGN   (~(HDA_BLK_MIN - 1))
 448
 449 #define HDA_BUFSZ_MIN           4096
 450 #define HDA_BUFSZ_MAX           65536
 451 #define HDA_BUFSZ_DEFAULT       16384
 452
 453 #define HDA_PARSE_MAXDEPTH      10
 454
 455 #define HDAC_UNSOLTAG_EVENT_HP          0x00
 456
 457 MALLOC_DEFINE(M_HDAC, "hdac", "High Definition Audio Controller");
 458
 459 const char *HDA_COLORS[16] = {"Unknown", "Black", "Grey", "Blue", "Green", "Red",
 460     "Orange", "Yellow", "Purple", "Pink", "Res.A", "Res.B", "Res.C", "Res.D",
 461     "White", "Other"};
 462
 463 const char *HDA_DEVS[16] = {"Line-out", "Speaker", "Headphones", "CD",
 464     "SPDIF-out", "Digital-out", "Modem-line", "Modem-handset", "Line-in",
 465     "AUX", "Mic", "Telephony", "SPDIF-in", "Digital-in", "Res.E", "Other"};
 466
 467 const char *HDA_CONNS[4] = {"Jack", "None", "Fixed", "Both"};
 468
 469 /* Default */
 470 static uint32_t hdac_fmt[] = {
 471         AFMT_STEREO | AFMT_S16_LE,
 472         0
 473 };
 474
 475 static struct pcmchan_caps hdac_caps = {48000, 48000, hdac_fmt, 0};
 476
 477 static const struct {
 478         uint32_t        model;
 479         char            *desc;
 480 } hdac_devices[] = {
 481         { HDA_INTEL_82801F,  "Intel 82801F" },
 482         { HDA_INTEL_63XXESB, "Intel 631x/632xESB" },
 483         { HDA_INTEL_82801G,  "Intel 82801G" },
 484         { HDA_INTEL_82801H,  "Intel 82801H" },
 485         { HDA_INTEL_82801I,  "Intel 82801I" },
 486         { HDA_INTEL_82801J,  "Intel 82801J" },
 487         { HDA_INTEL_PCH,     "Intel PCH" },
 488         { HDA_INTEL_SCH,     "Intel SCH" },
 489         { HDA_NVIDIA_MCP51,  "NVidia MCP51" },
 490         { HDA_NVIDIA_MCP55,  "NVidia MCP55" },
 491         { HDA_NVIDIA_MCP61_1, "NVidia MCP61" },
 492         { HDA_NVIDIA_MCP61_2, "NVidia MCP61" },
 493         { HDA_NVIDIA_MCP65_1, "NVidia MCP65" },
 494         { HDA_NVIDIA_MCP65_2, "NVidia MCP65" },
 495         { HDA_NVIDIA_MCP67_1, "NVidia MCP67" },
 496         { HDA_NVIDIA_MCP67_2, "NVidia MCP67" },
 497         { HDA_NVIDIA_MCP73_1, "NVidia MCP73" },
 498         { HDA_NVIDIA_MCP73_2, "NVidia MCP73" },
 499         { HDA_NVIDIA_MCP78_1, "NVidia MCP78" },
 500         { HDA_NVIDIA_MCP78_2, "NVidia MCP78" },
 501         { HDA_NVIDIA_MCP78_3, "NVidia MCP78" },
 502         { HDA_NVIDIA_MCP78_4, "NVidia MCP78" },
 503         { HDA_NVIDIA_MCP79_1, "NVidia MCP79" },
 504         { HDA_NVIDIA_MCP79_2, "NVidia MCP79" },
 505         { HDA_NVIDIA_MCP79_3, "NVidia MCP79" },
 506         { HDA_NVIDIA_MCP79_4, "NVidia MCP79" },
 507         { HDA_ATI_SB450,     "ATI SB450"     },
 508         { HDA_ATI_SB600,     "ATI SB600"     },
 509         { HDA_ATI_RS600,     "ATI RS600"     },
 510         { HDA_ATI_RS690,     "ATI RS690"     },
 511         { HDA_ATI_RS780,     "ATI RS780"     },
 512         { HDA_ATI_R600,      "ATI R600"      },
 513         { HDA_ATI_RV610,     "ATI RV610"     },
 514         { HDA_ATI_RV620,     "ATI RV620"     },
 515         { HDA_ATI_RV630,     "ATI RV630"     },
 516         { HDA_ATI_RV635,     "ATI RV635"     },
 517         { HDA_ATI_RV710,     "ATI RV710"     },
 518         { HDA_ATI_RV730,     "ATI RV730"     },
 519         { HDA_ATI_RV740,     "ATI RV740"     },
 520         { HDA_ATI_RV770,     "ATI RV770"     },
 521         { HDA_VIA_VT82XX,    "VIA VT8251/8237A" },
 522         { HDA_SIS_966,       "SiS 966" },
 523         { HDA_ULI_M5461,     "ULI M5461" },
 524         /* Unknown */
 525         { HDA_INTEL_ALL,  "Intel (Unknown)"  },
 526         { HDA_NVIDIA_ALL, "NVidia (Unknown)" },
 527         { HDA_ATI_ALL,    "ATI (Unknown)"    },
 528         { HDA_VIA_ALL,    "VIA (Unknown)"    },
 529         { HDA_SIS_ALL,    "SiS (Unknown)"    },
 530         { HDA_ULI_ALL,    "ULI (Unknown)"    },
 531 };
 532 #define HDAC_DEVICES_LEN (sizeof(hdac_devices) / sizeof(hdac_devices[0]))
 533
 534 static const struct {
 535         uint16_t vendor;
 536         uint8_t reg;
 537         uint8_t mask;
 538         uint8_t enable;
 539 } hdac_pcie_snoop[] = {
 540         {  INTEL_VENDORID, 0x00, 0x00, 0x00 },
 541         {    ATI_VENDORID, 0x42, 0xf8, 0x02 },
 542         { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f },
 543 };
 544 #define HDAC_PCIESNOOP_LEN      \
 545                         (sizeof(hdac_pcie_snoop) / sizeof(hdac_pcie_snoop[0]))
 546
 547 static const struct {
 548         uint32_t        rate;
 549         int             valid;
 550         uint16_t        base;
 551         uint16_t        mul;
 552         uint16_t        div;
 553 } hda_rate_tab[] = {
 554         {   8000, 1, 0x0000, 0x0000, 0x0500 },  /* (48000 * 1) / 6 */
 555         {   9600, 0, 0x0000, 0x0000, 0x0400 },  /* (48000 * 1) / 5 */
 556         {  12000, 0, 0x0000, 0x0000, 0x0300 },  /* (48000 * 1) / 4 */
 557         {  16000, 1, 0x0000, 0x0000, 0x0200 },  /* (48000 * 1) / 3 */
 558         {  18000, 0, 0x0000, 0x1000, 0x0700 },  /* (48000 * 3) / 8 */
 559         {  19200, 0, 0x0000, 0x0800, 0x0400 },  /* (48000 * 2) / 5 */
 560         {  24000, 0, 0x0000, 0x0000, 0x0100 },  /* (48000 * 1) / 2 */
 561         {  28800, 0, 0x0000, 0x1000, 0x0400 },  /* (48000 * 3) / 5 */
 562         {  32000, 1, 0x0000, 0x0800, 0x0200 },  /* (48000 * 2) / 3 */
 563         {  36000, 0, 0x0000, 0x1000, 0x0300 },  /* (48000 * 3) / 4 */
 564         {  38400, 0, 0x0000, 0x1800, 0x0400 },  /* (48000 * 4) / 5 */
 565         {  48000, 1, 0x0000, 0x0000, 0x0000 },  /* (48000 * 1) / 1 */
 566         {  64000, 0, 0x0000, 0x1800, 0x0200 },  /* (48000 * 4) / 3 */
 567         {  72000, 0, 0x0000, 0x1000, 0x0100 },  /* (48000 * 3) / 2 */
 568         {  96000, 1, 0x0000, 0x0800, 0x0000 },  /* (48000 * 2) / 1 */
 569         { 144000, 0, 0x0000, 0x1000, 0x0000 },  /* (48000 * 3) / 1 */
 570         { 192000, 1, 0x0000, 0x1800, 0x0000 },  /* (48000 * 4) / 1 */
 571         {   8820, 0, 0x4000, 0x0000, 0x0400 },  /* (44100 * 1) / 5 */
 572         {  11025, 1, 0x4000, 0x0000, 0x0300 },  /* (44100 * 1) / 4 */
 573         {  12600, 0, 0x4000, 0x0800, 0x0600 },  /* (44100 * 2) / 7 */
 574         {  14700, 0, 0x4000, 0x0000, 0x0200 },  /* (44100 * 1) / 3 */
 575         {  17640, 0, 0x4000, 0x0800, 0x0400 },  /* (44100 * 2) / 5 */
 576         {  18900, 0, 0x4000, 0x1000, 0x0600 },  /* (44100 * 3) / 7 */
 577         {  22050, 1, 0x4000, 0x0000, 0x0100 },  /* (44100 * 1) / 2 */
 578         {  25200, 0, 0x4000, 0x1800, 0x0600 },  /* (44100 * 4) / 7 */
 579         {  26460, 0, 0x4000, 0x1000, 0x0400 },  /* (44100 * 3) / 5 */
 580         {  29400, 0, 0x4000, 0x0800, 0x0200 },  /* (44100 * 2) / 3 */
 581         {  33075, 0, 0x4000, 0x1000, 0x0300 },  /* (44100 * 3) / 4 */
 582         {  35280, 0, 0x4000, 0x1800, 0x0400 },  /* (44100 * 4) / 5 */
 583         {  44100, 1, 0x4000, 0x0000, 0x0000 },  /* (44100 * 1) / 1 */
 584         {  58800, 0, 0x4000, 0x1800, 0x0200 },  /* (44100 * 4) / 3 */
 585         {  66150, 0, 0x4000, 0x1000, 0x0100 },  /* (44100 * 3) / 2 */
 586         {  88200, 1, 0x4000, 0x0800, 0x0000 },  /* (44100 * 2) / 1 */
 587         { 132300, 0, 0x4000, 0x1000, 0x0000 },  /* (44100 * 3) / 1 */
 588         { 176400, 1, 0x4000, 0x1800, 0x0000 },  /* (44100 * 4) / 1 */
 589 };
 590 #define HDA_RATE_TAB_LEN (sizeof(hda_rate_tab) / sizeof(hda_rate_tab[0]))
 591
 592 /* All codecs you can eat... */
 593 #define HDA_CODEC_CONSTRUCT(vendor, id) \
 594                 (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))
 595
 596 /* Realtek */
 597 #define REALTEK_VENDORID        0x10ec
 598 #define HDA_CODEC_ALC260        HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
 599 #define HDA_CODEC_ALC262        HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
 600 #define HDA_CODEC_ALC267        HDA_CODEC_CONSTRUCT(REALTEK, 0x0267)
 601 #define HDA_CODEC_ALC268        HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
 602 #define HDA_CODEC_ALC269        HDA_CODEC_CONSTRUCT(REALTEK, 0x0269)
 603 #define HDA_CODEC_ALC272        HDA_CODEC_CONSTRUCT(REALTEK, 0x0272)
 604 #define HDA_CODEC_ALC660        HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
 605 #define HDA_CODEC_ALC662        HDA_CODEC_CONSTRUCT(REALTEK, 0x0662)
 606 #define HDA_CODEC_ALC663        HDA_CODEC_CONSTRUCT(REALTEK, 0x0663)
 607 #define HDA_CODEC_ALC861        HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
 608 #define HDA_CODEC_ALC861VD      HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
 609 #define HDA_CODEC_ALC880        HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
 610 #define HDA_CODEC_ALC882        HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
 611 #define HDA_CODEC_ALC883        HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
 612 #define HDA_CODEC_ALC885        HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
 613 #define HDA_CODEC_ALC888        HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
 614 #define HDA_CODEC_ALC889        HDA_CODEC_CONSTRUCT(REALTEK, 0x0889)
 615 #define HDA_CODEC_ALCXXXX       HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)
 616
 617 /* Analog Devices */
 618 #define ANALOGDEVICES_VENDORID  0x11d4
 619 #define HDA_CODEC_AD1884A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x184a)
 620 #define HDA_CODEC_AD1882        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1882)
 621 #define HDA_CODEC_AD1883        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1883)
 622 #define HDA_CODEC_AD1884        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1884)
 623 #define HDA_CODEC_AD1984A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194a)
 624 #define HDA_CODEC_AD1984B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x194b)
 625 #define HDA_CODEC_AD1981HD      HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
 626 #define HDA_CODEC_AD1983        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
 627 #define HDA_CODEC_AD1984        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
 628 #define HDA_CODEC_AD1986A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
 629 #define HDA_CODEC_AD1987        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1987)
 630 #define HDA_CODEC_AD1988        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
 631 #define HDA_CODEC_AD1988B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)
 632 #define HDA_CODEC_AD1882A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x882a)
 633 #define HDA_CODEC_AD1989B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x989b)
 634 #define HDA_CODEC_ADXXXX        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)
 635
 636 /* CMedia */
 637 #define CMEDIA_VENDORID         0x434d
 638 #define HDA_CODEC_CMI9880       HDA_CODEC_CONSTRUCT(CMEDIA, 0x4980)
 639 #define HDA_CODEC_CMIXXXX       HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
 640
 641 /* Sigmatel */
 642 #define SIGMATEL_VENDORID       0x8384
 643 #define HDA_CODEC_STAC9230X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7612)
 644 #define HDA_CODEC_STAC9230D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7613)
 645 #define HDA_CODEC_STAC9229X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7614)
 646 #define HDA_CODEC_STAC9229D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7615)
 647 #define HDA_CODEC_STAC9228X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7616)
 648 #define HDA_CODEC_STAC9228D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7617)
 649 #define HDA_CODEC_STAC9227X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
 650 #define HDA_CODEC_STAC9227D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7619)
 651 #define HDA_CODEC_STAC9274      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7620)
 652 #define HDA_CODEC_STAC9274D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7621)
 653 #define HDA_CODEC_STAC9273X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7622)
 654 #define HDA_CODEC_STAC9273D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7623)
 655 #define HDA_CODEC_STAC9272X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7624)
 656 #define HDA_CODEC_STAC9272D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7625)
 657 #define HDA_CODEC_STAC9271X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7626)
 658 #define HDA_CODEC_STAC9271D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
 659 #define HDA_CODEC_STAC9274X5NH  HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7628)
 660 #define HDA_CODEC_STAC9274D5NH  HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7629)
 661 #define HDA_CODEC_STAC9250      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7634)
 662 #define HDA_CODEC_STAC9251      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7636)
 663 #define HDA_CODEC_IDT92HD700X   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7638)
 664 #define HDA_CODEC_IDT92HD700D   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7639)
 665 #define HDA_CODEC_IDT92HD206X   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7645)
 666 #define HDA_CODEC_IDT92HD206D   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7646)
 667 #define HDA_CODEC_STAC9872AK    HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7662)
 668 #define HDA_CODEC_STAC9221      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
 669 #define HDA_CODEC_STAC922XD     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
 670 #define HDA_CODEC_STAC9221_A2   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7682)
 671 #define HDA_CODEC_STAC9221D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
 672 #define HDA_CODEC_STAC9220      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
 673 #define HDA_CODEC_STAC9200D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7691)
 674 #define HDA_CODEC_IDT92HD005    HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7698)
 675 #define HDA_CODEC_IDT92HD005D   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7699)
 676 #define HDA_CODEC_STAC9205X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a0)
 677 #define HDA_CODEC_STAC9205D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a1)
 678 #define HDA_CODEC_STAC9204X     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a2)
 679 #define HDA_CODEC_STAC9204D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x76a3)
 680 #define HDA_CODEC_STAC9220_A2   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7880)
 681 #define HDA_CODEC_STAC9220_A1   HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7882)
 682 #define HDA_CODEC_STACXXXX      HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)
 683
 684 /* IDT */
 685 #define IDT_VENDORID            0x111d
 686 #define HDA_CODEC_IDT92HD75BX   HDA_CODEC_CONSTRUCT(IDT, 0x7603)
 687 #define HDA_CODEC_IDT92HD83C1X  HDA_CODEC_CONSTRUCT(IDT, 0x7604)
 688 #define HDA_CODEC_IDT92HD81B1X  HDA_CODEC_CONSTRUCT(IDT, 0x7605)
 689 #define HDA_CODEC_IDT92HD75B3   HDA_CODEC_CONSTRUCT(IDT, 0x7608)
 690 #define HDA_CODEC_IDT92HD73D1   HDA_CODEC_CONSTRUCT(IDT, 0x7674)
 691 #define HDA_CODEC_IDT92HD73C1   HDA_CODEC_CONSTRUCT(IDT, 0x7675)
 692 #define HDA_CODEC_IDT92HD73E1   HDA_CODEC_CONSTRUCT(IDT, 0x7676)
 693 #define HDA_CODEC_IDT92HD71B8   HDA_CODEC_CONSTRUCT(IDT, 0x76b0)
 694 #define HDA_CODEC_IDT92HD71B7   HDA_CODEC_CONSTRUCT(IDT, 0x76b2)
 695 #define HDA_CODEC_IDT92HD71B5   HDA_CODEC_CONSTRUCT(IDT, 0x76b6)
 696 #define HDA_CODEC_IDT92HD83C1C  HDA_CODEC_CONSTRUCT(IDT, 0x76d4)
 697 #define HDA_CODEC_IDT92HD81B1C  HDA_CODEC_CONSTRUCT(IDT, 0x76d5)
 698 #define HDA_CODEC_IDTXXXX       HDA_CODEC_CONSTRUCT(IDT, 0xffff)
 699
 700 /* Silicon Image */
 701 #define SII_VENDORID    0x1095
 702 #define HDA_CODEC_SII1390       HDA_CODEC_CONSTRUCT(SII, 0x1390)
 703 #define HDA_CODEC_SII1392       HDA_CODEC_CONSTRUCT(SII, 0x1392)
 704 #define HDA_CODEC_SIIXXXX       HDA_CODEC_CONSTRUCT(SII, 0xffff)
 705
 706 /* Lucent/Agere */
 707 #define AGERE_VENDORID  0x11c1
 708 #define HDA_CODEC_AGEREXXXX     HDA_CODEC_CONSTRUCT(AGERE, 0xffff)
 709
 710 /* Conexant */
 711 #define CONEXANT_VENDORID       0x14f1
 712 #define HDA_CODEC_CX20549       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
 713 #define HDA_CODEC_CX20551       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
 714 #define HDA_CODEC_CX20561       HDA_CODEC_CONSTRUCT(CONEXANT, 0x5051)
 715 #define HDA_CODEC_CXXXXX        HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
 716
 717 /* VIA */
 718 #define HDA_CODEC_VT1708_8      HDA_CODEC_CONSTRUCT(VIA, 0x1708)
 719 #define HDA_CODEC_VT1708_9      HDA_CODEC_CONSTRUCT(VIA, 0x1709)
 720 #define HDA_CODEC_VT1708_A      HDA_CODEC_CONSTRUCT(VIA, 0x170a)
 721 #define HDA_CODEC_VT1708_B      HDA_CODEC_CONSTRUCT(VIA, 0x170b)
 722 #define HDA_CODEC_VT1709_0      HDA_CODEC_CONSTRUCT(VIA, 0xe710)
 723 #define HDA_CODEC_VT1709_1      HDA_CODEC_CONSTRUCT(VIA, 0xe711)
 724 #define HDA_CODEC_VT1709_2      HDA_CODEC_CONSTRUCT(VIA, 0xe712)
 725 #define HDA_CODEC_VT1709_3      HDA_CODEC_CONSTRUCT(VIA, 0xe713)
 726 #define HDA_CODEC_VT1709_4      HDA_CODEC_CONSTRUCT(VIA, 0xe714)
 727 #define HDA_CODEC_VT1709_5      HDA_CODEC_CONSTRUCT(VIA, 0xe715)
 728 #define HDA_CODEC_VT1709_6      HDA_CODEC_CONSTRUCT(VIA, 0xe716)
 729 #define HDA_CODEC_VT1709_7      HDA_CODEC_CONSTRUCT(VIA, 0xe717)
 730 #define HDA_CODEC_VT1708B_0     HDA_CODEC_CONSTRUCT(VIA, 0xe720)
 731 #define HDA_CODEC_VT1708B_1     HDA_CODEC_CONSTRUCT(VIA, 0xe721)
 732 #define HDA_CODEC_VT1708B_2     HDA_CODEC_CONSTRUCT(VIA, 0xe722)
 733 #define HDA_CODEC_VT1708B_3     HDA_CODEC_CONSTRUCT(VIA, 0xe723)
 734 #define HDA_CODEC_VT1708B_4     HDA_CODEC_CONSTRUCT(VIA, 0xe724)
 735 #define HDA_CODEC_VT1708B_5     HDA_CODEC_CONSTRUCT(VIA, 0xe725)
 736 #define HDA_CODEC_VT1708B_6     HDA_CODEC_CONSTRUCT(VIA, 0xe726)
 737 #define HDA_CODEC_VT1708B_7     HDA_CODEC_CONSTRUCT(VIA, 0xe727)
 738 #define HDA_CODEC_VT1708S_0     HDA_CODEC_CONSTRUCT(VIA, 0x0397)
 739 #define HDA_CODEC_VT1708S_1     HDA_CODEC_CONSTRUCT(VIA, 0x1397)
 740 #define HDA_CODEC_VT1708S_2     HDA_CODEC_CONSTRUCT(VIA, 0x2397)
 741 #define HDA_CODEC_VT1708S_3     HDA_CODEC_CONSTRUCT(VIA, 0x3397)
 742 #define HDA_CODEC_VT1708S_4     HDA_CODEC_CONSTRUCT(VIA, 0x4397)
 743 #define HDA_CODEC_VT1708S_5     HDA_CODEC_CONSTRUCT(VIA, 0x5397)
 744 #define HDA_CODEC_VT1708S_6     HDA_CODEC_CONSTRUCT(VIA, 0x6397)
 745 #define HDA_CODEC_VT1708S_7     HDA_CODEC_CONSTRUCT(VIA, 0x7397)
 746 #define HDA_CODEC_VT1702_0      HDA_CODEC_CONSTRUCT(VIA, 0x0398)
 747 #define HDA_CODEC_VT1702_1      HDA_CODEC_CONSTRUCT(VIA, 0x1398)
 748 #define HDA_CODEC_VT1702_2      HDA_CODEC_CONSTRUCT(VIA, 0x2398)
 749 #define HDA_CODEC_VT1702_3      HDA_CODEC_CONSTRUCT(VIA, 0x3398)
 750 #define HDA_CODEC_VT1702_4      HDA_CODEC_CONSTRUCT(VIA, 0x4398)
 751 #define HDA_CODEC_VT1702_5      HDA_CODEC_CONSTRUCT(VIA, 0x5398)
 752 #define HDA_CODEC_VT1702_6      HDA_CODEC_CONSTRUCT(VIA, 0x6398)
 753 #define HDA_CODEC_VT1702_7      HDA_CODEC_CONSTRUCT(VIA, 0x7398)
 754 #define HDA_CODEC_VTXXXX        HDA_CODEC_CONSTRUCT(VIA, 0xffff)
 755
 756 /* ATI */
 757 #define HDA_CODEC_ATIRS600_1    HDA_CODEC_CONSTRUCT(ATI, 0x793c)
 758 #define HDA_CODEC_ATIRS600_2    HDA_CODEC_CONSTRUCT(ATI, 0x7919)
 759 #define HDA_CODEC_ATIRS690      HDA_CODEC_CONSTRUCT(ATI, 0x791a)
 760 #define HDA_CODEC_ATIR6XX       HDA_CODEC_CONSTRUCT(ATI, 0xaa01)
 761 #define HDA_CODEC_ATIXXXX       HDA_CODEC_CONSTRUCT(ATI, 0xffff)
 762
 763 /* NVIDIA */
 764 #define HDA_CODEC_NVIDIAMCP78   HDA_CODEC_CONSTRUCT(NVIDIA, 0x0002)
 765 #define HDA_CODEC_NVIDIAMCP78_2 HDA_CODEC_CONSTRUCT(NVIDIA, 0x0006)
 766 #define HDA_CODEC_NVIDIAMCP7A   HDA_CODEC_CONSTRUCT(NVIDIA, 0x0007)
 767 #define HDA_CODEC_NVIDIAMCP67   HDA_CODEC_CONSTRUCT(NVIDIA, 0x0067)
 768 #define HDA_CODEC_NVIDIAMCP73   HDA_CODEC_CONSTRUCT(NVIDIA, 0x8001)
 769 #define HDA_CODEC_NVIDIAXXXX    HDA_CODEC_CONSTRUCT(NVIDIA, 0xffff)
 770
 771 /* INTEL */
 772 #define HDA_CODEC_INTELG45_1    HDA_CODEC_CONSTRUCT(INTEL, 0x2801)
 773 #define HDA_CODEC_INTELG45_2    HDA_CODEC_CONSTRUCT(INTEL, 0x2802)
 774 #define HDA_CODEC_INTELG45_3    HDA_CODEC_CONSTRUCT(INTEL, 0x2803)
 775 #define HDA_CODEC_INTELG45_4    HDA_CODEC_CONSTRUCT(INTEL, 0x29fb)
 776 #define HDA_CODEC_INTELXXXX     HDA_CODEC_CONSTRUCT(INTEL, 0xffff)
 777
 778 /* Codecs */
 779 static const struct {
 780         uint32_t id;
 781         char *name;
 782 } hdac_codecs[] = {
 783         { HDA_CODEC_ALC260,    "Realtek ALC260" },
 784         { HDA_CODEC_ALC262,    "Realtek ALC262" },
 785         { HDA_CODEC_ALC267,    "Realtek ALC267" },
 786         { HDA_CODEC_ALC268,    "Realtek ALC268" },
 787         { HDA_CODEC_ALC269,    "Realtek ALC269" },
 788         { HDA_CODEC_ALC272,    "Realtek ALC272" },
 789         { HDA_CODEC_ALC660,    "Realtek ALC660" },
 790         { HDA_CODEC_ALC662,    "Realtek ALC662" },
 791         { HDA_CODEC_ALC663,    "Realtek ALC663" },
 792         { HDA_CODEC_ALC861,    "Realtek ALC861" },
 793         { HDA_CODEC_ALC861VD,  "Realtek ALC861-VD" },
 794         { HDA_CODEC_ALC880,    "Realtek ALC880" },
 795         { HDA_CODEC_ALC882,    "Realtek ALC882" },
 796         { HDA_CODEC_ALC883,    "Realtek ALC883" },
 797         { HDA_CODEC_ALC885,    "Realtek ALC885" },
 798         { HDA_CODEC_ALC888,    "Realtek ALC888" },
 799         { HDA_CODEC_ALC889,    "Realtek ALC889" },
 800         { HDA_CODEC_AD1882,    "Analog Devices AD1882" },
 801         { HDA_CODEC_AD1882A,   "Analog Devices AD1882A" },
 802         { HDA_CODEC_AD1883,    "Analog Devices AD1883" },
 803         { HDA_CODEC_AD1884,    "Analog Devices AD1884" },
 804         { HDA_CODEC_AD1884A,   "Analog Devices AD1884A" },
 805         { HDA_CODEC_AD1981HD,  "Analog Devices AD1981HD" },
 806         { HDA_CODEC_AD1983,    "Analog Devices AD1983" },
 807         { HDA_CODEC_AD1984,    "Analog Devices AD1984" },
 808         { HDA_CODEC_AD1984A,   "Analog Devices AD1984A" },
 809         { HDA_CODEC_AD1984B,   "Analog Devices AD1984B" },
 810         { HDA_CODEC_AD1986A,   "Analog Devices AD1986A" },
 811         { HDA_CODEC_AD1987,    "Analog Devices AD1987" },
 812         { HDA_CODEC_AD1988,    "Analog Devices AD1988A" },
 813         { HDA_CODEC_AD1988B,   "Analog Devices AD1988B" },
 814         { HDA_CODEC_AD1989B,   "Analog Devices AD1989B" },
 815         { HDA_CODEC_CMI9880,   "CMedia CMI9880" },
 816         { HDA_CODEC_STAC9200D, "Sigmatel STAC9200D" },
 817         { HDA_CODEC_STAC9204X, "Sigmatel STAC9204X" },
 818         { HDA_CODEC_STAC9204D, "Sigmatel STAC9204D" },
 819         { HDA_CODEC_STAC9205X, "Sigmatel STAC9205X" },
 820         { HDA_CODEC_STAC9205D, "Sigmatel STAC9205D" },
 821         { HDA_CODEC_STAC9220,  "Sigmatel STAC9220" },
 822         { HDA_CODEC_STAC9220_A1, "Sigmatel STAC9220_A1" },
 823         { HDA_CODEC_STAC9220_A2, "Sigmatel STAC9220_A2" },
 824         { HDA_CODEC_STAC9221,  "Sigmatel STAC9221" },
 825         { HDA_CODEC_STAC9221_A2, "Sigmatel STAC9221_A2" },
 826         { HDA_CODEC_STAC9221D, "Sigmatel STAC9221D" },
 827         { HDA_CODEC_STAC922XD, "Sigmatel STAC9220D/9223D" },
 828         { HDA_CODEC_STAC9227X, "Sigmatel STAC9227X" },
 829         { HDA_CODEC_STAC9227D, "Sigmatel STAC9227D" },
 830         { HDA_CODEC_STAC9228X, "Sigmatel STAC9228X" },
 831         { HDA_CODEC_STAC9228D, "Sigmatel STAC9228D" },
 832         { HDA_CODEC_STAC9229X, "Sigmatel STAC9229X" },
 833         { HDA_CODEC_STAC9229D, "Sigmatel STAC9229D" },
 834         { HDA_CODEC_STAC9230X, "Sigmatel STAC9230X" },
 835         { HDA_CODEC_STAC9230D, "Sigmatel STAC9230D" },
 836         { HDA_CODEC_STAC9250,  "Sigmatel STAC9250" },
 837         { HDA_CODEC_STAC9251,  "Sigmatel STAC9251" },
 838         { HDA_CODEC_STAC9271X, "Sigmatel STAC9271X" },
 839         { HDA_CODEC_STAC9271D, "Sigmatel STAC9271D" },
 840         { HDA_CODEC_STAC9272X, "Sigmatel STAC9272X" },
 841         { HDA_CODEC_STAC9272D, "Sigmatel STAC9272D" },
 842         { HDA_CODEC_STAC9273X, "Sigmatel STAC9273X" },
 843         { HDA_CODEC_STAC9273D, "Sigmatel STAC9273D" },
 844         { HDA_CODEC_STAC9274,  "Sigmatel STAC9274" },
 845         { HDA_CODEC_STAC9274D, "Sigmatel STAC9274D" },
 846         { HDA_CODEC_STAC9274X5NH, "Sigmatel STAC9274X5NH" },
 847         { HDA_CODEC_STAC9274D5NH, "Sigmatel STAC9274D5NH" },
 848         { HDA_CODEC_STAC9872AK, "Sigmatel STAC9872AK" },
 849         { HDA_CODEC_IDT92HD005, "IDT 92HD005" },
 850         { HDA_CODEC_IDT92HD005D, "IDT 92HD005D" },
 851         { HDA_CODEC_IDT92HD206X, "IDT 92HD206X" },
 852         { HDA_CODEC_IDT92HD206D, "IDT 92HD206D" },
 853         { HDA_CODEC_IDT92HD700X, "IDT 92HD700X" },
 854         { HDA_CODEC_IDT92HD700D, "IDT 92HD700D" },
 855         { HDA_CODEC_IDT92HD71B5, "IDT 92HD71B5" },
 856         { HDA_CODEC_IDT92HD71B7, "IDT 92HD71B7" },
 857         { HDA_CODEC_IDT92HD71B8, "IDT 92HD71B8" },
 858         { HDA_CODEC_IDT92HD73C1, "IDT 92HD73C1" },
 859         { HDA_CODEC_IDT92HD73D1, "IDT 92HD73D1" },
 860         { HDA_CODEC_IDT92HD73E1, "IDT 92HD73E1" },
 861         { HDA_CODEC_IDT92HD75B3, "IDT 92HD75B3" },
 862         { HDA_CODEC_IDT92HD75BX, "IDT 92HD75BX" },
 863         { HDA_CODEC_IDT92HD81B1C, "IDT 92HD81B1C" },
 864         { HDA_CODEC_IDT92HD81B1X, "IDT 92HD81B1X" },
 865         { HDA_CODEC_IDT92HD83C1C, "IDT 92HD83C1C" },
 866         { HDA_CODEC_IDT92HD83C1X, "IDT 92HD83C1X" },
 867         { HDA_CODEC_CX20549,   "Conexant CX20549 (Venice)" },
 868         { HDA_CODEC_CX20551,   "Conexant CX20551 (Waikiki)" },
 869         { HDA_CODEC_CX20561,   "Conexant CX20561 (Hermosa)" },
 870         { HDA_CODEC_VT1708_8,  "VIA VT1708_8" },
 871         { HDA_CODEC_VT1708_9,  "VIA VT1708_9" },
 872         { HDA_CODEC_VT1708_A,  "VIA VT1708_A" },
 873         { HDA_CODEC_VT1708_B,  "VIA VT1708_B" },
 874         { HDA_CODEC_VT1709_0,  "VIA VT1709_0" },
 875         { HDA_CODEC_VT1709_1,  "VIA VT1709_1" },
 876         { HDA_CODEC_VT1709_2,  "VIA VT1709_2" },
 877         { HDA_CODEC_VT1709_3,  "VIA VT1709_3" },
 878         { HDA_CODEC_VT1709_4,  "VIA VT1709_4" },
 879         { HDA_CODEC_VT1709_5,  "VIA VT1709_5" },
 880         { HDA_CODEC_VT1709_6,  "VIA VT1709_6" },
 881         { HDA_CODEC_VT1709_7,  "VIA VT1709_7" },
 882         { HDA_CODEC_VT1708B_0, "VIA VT1708B_0" },
 883         { HDA_CODEC_VT1708B_1, "VIA VT1708B_1" },
 884         { HDA_CODEC_VT1708B_2, "VIA VT1708B_2" },
 885         { HDA_CODEC_VT1708B_3, "VIA VT1708B_3" },
 886         { HDA_CODEC_VT1708B_4, "VIA VT1708B_4" },
 887         { HDA_CODEC_VT1708B_5, "VIA VT1708B_5" },
 888         { HDA_CODEC_VT1708B_6, "VIA VT1708B_6" },
 889         { HDA_CODEC_VT1708B_7, "VIA VT1708B_7" },
 890         { HDA_CODEC_VT1708S_0, "VIA VT1708S_0" },
 891         { HDA_CODEC_VT1708S_1, "VIA VT1708S_1" },
 892         { HDA_CODEC_VT1708S_2, "VIA VT1708S_2" },
 893         { HDA_CODEC_VT1708S_3, "VIA VT1708S_3" },
 894         { HDA_CODEC_VT1708S_4, "VIA VT1708S_4" },
 895         { HDA_CODEC_VT1708S_5, "VIA VT1708S_5" },
 896         { HDA_CODEC_VT1708S_6, "VIA VT1708S_6" },
 897         { HDA_CODEC_VT1708S_7, "VIA VT1708S_7" },
 898         { HDA_CODEC_VT1702_0, "VIA VT1702_0" },
 899         { HDA_CODEC_VT1702_1, "VIA VT1702_1" },
 900         { HDA_CODEC_VT1702_2, "VIA VT1702_2" },
 901         { HDA_CODEC_VT1702_3, "VIA VT1702_3" },
 902         { HDA_CODEC_VT1702_4, "VIA VT1702_4" },
 903         { HDA_CODEC_VT1702_5, "VIA VT1702_5" },
 904         { HDA_CODEC_VT1702_6, "VIA VT1702_6" },
 905         { HDA_CODEC_VT1702_7, "VIA VT1702_7" },
 906         { HDA_CODEC_ATIRS600_1,"ATI RS600 HDMI" },
 907         { HDA_CODEC_ATIRS600_2,"ATI RS600 HDMI" },
 908         { HDA_CODEC_ATIRS690,  "ATI RS690/780 HDMI" },
 909         { HDA_CODEC_ATIR6XX,   "ATI R6xx HDMI" },
 910         { HDA_CODEC_NVIDIAMCP67, "NVidia MCP67 HDMI" },
 911         { HDA_CODEC_NVIDIAMCP73, "NVidia MCP73 HDMI" },
 912         { HDA_CODEC_NVIDIAMCP78, "NVidia MCP78 HDMI" },
 913         { HDA_CODEC_NVIDIAMCP78_2, "NVidia MCP78 HDMI" },
 914         { HDA_CODEC_NVIDIAMCP7A, "NVidia MCP7A HDMI" },
 915         { HDA_CODEC_INTELG45_1, "Intel G45 HDMI" },
 916         { HDA_CODEC_INTELG45_2, "Intel G45 HDMI" },
 917         { HDA_CODEC_INTELG45_3, "Intel G45 HDMI" },
 918         { HDA_CODEC_INTELG45_4, "Intel G45 HDMI" },
 919         { HDA_CODEC_SII1390,   "Silicon Image SiI1390 HDMI" },
 920         { HDA_CODEC_SII1392,   "Silicon Image SiI1392 HDMI" },
 921         /* Unknown codec */
 922         { HDA_CODEC_ALCXXXX,   "Realtek (Unknown)" },
 923         { HDA_CODEC_ADXXXX,    "Analog Devices (Unknown)" },
 924         { HDA_CODEC_CMIXXXX,   "CMedia (Unknown)" },
 925         { HDA_CODEC_STACXXXX,  "Sigmatel (Unknown)" },
 926         { HDA_CODEC_SIIXXXX,   "Silicon Image (Unknown)" },
 927         { HDA_CODEC_AGEREXXXX, "Lucent/Agere Systems (Unknown)" },
 928         { HDA_CODEC_CXXXXX,    "Conexant (Unknown)" },
 929         { HDA_CODEC_VTXXXX,    "VIA (Unknown)" },
 930         { HDA_CODEC_ATIXXXX,   "ATI (Unknown)" },
 931         { HDA_CODEC_NVIDIAXXXX,"NVidia (Unknown)" },
 932         { HDA_CODEC_INTELXXXX, "Intel (Unknown)" },
 933         { HDA_CODEC_IDTXXXX,   "IDT (Unknown)" },
 934 };
 935 #define HDAC_CODECS_LEN (sizeof(hdac_codecs) / sizeof(hdac_codecs[0]))
 936
 937
 938 /****************************************************************************
 939  * Function prototypes
 940  ****************************************************************************/
 941 static void     hdac_intr_handler(void *);
 942 static int      hdac_reset(struct hdac_softc *, int);
 943 static int      hdac_get_capabilities(struct hdac_softc *);
 944 static void     hdac_dma_cb(void *, bus_dma_segment_t *, int, int);
 945 static int      hdac_dma_alloc(struct hdac_softc *,
 946                                         struct hdac_dma *, bus_size_t);
 947 static void     hdac_dma_free(struct hdac_softc *, struct hdac_dma *);
 948 static int      hdac_mem_alloc(struct hdac_softc *);
 949 static void     hdac_mem_free(struct hdac_softc *);
 950 static int      hdac_irq_alloc(struct hdac_softc *);
 951 static void     hdac_irq_free(struct hdac_softc *);
 952 static void     hdac_corb_init(struct hdac_softc *);
 953 static void     hdac_rirb_init(struct hdac_softc *);
 954 static void     hdac_corb_start(struct hdac_softc *);
 955 static void     hdac_rirb_start(struct hdac_softc *);
 956 static void     hdac_scan_codecs(struct hdac_softc *);
 957 static void     hdac_probe_codec(struct hdac_codec *);
 958 static void     hdac_probe_function(struct hdac_codec *, nid_t);
 959 static int      hdac_pcmchannel_setup(struct hdac_chan *);
 960
 961 static void     hdac_attach2(void *);
 962
 963 static uint32_t hdac_command_sendone_internal(struct hdac_softc *,
 964                                                         uint32_t, int);
 965 static void     hdac_command_send_internal(struct hdac_softc *,
 966                                         struct hdac_command_list *, int);
 967
 968 static int      hdac_probe(device_t);
 969 static int      hdac_attach(device_t);
 970 static int      hdac_detach(device_t);
 971 static int      hdac_suspend(device_t);
 972 static int      hdac_resume(device_t);
 973 static void     hdac_widget_connection_select(struct hdac_widget *, uint8_t);
 974 static void     hdac_audio_ctl_amp_set(struct hdac_audio_ctl *,
 975                                                 uint32_t, int, int);
 976 static struct   hdac_audio_ctl *hdac_audio_ctl_amp_get(struct hdac_devinfo *,
 977                                                         nid_t, int, int, int);
 978 static void     hdac_audio_ctl_amp_set_internal(struct hdac_softc *,
 979                                 nid_t, nid_t, int, int, int, int, int, int);
 980 static struct   hdac_widget *hdac_widget_get(struct hdac_devinfo *, nid_t);
 981
 982 static int      hdac_rirb_flush(struct hdac_softc *sc);
 983 static int      hdac_unsolq_flush(struct hdac_softc *sc);
 984
 985 static void     hdac_dump_pin_config(struct hdac_widget *w, uint32_t conf);
 986
 987 #define hdac_command(a1, a2, a3)        \
 988                 hdac_command_sendone_internal(a1, a2, a3)
 989
 990 #define hdac_codec_id(c)                                                        \
 991                 ((uint32_t)((c == NULL) ? 0x00000000 :  \
 992                 ((((uint32_t)(c)->vendor_id & 0x0000ffff) << 16) |      \
 993                 ((uint32_t)(c)->device_id & 0x0000ffff))))
 994
 995 static char *
 996 hdac_codec_name(struct hdac_codec *codec)
 997 {
 998         uint32_t id;
 999         int i;
1000
1001         id = hdac_codec_id(codec);
1002
1003         for (i = 0; i < HDAC_CODECS_LEN; i++) {
1004                 if (HDA_DEV_MATCH(hdac_codecs[i].id, id))
1005                         return (hdac_codecs[i].name);
1006         }
1007
1008         return ((id == 0x00000000) ? "NULL Codec" : "Unknown Codec");
1009 }
1010
1011 static char *
1012 hdac_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)
1013 {
1014         static char *ossname[] = SOUND_DEVICE_NAMES;
1015         int i, first = 1;
1016
1017         bzero(buf, len);
1018         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
1019                 if (mask & (1 << i)) {
1020                         if (first == 0)
1021                                 strlcat(buf, ", ", len);
1022                         strlcat(buf, ossname[i], len);
1023                         first = 0;
1024                 }
1025         }
1026         return (buf);
1027 }
1028
1029 static struct hdac_audio_ctl *
1030 hdac_audio_ctl_each(struct hdac_devinfo *devinfo, int *index)
1031 {
1032         if (devinfo == NULL ||
1033             devinfo->node_type != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ||
1034             index == NULL || devinfo->function.audio.ctl == NULL ||
1035             devinfo->function.audio.ctlcnt < 1 ||
1036             *index < 0 || *index >= devinfo->function.audio.ctlcnt)
1037                 return (NULL);
1038         return (&devinfo->function.audio.ctl[(*index)++]);
1039 }
1040
1041 static struct hdac_audio_ctl *
1042 hdac_audio_ctl_amp_get(struct hdac_devinfo *devinfo, nid_t nid, int dir,
1043                                                 int index, int cnt)
1044 {
1045         struct hdac_audio_ctl *ctl;
1046         int i, found = 0;
1047
1048         if (devinfo == NULL || devinfo->function.audio.ctl == NULL)
1049                 return (NULL);
1050
1051         i = 0;
1052         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
1053                 if (ctl->enable == 0)
1054                         continue;
1055                 if (ctl->widget->nid != nid)
1056                         continue;
1057                 if (dir && ctl->ndir != dir)
1058                         continue;
1059                 if (index >= 0 && ctl->ndir == HDA_CTL_IN &&
1060                     ctl->dir == ctl->ndir && ctl->index != index)
1061                         continue;
1062                 found++;
1063                 if (found == cnt || cnt <= 0)
1064                         return (ctl);
1065         }
1066
1067         return (NULL);
1068 }
1069
1070 /*
1071  * Jack detection (Speaker/HP redirection) event handler.
1072  */
1073 static void
1074 hdac_hp_switch_handler(struct hdac_devinfo *devinfo)
1075 {
1076         struct hdac_audio_as *as;
1077         struct hdac_softc *sc;
1078         struct hdac_widget *w;
1079         struct hdac_audio_ctl *ctl;
1080         uint32_t val, res;
1081         int i, j;
1082         nid_t cad;
1083
1084         if (devinfo == NULL || devinfo->codec == NULL ||
1085             devinfo->codec->sc == NULL)
1086                 return;
1087
1088         sc = devinfo->codec->sc;
1089         cad = devinfo->codec->cad;
1090         as = devinfo->function.audio.as;
1091         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
1092                 if (as[i].hpredir < 0)
1093                         continue;
1094
1095                 w = hdac_widget_get(devinfo, as[i].pins[15]);
1096                 if (w == NULL || w->enable == 0 || w->type !=
1097                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1098                         continue;
1099
1100                 res = hdac_command(sc,
1101                     HDA_CMD_GET_PIN_SENSE(cad, as[i].pins[15]), cad);
1102
1103                 HDA_BOOTVERBOSE(
1104                         device_printf(sc->dev,
1105                             "Pin sense: nid=%d res=0x%08x\n",
1106                             as[i].pins[15], res);
1107                 );
1108
1109                 res = HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(res);
1110                 if (devinfo->function.audio.quirks & HDA_QUIRK_SENSEINV)
1111                         res ^= 1;
1112
1113                 /* (Un)Mute headphone pin. */
1114                 ctl = hdac_audio_ctl_amp_get(devinfo,
1115                     as[i].pins[15], HDA_CTL_IN, -1, 1);
1116                 if (ctl != NULL && ctl->mute) {
1117                         /* If pin has muter - use it. */
1118                         val = (res != 0) ? 0 : 1;
1119                         if (val != ctl->forcemute) {
1120                                 ctl->forcemute = val;
1121                                 hdac_audio_ctl_amp_set(ctl,
1122                                     HDA_AMP_MUTE_DEFAULT,
1123                                     HDA_AMP_VOL_DEFAULT, HDA_AMP_VOL_DEFAULT);
1124                         }
1125                 } else {
1126                         /* If there is no muter - disable pin output. */
1127                         w = hdac_widget_get(devinfo, as[i].pins[15]);
1128                         if (w != NULL && w->type ==
1129                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1130                                 if (res != 0)
1131                                         val = w->wclass.pin.ctrl |
1132                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1133                                 else
1134                                         val = w->wclass.pin.ctrl &
1135                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1136                                 if (val != w->wclass.pin.ctrl) {
1137                                         w->wclass.pin.ctrl = val;
1138                                         hdac_command(sc,
1139                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1140                                             w->nid, w->wclass.pin.ctrl), cad);
1141                                 }
1142                         }
1143                 }
1144                 /* (Un)Mute other pins. */
1145                 for (j = 0; j < 15; j++) {
1146                         if (as[i].pins[j] <= 0)
1147                                 continue;
1148                         ctl = hdac_audio_ctl_amp_get(devinfo,
1149                             as[i].pins[j], HDA_CTL_IN, -1, 1);
1150                         if (ctl != NULL && ctl->mute) {
1151                                 /* If pin has muter - use it. */
1152                                 val = (res != 0) ? 1 : 0;
1153                                 if (val == ctl->forcemute)
1154                                         continue;
1155                                 ctl->forcemute = val;
1156                                 hdac_audio_ctl_amp_set(ctl,
1157                                     HDA_AMP_MUTE_DEFAULT,
1158                                     HDA_AMP_VOL_DEFAULT, HDA_AMP_VOL_DEFAULT);
1159                                 continue;
1160                         }
1161                         /* If there is no muter - disable pin output. */
1162                         w = hdac_widget_get(devinfo, as[i].pins[j]);
1163                         if (w != NULL && w->type ==
1164                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1165                                 if (res != 0)
1166                                         val = w->wclass.pin.ctrl &
1167                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1168                                 else
1169                                         val = w->wclass.pin.ctrl |
1170                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1171                                 if (val != w->wclass.pin.ctrl) {
1172                                         w->wclass.pin.ctrl = val;
1173                                         hdac_command(sc,
1174                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1175                                             w->nid, w->wclass.pin.ctrl), cad);
1176                                 }
1177                         }
1178                 }
1179         }
1180 }
1181
1182 /*
1183  * Callback for poll based jack detection.
1184  */
1185 static void
1186 hdac_jack_poll_callback(void *arg)
1187 {
1188         struct hdac_devinfo *devinfo = arg;
1189         struct hdac_softc *sc;
1190
1191         if (devinfo == NULL || devinfo->codec == NULL ||
1192             devinfo->codec->sc == NULL)
1193                 return;
1194         sc = devinfo->codec->sc;
1195         hdac_lock(sc);
1196         if (sc->poll_ival == 0) {
1197                 hdac_unlock(sc);
1198                 return;
1199         }
1200         hdac_hp_switch_handler(devinfo);
1201         callout_reset(&sc->poll_jack, sc->poll_ival,
1202             hdac_jack_poll_callback, devinfo);
1203         hdac_unlock(sc);
1204 }
1205
1206 /*
1207  * Jack detection initializer.
1208  */
1209 static void
1210 hdac_hp_switch_init(struct hdac_devinfo *devinfo)
1211 {
1212         struct hdac_softc *sc = devinfo->codec->sc;
1213         struct hdac_audio_as *as = devinfo->function.audio.as;
1214         struct hdac_widget *w;
1215         uint32_t id;
1216         int i, enable = 0, poll = 0;
1217         nid_t cad;
1218
1219         id = hdac_codec_id(devinfo->codec);
1220         cad = devinfo->codec->cad;
1221         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
1222                 if (as[i].hpredir < 0)
1223                         continue;
1224
1225                 w = hdac_widget_get(devinfo, as[i].pins[15]);
1226                 if (w == NULL || w->enable == 0 || w->type !=
1227                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1228                         continue;
1229                 if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(w->wclass.pin.cap) == 0 ||
1230                     (HDA_CONFIG_DEFAULTCONF_MISC(w->wclass.pin.config) & 1) != 0) {
1231                         device_printf(sc->dev,
1232                             "No jack detection support at pin %d\n",
1233                             as[i].pins[15]);
1234                         continue;
1235                 }
1236                 enable = 1;
1237                 if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap)) {
1238                         hdac_command(sc,
1239                             HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, w->nid,
1240                             HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE |
1241                             HDAC_UNSOLTAG_EVENT_HP), cad);
1242                 } else
1243                         poll = 1;
1244                 HDA_BOOTVERBOSE(
1245                         device_printf(sc->dev,
1246                             "Enabling headphone/speaker "
1247                             "audio routing switching:\n");
1248                         device_printf(sc->dev, "\tas=%d sense nid=%d [%s]\n",
1249                             i, w->nid, (poll != 0) ? "POLL" : "UNSOL");
1250                 );
1251         }
1252         if (enable) {
1253                 hdac_hp_switch_handler(devinfo);
1254                 if (poll) {
1255                         callout_reset(&sc->poll_jack, 1,
1256                             hdac_jack_poll_callback, devinfo);
1257                 }
1258         }
1259 }
1260
1261 /*
1262  * Unsolicited messages handler.
1263  */
1264 static void
1265 hdac_unsolicited_handler(struct hdac_codec *codec, uint32_t tag)
1266 {
1267         struct hdac_softc *sc;
1268         struct hdac_devinfo *devinfo = NULL;
1269         int i;
1270
1271         if (codec == NULL || codec->sc == NULL)
1272                 return;
1273
1274         sc = codec->sc;
1275
1276         HDA_BOOTVERBOSE(
1277                 device_printf(sc->dev, "Unsol Tag: 0x%08x\n", tag);
1278         );
1279
1280         for (i = 0; i < codec->num_fgs; i++) {
1281                 if (codec->fgs[i].node_type ==
1282                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
1283                         devinfo = &codec->fgs[i];
1284                         break;
1285                 }
1286         }
1287
1288         if (devinfo == NULL)
1289                 return;
1290
1291         switch (tag) {
1292         case HDAC_UNSOLTAG_EVENT_HP:
1293                 hdac_hp_switch_handler(devinfo);
1294                 break;
1295         default:
1296                 device_printf(sc->dev, "Unknown unsol tag: 0x%08x!\n", tag);
1297                 break;
1298         }
1299 }
1300
1301 static int
1302 hdac_stream_intr(struct hdac_softc *sc, struct hdac_chan *ch)
1303 {
1304         /* XXX to be removed */
1305 #ifdef HDAC_INTR_EXTRA
1306         uint32_t res;
1307 #endif
1308
1309         if (!(ch->flags & HDAC_CHN_RUNNING))
1310                 return (0);
1311
1312         /* XXX to be removed */
1313 #ifdef HDAC_INTR_EXTRA
1314         res = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDSTS);
1315 #endif
1316
1317         /* XXX to be removed */
1318 #ifdef HDAC_INTR_EXTRA
1319         HDA_BOOTVERBOSE(
1320                 if (res & (HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE))
1321                         device_printf(ch->pdevinfo->dev,
1322                             "PCMDIR_%s intr triggered beyond stream boundary:"
1323                             "%08x\n",
1324                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", res);
1325         );
1326 #endif
1327
1328         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDSTS,
1329             HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS );
1330
1331         /* XXX to be removed */
1332 #ifdef HDAC_INTR_EXTRA
1333         if (res & HDAC_SDSTS_BCIS) {
1334 #endif
1335                 return (1);
1336         /* XXX to be removed */
1337 #ifdef HDAC_INTR_EXTRA
1338         }
1339 #endif
1340
1341         return (0);
1342 }
1343
1344 /****************************************************************************
1345  * void hdac_intr_handler(void *)
1346  *
1347  * Interrupt handler. Processes interrupts received from the hdac.
1348  ****************************************************************************/
1349 static void
1350 hdac_intr_handler(void *context)
1351 {
1352         struct hdac_softc *sc;
1353         uint32_t intsts;
1354         uint8_t rirbsts;
1355         struct hdac_rirb *rirb_base;
1356         uint32_t trigger;
1357         int i;
1358
1359         sc = (struct hdac_softc *)context;
1360
1361         hdac_lock(sc);
1362         if (sc->polling != 0) {
1363                 hdac_unlock(sc);
1364                 return;
1365         }
1366
1367         /* Do we have anything to do? */
1368         intsts = HDAC_READ_4(&sc->mem, HDAC_INTSTS);
1369         if (!HDA_FLAG_MATCH(intsts, HDAC_INTSTS_GIS)) {
1370                 hdac_unlock(sc);
1371                 return;
1372         }
1373
1374         trigger = 0;
1375
1376         /* Was this a controller interrupt? */
1377         if (HDA_FLAG_MATCH(intsts, HDAC_INTSTS_CIS)) {
1378                 rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
1379                 rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1380                 /* Get as many responses that we can */
1381                 while (HDA_FLAG_MATCH(rirbsts, HDAC_RIRBSTS_RINTFL)) {
1382                         HDAC_WRITE_1(&sc->mem,
1383                             HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL);
1384                         if (hdac_rirb_flush(sc) != 0)
1385                                 trigger |= HDAC_TRIGGER_UNSOL;
1386                         rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1387                 }
1388                 /* XXX to be removed */
1389                 /* Clear interrupt and exit */
1390 #ifdef HDAC_INTR_EXTRA
1391                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, HDAC_INTSTS_CIS);
1392 #endif
1393         }
1394
1395         if (intsts & HDAC_INTSTS_SIS_MASK) {
1396                 for (i = 0; i < sc->num_chans; i++) {
1397                         if ((intsts & (1 << (sc->chans[i].off >> 5))) &&
1398                             hdac_stream_intr(sc, &sc->chans[i]) != 0)
1399                                 trigger |= (1 << i);
1400                 }
1401                 /* XXX to be removed */
1402 #ifdef HDAC_INTR_EXTRA
1403                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, intsts &
1404                     HDAC_INTSTS_SIS_MASK);
1405 #endif
1406         }
1407
1408         hdac_unlock(sc);
1409
1410         for (i = 0; i < sc->num_chans; i++) {
1411                 if (trigger & (1 << i))
1412                         chn_intr(sc->chans[i].c);
1413         }
1414         if (trigger & HDAC_TRIGGER_UNSOL)
1415                 taskqueue_enqueue(taskqueue_thread, &sc->unsolq_task);
1416 }
1417
1418 /****************************************************************************
1419  * int hdac_reset(hdac_softc *, int)
1420  *
1421  * Reset the hdac to a quiescent and known state.
1422  ****************************************************************************/
1423 static int
1424 hdac_reset(struct hdac_softc *sc, int wakeup)
1425 {
1426         uint32_t gctl;
1427         int count, i;
1428
1429         /*
1430          * Stop all Streams DMA engine
1431          */
1432         for (i = 0; i < sc->num_iss; i++)
1433                 HDAC_WRITE_4(&sc->mem, HDAC_ISDCTL(sc, i), 0x0);
1434         for (i = 0; i < sc->num_oss; i++)
1435                 HDAC_WRITE_4(&sc->mem, HDAC_OSDCTL(sc, i), 0x0);
1436         for (i = 0; i < sc->num_bss; i++)
1437                 HDAC_WRITE_4(&sc->mem, HDAC_BSDCTL(sc, i), 0x0);
1438
1439         /*
1440          * Stop Control DMA engines.
1441          */
1442         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, 0x0);
1443         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, 0x0);
1444
1445         /*
1446          * Reset DMA position buffer.
1447          */
1448         HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, 0x0);
1449         HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, 0x0);
1450
1451         /*
1452          * Reset the controller. The reset must remain asserted for
1453          * a minimum of 100us.
1454          */
1455         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1456         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl & ~HDAC_GCTL_CRST);
1457         count = 10000;
1458         do {
1459                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1460                 if (!(gctl & HDAC_GCTL_CRST))
1461                         break;
1462                 DELAY(10);
1463         } while (--count);
1464         if (gctl & HDAC_GCTL_CRST) {
1465                 device_printf(sc->dev, "Unable to put hdac in reset\n");
1466                 return (ENXIO);
1467         }
1468
1469         /* If wakeup is not requested - leave the controller in reset state. */
1470         if (!wakeup)
1471                 return (0);
1472
1473         DELAY(100);
1474         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1475         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl | HDAC_GCTL_CRST);
1476         count = 10000;
1477         do {
1478                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1479                 if (gctl & HDAC_GCTL_CRST)
1480                         break;
1481                 DELAY(10);
1482         } while (--count);
1483         if (!(gctl & HDAC_GCTL_CRST)) {
1484                 device_printf(sc->dev, "Device stuck in reset\n");
1485                 return (ENXIO);
1486         }
1487
1488         /*
1489          * Wait for codecs to finish their own reset sequence. The delay here
1490          * should be of 250us but for some reasons, on it's not enough on my
1491          * computer. Let's use twice as much as necessary to make sure that
1492          * it's reset properly.
1493          */
1494         DELAY(1000);
1495
1496         return (0);
1497 }
1498
1499
1500 /****************************************************************************
1501  * int hdac_get_capabilities(struct hdac_softc *);
1502  *
1503  * Retreive the general capabilities of the hdac;
1504  *      Number of Input Streams
1505  *      Number of Output Streams
1506  *      Number of bidirectional Streams
1507  *      64bit ready
1508  *      CORB and RIRB sizes
1509  ****************************************************************************/
1510 static int
1511 hdac_get_capabilities(struct hdac_softc *sc)
1512 {
1513         uint16_t gcap;
1514         uint8_t corbsize, rirbsize;
1515
1516         gcap = HDAC_READ_2(&sc->mem, HDAC_GCAP);
1517         sc->num_iss = HDAC_GCAP_ISS(gcap);
1518         sc->num_oss = HDAC_GCAP_OSS(gcap);
1519         sc->num_bss = HDAC_GCAP_BSS(gcap);
1520
1521         sc->support_64bit = HDA_FLAG_MATCH(gcap, HDAC_GCAP_64OK);
1522
1523         corbsize = HDAC_READ_1(&sc->mem, HDAC_CORBSIZE);
1524         if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_256) ==
1525             HDAC_CORBSIZE_CORBSZCAP_256)
1526                 sc->corb_size = 256;
1527         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_16) ==
1528             HDAC_CORBSIZE_CORBSZCAP_16)
1529                 sc->corb_size = 16;
1530         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_2) ==
1531             HDAC_CORBSIZE_CORBSZCAP_2)
1532                 sc->corb_size = 2;
1533         else {
1534                 device_printf(sc->dev, "%s: Invalid corb size (%x)\n",
1535                     __func__, corbsize);
1536                 return (ENXIO);
1537         }
1538
1539         rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE);
1540         if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_256) ==
1541             HDAC_RIRBSIZE_RIRBSZCAP_256)
1542                 sc->rirb_size = 256;
1543         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_16) ==
1544             HDAC_RIRBSIZE_RIRBSZCAP_16)
1545                 sc->rirb_size = 16;
1546         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_2) ==
1547             HDAC_RIRBSIZE_RIRBSZCAP_2)
1548                 sc->rirb_size = 2;
1549         else {
1550                 device_printf(sc->dev, "%s: Invalid rirb size (%x)\n",
1551                     __func__, rirbsize);
1552                 return (ENXIO);
1553         }
1554
1555         HDA_BOOTHVERBOSE(
1556                 device_printf(sc->dev, "    CORB size: %d\n", sc->corb_size);
1557                 device_printf(sc->dev, "    RIRB size: %d\n", sc->rirb_size);
1558                 device_printf(sc->dev, "      Streams: ISS=%d OSS=%d BSS=%d\n",
1559                     sc->num_iss, sc->num_oss, sc->num_bss);
1560         );
1561
1562         return (0);
1563 }
1564
1565
1566 /****************************************************************************
1567  * void hdac_dma_cb
1568  *
1569  * This function is called by bus_dmamap_load when the mapping has been
1570  * established. We just record the physical address of the mapping into
1571  * the struct hdac_dma passed in.
1572  ****************************************************************************/
1573 static void
1574 hdac_dma_cb(void *callback_arg, bus_dma_segment_t *segs, int nseg, int error)
1575 {
1576         struct hdac_dma *dma;
1577
1578         if (error == 0) {
1579                 dma = (struct hdac_dma *)callback_arg;
1580                 dma->dma_paddr = segs[0].ds_addr;
1581         }
1582 }
1583
1584
1585 /****************************************************************************
1586  * int hdac_dma_alloc
1587  *
1588  * This function allocate and setup a dma region (struct hdac_dma).
1589  * It must be freed by a corresponding hdac_dma_free.
1590  ****************************************************************************/
1591 static int
1592 hdac_dma_alloc(struct hdac_softc *sc, struct hdac_dma *dma, bus_size_t size)
1593 {
1594         bus_size_t roundsz;
1595         int result;
1596         int lowaddr;
1597
1598         roundsz = roundup2(size, HDAC_DMA_ALIGNMENT);
1599         lowaddr = (sc->support_64bit) ? BUS_SPACE_MAXADDR :
1600             BUS_SPACE_MAXADDR_32BIT;
1601         bzero(dma, sizeof(*dma));
1602
1603         /*
1604          * Create a DMA tag
1605          */
1606         result = bus_dma_tag_create(NULL,       /* parent */
1607             HDAC_DMA_ALIGNMENT,                 /* alignment */
1608             0,                                  /* boundary */
1609             lowaddr,                            /* lowaddr */
1610             BUS_SPACE_MAXADDR,                  /* highaddr */
1611             NULL,                               /* filtfunc */
1612             NULL,                               /* fistfuncarg */
1613             roundsz,                            /* maxsize */
1614             1,                                  /* nsegments */
1615             roundsz,                            /* maxsegsz */
1616             0,                                  /* flags */
1617             NULL,                               /* lockfunc */
1618             NULL,                               /* lockfuncarg */
1619             &dma->dma_tag);                     /* dmat */
1620         if (result != 0) {
1621                 device_printf(sc->dev, "%s: bus_dma_tag_create failed (%x)\n",
1622                     __func__, result);
1623                 goto hdac_dma_alloc_fail;
1624         }
1625
1626         /*
1627          * Allocate DMA memory
1628          */
1629         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1630             BUS_DMA_NOWAIT | BUS_DMA_ZERO |
1631             ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0),
1632             &dma->dma_map);
1633         if (result != 0) {
1634                 device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%x)\n",
1635                     __func__, result);
1636                 goto hdac_dma_alloc_fail;
1637         }
1638
1639         dma->dma_size = roundsz;
1640
1641         /*
1642          * Map the memory
1643          */
1644         result = bus_dmamap_load(dma->dma_tag, dma->dma_map,
1645             (void *)dma->dma_vaddr, roundsz, hdac_dma_cb, (void *)dma, 0);
1646         if (result != 0 || dma->dma_paddr == 0) {
1647                 if (result == 0)
1648                         result = ENOMEM;
1649                 device_printf(sc->dev, "%s: bus_dmamem_load failed (%x)\n",
1650                     __func__, result);
1651                 goto hdac_dma_alloc_fail;
1652         }
1653
1654         HDA_BOOTHVERBOSE(
1655                 device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n",
1656                     __func__, (uintmax_t)size, (uintmax_t)roundsz);
1657         );
1658
1659         return (0);
1660
1661 hdac_dma_alloc_fail:
1662         hdac_dma_free(sc, dma);
1663
1664         return (result);
1665 }
1666
1667
1668 /****************************************************************************
1669  * void hdac_dma_free(struct hdac_softc *, struct hdac_dma *)
1670  *
1671  * Free a struct dhac_dma that has been previously allocated via the
1672  * hdac_dma_alloc function.
1673  ****************************************************************************/
1674 static void
1675 hdac_dma_free(struct hdac_softc *sc, struct hdac_dma *dma)
1676 {
1677         if (dma->dma_map != NULL) {
1678 #if 0
1679                 /* Flush caches */
1680                 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
1681                     BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1682 #endif
1683                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1684         }
1685         if (dma->dma_vaddr != NULL) {
1686                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1687                 dma->dma_vaddr = NULL;
1688         }
1689         dma->dma_map = NULL;
1690         if (dma->dma_tag != NULL) {
1691                 bus_dma_tag_destroy(dma->dma_tag);
1692                 dma->dma_tag = NULL;
1693         }
1694         dma->dma_size = 0;
1695 }
1696
1697 /****************************************************************************
1698  * int hdac_mem_alloc(struct hdac_softc *)
1699  *
1700  * Allocate all the bus resources necessary to speak with the physical
1701  * controller.
1702  ****************************************************************************/
1703 static int
1704 hdac_mem_alloc(struct hdac_softc *sc)
1705 {
1706         struct hdac_mem *mem;
1707
1708         mem = &sc->mem;
1709         mem->mem_rid = PCIR_BAR(0);
1710         mem->mem_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
1711             &mem->mem_rid, RF_ACTIVE);
1712         if (mem->mem_res == NULL) {
1713                 device_printf(sc->dev,
1714                     "%s: Unable to allocate memory resource\n", __func__);
1715                 return (ENOMEM);
1716         }
1717         mem->mem_tag = rman_get_bustag(mem->mem_res);
1718         mem->mem_handle = rman_get_bushandle(mem->mem_res);
1719
1720         return (0);
1721 }
1722
1723 /****************************************************************************
1724  * void hdac_mem_free(struct hdac_softc *)
1725  *
1726  * Free up resources previously allocated by hdac_mem_alloc.
1727  ****************************************************************************/
1728 static void
1729 hdac_mem_free(struct hdac_softc *sc)
1730 {
1731         struct hdac_mem *mem;
1732
1733         mem = &sc->mem;
1734         if (mem->mem_res != NULL)
1735                 bus_release_resource(sc->dev, SYS_RES_MEMORY, mem->mem_rid,
1736                     mem->mem_res);
1737         mem->mem_res = NULL;
1738 }
1739
1740 /****************************************************************************
1741  * int hdac_irq_alloc(struct hdac_softc *)
1742  *
1743  * Allocate and setup the resources necessary for interrupt handling.
1744  ****************************************************************************/
1745 static int
1746 hdac_irq_alloc(struct hdac_softc *sc)
1747 {
1748         struct hdac_irq *irq;
1749         int result;
1750
1751         irq = &sc->irq;
1752         irq->irq_rid = 0x0;
1753
1754 #ifdef HDAC_MSI_ENABLED
1755         if ((sc->flags & HDAC_F_MSI) &&
1756             (result = pci_msi_count(sc->dev)) == 1 &&
1757             pci_alloc_msi(sc->dev, &result) == 0)
1758                 irq->irq_rid = 0x1;
1759         else
1760 #endif
1761                 sc->flags &= ~HDAC_F_MSI;
1762
1763         irq->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
1764             &irq->irq_rid, RF_SHAREABLE | RF_ACTIVE);
1765         if (irq->irq_res == NULL) {
1766                 device_printf(sc->dev, "%s: Unable to allocate irq\n",
1767                     __func__);
1768                 goto hdac_irq_alloc_fail;
1769         }
1770         result = bus_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE | INTR_TYPE_AV,
1771             NULL, hdac_intr_handler, sc, &irq->irq_handle);
1772         if (result != 0) {
1773                 device_printf(sc->dev,
1774                     "%s: Unable to setup interrupt handler (%x)\n",
1775                     __func__, result);
1776                 goto hdac_irq_alloc_fail;
1777         }
1778
1779         return (0);
1780
1781 hdac_irq_alloc_fail:
1782         hdac_irq_free(sc);
1783
1784         return (ENXIO);
1785 }
1786
1787 /****************************************************************************
1788  * void hdac_irq_free(struct hdac_softc *)
1789  *
1790  * Free up resources previously allocated by hdac_irq_alloc.
1791  ****************************************************************************/
1792 static void
1793 hdac_irq_free(struct hdac_softc *sc)
1794 {
1795         struct hdac_irq *irq;
1796
1797         irq = &sc->irq;
1798         if (irq->irq_res != NULL && irq->irq_handle != NULL)
1799                 bus_teardown_intr(sc->dev, irq->irq_res, irq->irq_handle);
1800         if (irq->irq_res != NULL)
1801                 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->irq_rid,
1802                     irq->irq_res);
1803 #ifdef HDAC_MSI_ENABLED
1804         if ((sc->flags & HDAC_F_MSI) && irq->irq_rid == 0x1)
1805                 pci_release_msi(sc->dev);
1806 #endif
1807         irq->irq_handle = NULL;
1808         irq->irq_res = NULL;
1809         irq->irq_rid = 0x0;
1810 }
1811
1812 /****************************************************************************
1813  * void hdac_corb_init(struct hdac_softc *)
1814  *
1815  * Initialize the corb registers for operations but do not start it up yet.
1816  * The CORB engine must not be running when this function is called.
1817  ****************************************************************************/
1818 static void
1819 hdac_corb_init(struct hdac_softc *sc)
1820 {
1821         uint8_t corbsize;
1822         uint64_t corbpaddr;
1823
1824         /* Setup the CORB size. */
1825         switch (sc->corb_size) {
1826         case 256:
1827                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256);
1828                 break;
1829         case 16:
1830                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_16);
1831                 break;
1832         case 2:
1833                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_2);
1834                 break;
1835         default:
1836                 panic("%s: Invalid CORB size (%x)\n", __func__, sc->corb_size);
1837         }
1838         HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize);
1839
1840         /* Setup the CORB Address in the hdac */
1841         corbpaddr = (uint64_t)sc->corb_dma.dma_paddr;
1842         HDAC_WRITE_4(&sc->mem, HDAC_CORBLBASE, (uint32_t)corbpaddr);
1843         HDAC_WRITE_4(&sc->mem, HDAC_CORBUBASE, (uint32_t)(corbpaddr >> 32));
1844
1845         /* Set the WP and RP */
1846         sc->corb_wp = 0;
1847         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
1848         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, HDAC_CORBRP_CORBRPRST);
1849         /*
1850          * The HDA specification indicates that the CORBRPRST bit will always
1851          * read as zero. Unfortunately, it seems that at least the 82801G
1852          * doesn't reset the bit to zero, which stalls the corb engine.
1853          * manually reset the bit to zero before continuing.
1854          */
1855         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, 0x0);
1856
1857         /* Enable CORB error reporting */
1858 #if 0
1859         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, HDAC_CORBCTL_CMEIE);
1860 #endif
1861 }
1862
1863 /****************************************************************************
1864  * void hdac_rirb_init(struct hdac_softc *)
1865  *
1866  * Initialize the rirb registers for operations but do not start it up yet.
1867  * The RIRB engine must not be running when this function is called.
1868  ****************************************************************************/
1869 static void
1870 hdac_rirb_init(struct hdac_softc *sc)
1871 {
1872         uint8_t rirbsize;
1873         uint64_t rirbpaddr;
1874
1875         /* Setup the RIRB size. */
1876         switch (sc->rirb_size) {
1877         case 256:
1878                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256);
1879                 break;
1880         case 16:
1881                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_16);
1882                 break;
1883         case 2:
1884                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_2);
1885                 break;
1886         default:
1887                 panic("%s: Invalid RIRB size (%x)\n", __func__, sc->rirb_size);
1888         }
1889         HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize);
1890
1891         /* Setup the RIRB Address in the hdac */
1892         rirbpaddr = (uint64_t)sc->rirb_dma.dma_paddr;
1893         HDAC_WRITE_4(&sc->mem, HDAC_RIRBLBASE, (uint32_t)rirbpaddr);
1894         HDAC_WRITE_4(&sc->mem, HDAC_RIRBUBASE, (uint32_t)(rirbpaddr >> 32));
1895
1896         /* Setup the WP and RP */
1897         sc->rirb_rp = 0;
1898         HDAC_WRITE_2(&sc->mem, HDAC_RIRBWP, HDAC_RIRBWP_RIRBWPRST);
1899
1900         /* Setup the interrupt threshold */
1901         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, sc->rirb_size / 2);
1902
1903         /* Enable Overrun and response received reporting */
1904 #if 0
1905         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL,
1906             HDAC_RIRBCTL_RIRBOIC | HDAC_RIRBCTL_RINTCTL);
1907 #else
1908         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, HDAC_RIRBCTL_RINTCTL);
1909 #endif
1910
1911 #if 0
1912         /*
1913          * Make sure that the Host CPU cache doesn't contain any dirty
1914          * cache lines that falls in the rirb. If I understood correctly, it
1915          * should be sufficient to do this only once as the rirb is purely
1916          * read-only from now on.
1917          */
1918         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
1919             BUS_DMASYNC_PREREAD);
1920 #endif
1921 }
1922
1923 /****************************************************************************
1924  * void hdac_corb_start(hdac_softc *)
1925  *
1926  * Startup the corb DMA engine
1927  ****************************************************************************/
1928 static void
1929 hdac_corb_start(struct hdac_softc *sc)
1930 {
1931         uint32_t corbctl;
1932
1933         corbctl = HDAC_READ_1(&sc->mem, HDAC_CORBCTL);
1934         corbctl |= HDAC_CORBCTL_CORBRUN;
1935         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, corbctl);
1936 }
1937
1938 /****************************************************************************
1939  * void hdac_rirb_start(hdac_softc *)
1940  *
1941  * Startup the rirb DMA engine
1942  ****************************************************************************/
1943 static void
1944 hdac_rirb_start(struct hdac_softc *sc)
1945 {
1946         uint32_t rirbctl;
1947
1948         rirbctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
1949         rirbctl |= HDAC_RIRBCTL_RIRBDMAEN;
1950         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, rirbctl);
1951 }
1952
1953
1954 /****************************************************************************
1955  * void hdac_scan_codecs(struct hdac_softc *, int)
1956  *
1957  * Scan the bus for available codecs, starting with num.
1958  ****************************************************************************/
1959 static void
1960 hdac_scan_codecs(struct hdac_softc *sc)
1961 {
1962         struct hdac_codec *codec;
1963         int i;
1964         uint16_t statests;
1965
1966         statests = HDAC_READ_2(&sc->mem, HDAC_STATESTS);
1967         for (i = 0; i < HDAC_CODEC_MAX; i++) {
1968                 if (HDAC_STATESTS_SDIWAKE(statests, i)) {
1969                         /* We have found a codec. */
1970                         codec = (struct hdac_codec *)malloc(sizeof(*codec),
1971                             M_HDAC, M_ZERO | M_NOWAIT);
1972                         if (codec == NULL) {
1973                                 device_printf(sc->dev,
1974                                     "Unable to allocate memory for codec\n");
1975                                 continue;
1976                         }
1977                         codec->commands = NULL;
1978                         codec->responses_received = 0;
1979                         codec->verbs_sent = 0;
1980                         codec->sc = sc;
1981                         codec->cad = i;
1982                         sc->codecs[i] = codec;
1983                         hdac_probe_codec(codec);
1984                 }
1985         }
1986         /* All codecs have been probed, now try to attach drivers to them */
1987         /* bus_generic_attach(sc->dev); */
1988 }
1989
1990 /****************************************************************************
1991  * void hdac_probe_codec(struct hdac_softc *, int)
1992  *
1993  * Probe a the given codec_id for available function groups.
1994  ****************************************************************************/
1995 static void
1996 hdac_probe_codec(struct hdac_codec *codec)
1997 {
1998         struct hdac_softc *sc = codec->sc;
1999         uint32_t vendorid, revisionid, subnode;
2000         int startnode;
2001         int endnode;
2002         int i;
2003         nid_t cad = codec->cad;
2004
2005         HDA_BOOTVERBOSE(
2006                 device_printf(sc->dev, "Probing codec #%d...\n", cad);
2007         );
2008         vendorid = hdac_command(sc,
2009             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_VENDOR_ID),
2010             cad);
2011         revisionid = hdac_command(sc,
2012             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_REVISION_ID),
2013             cad);
2014         codec->vendor_id = HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid);
2015         codec->device_id = HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid);
2016         codec->revision_id = HDA_PARAM_REVISION_ID_REVISION_ID(revisionid);
2017         codec->stepping_id = HDA_PARAM_REVISION_ID_STEPPING_ID(revisionid);
2018
2019         if (vendorid == HDAC_INVALID && revisionid == HDAC_INVALID) {
2020                 device_printf(sc->dev, "Codec #%d is not responding!"
2021                     " Probing aborted.\n", cad);
2022                 return;
2023         }
2024
2025         device_printf(sc->dev, "HDA Codec #%d: %s\n",
2026             cad, hdac_codec_name(codec));
2027         HDA_BOOTVERBOSE(
2028                 device_printf(sc->dev, " HDA Codec ID: 0x%08x\n",
2029                     hdac_codec_id(codec));
2030                 device_printf(sc->dev, "       Vendor: 0x%04x\n",
2031                     codec->vendor_id);
2032                 device_printf(sc->dev, "       Device: 0x%04x\n",
2033                     codec->device_id);
2034                 device_printf(sc->dev, "     Revision: 0x%02x\n",
2035                     codec->revision_id);
2036                 device_printf(sc->dev, "     Stepping: 0x%02x\n",
2037                     codec->stepping_id);
2038                 device_printf(sc->dev, "PCI Subvendor: 0x%08x\n",
2039                     sc->pci_subvendor);
2040         );
2041         subnode = hdac_command(sc,
2042             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_SUB_NODE_COUNT),
2043             cad);
2044         startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
2045         endnode = startnode + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
2046
2047         HDA_BOOTHVERBOSE(
2048                 device_printf(sc->dev, "\tstartnode=%d endnode=%d\n",
2049                     startnode, endnode);
2050         );
2051
2052         codec->fgs = (struct hdac_devinfo *)malloc(sizeof(struct hdac_devinfo) *
2053             (endnode - startnode), M_HDAC, M_NOWAIT | M_ZERO);
2054         if (codec->fgs == NULL) {
2055                 device_printf(sc->dev, "%s: Unable to allocate function groups\n",
2056                     __func__);
2057                 return;
2058         }
2059
2060         for (i = startnode; i < endnode; i++)
2061                 hdac_probe_function(codec, i);
2062         return;
2063 }
2064
2065 /*
2066  * Probe codec function and add it to the list.
2067  */
2068 static void
2069 hdac_probe_function(struct hdac_codec *codec, nid_t nid)
2070 {
2071         struct hdac_softc *sc = codec->sc;
2072         struct hdac_devinfo *devinfo = &codec->fgs[codec->num_fgs];
2073         uint32_t fctgrptype;
2074         uint32_t res;
2075         nid_t cad = codec->cad;
2076
2077         fctgrptype = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hdac_command(sc,
2078             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_FCT_GRP_TYPE), cad));
2079
2080         devinfo->nid = nid;
2081         devinfo->node_type = fctgrptype;
2082         devinfo->codec = codec;
2083
2084         res = hdac_command(sc,
2085             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_SUB_NODE_COUNT), cad);
2086
2087         devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res);
2088         devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res);
2089         devinfo->endnode = devinfo->startnode + devinfo->nodecnt;
2090
2091         HDA_BOOTVERBOSE(
2092                 device_printf(sc->dev,
2093                     "\tFound %s FG nid=%d startnode=%d endnode=%d total=%d\n",
2094                     (fctgrptype == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) ? "audio":
2095                     (fctgrptype == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM) ? "modem":
2096                     "unknown", nid, devinfo->startnode, devinfo->endnode,
2097                     devinfo->nodecnt);
2098         );
2099
2100         if (devinfo->nodecnt > 0)
2101                 devinfo->widget = (struct hdac_widget *)malloc(
2102                     sizeof(*(devinfo->widget)) * devinfo->nodecnt, M_HDAC,
2103                     M_NOWAIT | M_ZERO);
2104         else
2105                 devinfo->widget = NULL;
2106
2107         if (devinfo->widget == NULL) {
2108                 device_printf(sc->dev, "unable to allocate widgets!\n");
2109                 devinfo->endnode = devinfo->startnode;
2110                 devinfo->nodecnt = 0;
2111                 return;
2112         }
2113
2114         codec->num_fgs++;
2115 }
2116
2117 static void
2118 hdac_widget_connection_parse(struct hdac_widget *w)
2119 {
2120         struct hdac_softc *sc = w->devinfo->codec->sc;
2121         uint32_t res;
2122         int i, j, max, ents, entnum;
2123         nid_t cad = w->devinfo->codec->cad;
2124         nid_t nid = w->nid;
2125         nid_t cnid, addcnid, prevcnid;
2126
2127         w->nconns = 0;
2128
2129         res = hdac_command(sc,
2130             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_CONN_LIST_LENGTH), cad);
2131
2132         ents = HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(res);
2133
2134         if (ents < 1)
2135                 return;
2136
2137         entnum = HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(res) ? 2 : 4;
2138         max = (sizeof(w->conns) / sizeof(w->conns[0])) - 1;
2139         prevcnid = 0;
2140
2141 #define CONN_RMASK(e)           (1 << ((32 / (e)) - 1))
2142 #define CONN_NMASK(e)           (CONN_RMASK(e) - 1)
2143 #define CONN_RESVAL(r, e, n)    ((r) >> ((32 / (e)) * (n)))
2144 #define CONN_RANGE(r, e, n)     (CONN_RESVAL(r, e, n) & CONN_RMASK(e))
2145 #define CONN_CNID(r, e, n)      (CONN_RESVAL(r, e, n) & CONN_NMASK(e))
2146
2147         for (i = 0; i < ents; i += entnum) {
2148                 res = hdac_command(sc,
2149                     HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, i), cad);
2150                 for (j = 0; j < entnum; j++) {
2151                         cnid = CONN_CNID(res, entnum, j);
2152                         if (cnid == 0) {
2153                                 if (w->nconns < ents)
2154                                         device_printf(sc->dev,
2155                                             "%s: nid=%d WARNING: zero cnid "
2156                                             "entnum=%d j=%d index=%d "
2157                                             "entries=%d found=%d res=0x%08x\n",
2158                                             __func__, nid, entnum, j, i,
2159                                             ents, w->nconns, res);
2160                                 else
2161                                         goto getconns_out;
2162                         }
2163                         if (cnid < w->devinfo->startnode ||
2164                             cnid >= w->devinfo->endnode) {
2165                                 HDA_BOOTVERBOSE(
2166                                         device_printf(sc->dev,
2167                                             "GHOST: nid=%d j=%d "
2168                                             "entnum=%d index=%d res=0x%08x\n",
2169                                             nid, j, entnum, i, res);
2170                                 );
2171                         }
2172                         if (CONN_RANGE(res, entnum, j) == 0)
2173                                 addcnid = cnid;
2174                         else if (prevcnid == 0 || prevcnid >= cnid) {
2175                                 device_printf(sc->dev,
2176                                     "%s: WARNING: Invalid child range "
2177                                     "nid=%d index=%d j=%d entnum=%d "
2178                                     "prevcnid=%d cnid=%d res=0x%08x\n",
2179                                     __func__, nid, i, j, entnum, prevcnid,
2180                                     cnid, res);
2181                                 addcnid = cnid;
2182                         } else
2183                                 addcnid = prevcnid + 1;
2184                         while (addcnid <= cnid) {
2185                                 if (w->nconns > max) {
2186                                         device_printf(sc->dev,
2187                                             "Adding %d (nid=%d): "
2188                                             "Max connection reached! max=%d\n",
2189                                             addcnid, nid, max + 1);
2190                                         goto getconns_out;
2191                                 }
2192                                 w->connsenable[w->nconns] = 1;
2193                                 w->conns[w->nconns++] = addcnid++;
2194                         }
2195                         prevcnid = cnid;
2196                 }
2197         }
2198
2199 getconns_out:
2200         return;
2201 }
2202
2203 static uint32_t
2204 hdac_widget_pin_patch(uint32_t config, const char *str)
2205 {
2206         char buf[256];
2207         char *key, *value, *rest, *bad;
2208         int ival, i;
2209
2210         strlcpy(buf, str, sizeof(buf));
2211         rest = buf;
2212         while ((key = strsep(&rest, "=")) != NULL) {
2213                 value = strsep(&rest, " \t");
2214                 if (value == NULL)
2215                         break;
2216                 ival = strtol(value, &bad, 10);
2217                 if (strcmp(key, "seq") == 0) {
2218                         config &= ~HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK;
2219                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_SEQUENCE_SHIFT) &
2220                             HDA_CONFIG_DEFAULTCONF_SEQUENCE_MASK);
2221                 } else if (strcmp(key, "as") == 0) {
2222                         config &= ~HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK;
2223                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_ASSOCIATION_SHIFT) &
2224                             HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK);
2225                 } else if (strcmp(key, "misc") == 0) {
2226                         config &= ~HDA_CONFIG_DEFAULTCONF_MISC_MASK;
2227                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_MISC_SHIFT) &
2228                             HDA_CONFIG_DEFAULTCONF_MISC_MASK);
2229                 } else if (strcmp(key, "color") == 0) {
2230                         config &= ~HDA_CONFIG_DEFAULTCONF_COLOR_MASK;
2231                         if (bad[0] == 0) {
2232                                 config |= ((ival << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT) &
2233                                     HDA_CONFIG_DEFAULTCONF_COLOR_MASK);
2234                         };
2235                         for (i = 0; i < 16; i++) {
2236                                 if (strcasecmp(HDA_COLORS[i], value) == 0) {
2237                                         config |= (i << HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT);
2238                                         break;
2239                                 }
2240                         }
2241                 } else if (strcmp(key, "ctype") == 0) {
2242                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK;
2243                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_SHIFT) &
2244                             HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE_MASK);
2245                 } else if (strcmp(key, "device") == 0) {
2246                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2247                         if (bad[0] == 0) {
2248                                 config |= ((ival << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT) &
2249                                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK);
2250                                 continue;
2251                         };
2252                         for (i = 0; i < 16; i++) {
2253                                 if (strcasecmp(HDA_DEVS[i], value) == 0) {
2254                                         config |= (i << HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT);
2255                                         break;
2256                                 }
2257                         }
2258                 } else if (strcmp(key, "loc") == 0) {
2259                         config &= ~HDA_CONFIG_DEFAULTCONF_LOCATION_MASK;
2260                         config |= ((ival << HDA_CONFIG_DEFAULTCONF_LOCATION_SHIFT) &
2261                             HDA_CONFIG_DEFAULTCONF_LOCATION_MASK);
2262                 } else if (strcmp(key, "conn") == 0) {
2263                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2264                         if (bad[0] == 0) {
2265                                 config |= ((ival << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT) &
2266                                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2267                                 continue;
2268                         };
2269                         for (i = 0; i < 4; i++) {
2270                                 if (strcasecmp(HDA_CONNS[i], value) == 0) {
2271                                         config |= (i << HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT);
2272                                         break;
2273                                 }
2274                         }
2275                 }
2276         }
2277         return (config);
2278 }
2279
2280 static uint32_t
2281 hdac_widget_pin_getconfig(struct hdac_widget *w)
2282 {
2283         struct hdac_softc *sc;
2284         uint32_t config, orig, id;
2285         nid_t cad, nid;
2286         char buf[32];
2287         const char *res = NULL, *patch = NULL;
2288
2289         sc = w->devinfo->codec->sc;
2290         cad = w->devinfo->codec->cad;
2291         nid = w->nid;
2292         id = hdac_codec_id(w->devinfo->codec);
2293
2294         config = hdac_command(sc,
2295             HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid),
2296             cad);
2297         orig = config;
2298
2299         HDA_BOOTVERBOSE(
2300                 hdac_dump_pin_config(w, orig);
2301         );
2302
2303         /* XXX: Old patches require complete review.
2304          * Now they may create more problem then solve due to
2305          * incorrect associations.
2306          */
2307         if (id == HDA_CODEC_ALC880 && sc->pci_subvendor == LG_LW20_SUBVENDOR) {
2308                 switch (nid) {
2309                 case 26:
2310                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2311                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2312                         break;
2313                 case 27:
2314                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2315                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT;
2316                         break;
2317                 default:
2318                         break;
2319                 }
2320         } else if (id == HDA_CODEC_ALC880 &&
2321             (sc->pci_subvendor == CLEVO_D900T_SUBVENDOR ||
2322             sc->pci_subvendor == ASUS_M5200_SUBVENDOR)) {
2323                 /*
2324                  * Super broken BIOS
2325                  */
2326                 switch (nid) {
2327                 case 24:        /* MIC1 */
2328                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2329                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2330                         break;
2331                 case 25:        /* XXX MIC2 */
2332                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2333                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2334                         break;
2335                 case 26:        /* LINE1 */
2336                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2337                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2338                         break;
2339                 case 27:        /* XXX LINE2 */
2340                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2341                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2342                         break;
2343                 case 28:        /* CD */
2344                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2345                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_CD;
2346                         break;
2347                 }
2348         } else if (id == HDA_CODEC_ALC883 &&
2349             (sc->pci_subvendor == MSI_MS034A_SUBVENDOR ||
2350             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor))) {
2351                 switch (nid) {
2352                 case 25:
2353                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2354                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2355                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2356                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2357                         break;
2358                 case 28:
2359                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2360                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2361                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2362                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2363                         break;
2364                 }
2365         } else if (id == HDA_CODEC_CX20549 && sc->pci_subvendor ==
2366             HP_V3000_SUBVENDOR) {
2367                 switch (nid) {
2368                 case 18:
2369                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2370                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2371                         break;
2372                 case 20:
2373                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2374                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2375                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2376                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2377                         break;
2378                 case 21:
2379                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2380                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2381                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2382                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2383                         break;
2384                 }
2385         } else if (id == HDA_CODEC_CX20551 && sc->pci_subvendor ==
2386             HP_DV5000_SUBVENDOR) {
2387                 switch (nid) {
2388                 case 20:
2389                 case 21:
2390                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2391                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2392                         break;
2393                 }
2394         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2395             ASUS_W6F_SUBVENDOR) {
2396                 switch (nid) {
2397                 case 11:
2398                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2399                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2400                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT |
2401                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2402                         break;
2403                 case 12:
2404                 case 14:
2405                 case 16:
2406                 case 31:
2407                 case 32:
2408                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2409                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2410                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2411                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2412                         break;
2413                 case 15:
2414                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2415                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2416                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2417                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2418                         break;
2419                 }
2420         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2421             UNIWILL_9075_SUBVENDOR) {
2422                 switch (nid) {
2423                 case 15:
2424                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2425                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2426                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2427                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2428                         break;
2429                 }
2430         }
2431
2432         /* New patches */
2433         if (id == HDA_CODEC_AD1986A &&
2434             (sc->pci_subvendor == ASUS_M2NPVMX_SUBVENDOR ||
2435             sc->pci_subvendor == ASUS_A8NVMCSM_SUBVENDOR)) {
2436                 switch (nid) {
2437                 case 28: /* 5.1 out => 2.0 out + 2 inputs */
2438                         patch = "device=Line-in as=8 seq=1";
2439                         break;
2440                 case 29:
2441                         patch = "device=Mic as=8 seq=2";
2442                         break;
2443                 case 31: /* Lot of inputs configured with as=15 and unusable */
2444                         patch = "as=8 seq=3";
2445                         break;
2446                 case 32:
2447                         patch = "as=8 seq=4";
2448                         break;
2449                 case 34:
2450                         patch = "as=8 seq=5";
2451                         break;
2452                 case 36:
2453                         patch = "as=8 seq=6";
2454                         break;
2455                 }
2456         } else if (id == HDA_CODEC_ALC260 &&
2457             HDA_DEV_MATCH(SONY_S5_SUBVENDOR, sc->pci_subvendor)) {
2458                 switch (nid) {
2459                 case 16:
2460                         patch = "seq=15 device=Headphones";
2461                         break;
2462                 }
2463         } else if (id == HDA_CODEC_ALC268) {
2464             if (sc->pci_subvendor == ACER_T5320_SUBVENDOR) {
2465                 switch (nid) {
2466                 case 20: /* Headphones Jack */
2467                         patch = "as=1 seq=15";
2468                         break;
2469                 }
2470             }
2471         }
2472
2473         if (patch != NULL)
2474                 config = hdac_widget_pin_patch(config, patch);
2475
2476         snprintf(buf, sizeof(buf), "cad%u.nid%u.config", cad, nid);
2477         if (resource_string_value(device_get_name(sc->dev),
2478             device_get_unit(sc->dev), buf, &res) == 0) {
2479                 if (strncmp(res, "0x", 2) == 0) {
2480                         config = strtol(res + 2, NULL, 16);
2481                 } else {
2482                         config = hdac_widget_pin_patch(config, res);
2483                 }
2484         }
2485
2486         HDA_BOOTVERBOSE(
2487                 if (config != orig)
2488                         device_printf(sc->dev,
2489                             "Patching pin config nid=%u 0x%08x -> 0x%08x\n",
2490                             nid, orig, config);
2491         );
2492
2493         return (config);
2494 }
2495
2496 static uint32_t
2497 hdac_widget_pin_getcaps(struct hdac_widget *w)
2498 {
2499         struct hdac_softc *sc;
2500         uint32_t caps, orig, id;
2501         nid_t cad, nid;
2502
2503         sc = w->devinfo->codec->sc;
2504         cad = w->devinfo->codec->cad;
2505         nid = w->nid;
2506         id = hdac_codec_id(w->devinfo->codec);
2507
2508         caps = hdac_command(sc,
2509             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_PIN_CAP), cad);
2510         orig = caps;
2511
2512         HDA_BOOTVERBOSE(
2513                 if (caps != orig)
2514                         device_printf(sc->dev,
2515                             "Patching pin caps nid=%u 0x%08x -> 0x%08x\n",
2516                             nid, orig, caps);
2517         );
2518
2519         return (caps);
2520 }
2521
2522 static void
2523 hdac_widget_pin_parse(struct hdac_widget *w)
2524 {
2525         struct hdac_softc *sc = w->devinfo->codec->sc;
2526         uint32_t config, pincap;
2527         const char *devstr;
2528         nid_t cad = w->devinfo->codec->cad;
2529         nid_t nid = w->nid;
2530         int conn, color;
2531
2532         config = hdac_widget_pin_getconfig(w);
2533         w->wclass.pin.config = config;
2534
2535         pincap = hdac_widget_pin_getcaps(w);
2536         w->wclass.pin.cap = pincap;
2537
2538         w->wclass.pin.ctrl = hdac_command(sc,
2539             HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid), cad);
2540
2541         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)) {
2542                 w->param.eapdbtl = hdac_command(sc,
2543                     HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid), cad);
2544                 w->param.eapdbtl &= 0x7;
2545                 w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
2546         } else
2547                 w->param.eapdbtl = HDAC_INVALID;
2548
2549         devstr = HDA_DEVS[(config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) >>
2550             HDA_CONFIG_DEFAULTCONF_DEVICE_SHIFT];
2551
2552         conn = (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) >>
2553             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_SHIFT;
2554         color = (config & HDA_CONFIG_DEFAULTCONF_COLOR_MASK) >>
2555             HDA_CONFIG_DEFAULTCONF_COLOR_SHIFT;
2556
2557         strlcat(w->name, ": ", sizeof(w->name));
2558         strlcat(w->name, devstr, sizeof(w->name));
2559         strlcat(w->name, " (", sizeof(w->name));
2560         if (conn == 0 && color != 0 && color != 15) {
2561                 strlcat(w->name, HDA_COLORS[color], sizeof(w->name));
2562                 strlcat(w->name, " ", sizeof(w->name));
2563         }
2564         strlcat(w->name, HDA_CONNS[conn], sizeof(w->name));
2565         strlcat(w->name, ")", sizeof(w->name));
2566 }
2567
2568 static uint32_t
2569 hdac_widget_getcaps(struct hdac_widget *w, int *waspin)
2570 {
2571         struct hdac_softc *sc;
2572         uint32_t caps, orig, id;
2573         nid_t cad, nid, beeper = -1;
2574
2575         sc = w->devinfo->codec->sc;
2576         cad = w->devinfo->codec->cad;
2577         nid = w->nid;
2578         id = hdac_codec_id(w->devinfo->codec);
2579
2580         caps = hdac_command(sc,
2581             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_AUDIO_WIDGET_CAP),
2582             cad);
2583         orig = caps;
2584
2585         /* On some codecs beeper is an input pin, but it is not recordable
2586            alone. Also most of BIOSes does not declare beeper pin.
2587            Change beeper pin node type to beeper to help parser. */
2588         *waspin = 0;
2589         switch (id) {
2590         case HDA_CODEC_AD1882:
2591         case HDA_CODEC_AD1883:
2592         case HDA_CODEC_AD1984:
2593         case HDA_CODEC_AD1984A:
2594         case HDA_CODEC_AD1984B:
2595         case HDA_CODEC_AD1987:
2596         case HDA_CODEC_AD1988:
2597         case HDA_CODEC_AD1988B:
2598         case HDA_CODEC_AD1989B:
2599                 beeper = 26;
2600                 break;
2601         case HDA_CODEC_ALC260:
2602                 beeper = 23;
2603                 break;
2604         case HDA_CODEC_ALC262:
2605         case HDA_CODEC_ALC268:
2606         case HDA_CODEC_ALC880:
2607         case HDA_CODEC_ALC882:
2608         case HDA_CODEC_ALC883:
2609         case HDA_CODEC_ALC885:
2610         case HDA_CODEC_ALC888:
2611         case HDA_CODEC_ALC889:
2612                 beeper = 29;
2613                 break;
2614         }
2615         if (nid == beeper) {
2616                 caps &= ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
2617                 caps |= HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
2618                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
2619                 *waspin = 1;
2620         }
2621
2622         HDA_BOOTVERBOSE(
2623                 if (caps != orig) {
2624                         device_printf(sc->dev,
2625                             "Patching widget caps nid=%u 0x%08x -> 0x%08x\n",
2626                             nid, orig, caps);
2627                 }
2628         );
2629
2630         return (caps);
2631 }
2632
2633 static void
2634 hdac_widget_parse(struct hdac_widget *w)
2635 {
2636         struct hdac_softc *sc = w->devinfo->codec->sc;
2637         uint32_t wcap, cap;
2638         char *typestr;
2639         nid_t cad = w->devinfo->codec->cad;
2640         nid_t nid = w->nid;
2641
2642         wcap = hdac_widget_getcaps(w, &w->waspin);
2643
2644         w->param.widget_cap = wcap;
2645         w->type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(wcap);
2646
2647         switch (w->type) {
2648         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
2649                 typestr = "audio output";
2650                 break;
2651         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
2652                 typestr = "audio input";
2653                 break;
2654         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
2655                 typestr = "audio mixer";
2656                 break;
2657         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
2658                 typestr = "audio selector";
2659                 break;
2660         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
2661                 typestr = "pin";
2662                 break;
2663         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET:
2664                 typestr = "power widget";
2665                 break;
2666         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET:
2667                 typestr = "volume widget";
2668                 break;
2669         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
2670                 typestr = "beep widget";
2671                 break;
2672         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET:
2673                 typestr = "vendor widget";
2674                 break;
2675         default:
2676                 typestr = "unknown type";
2677                 break;
2678         }
2679
2680         strlcpy(w->name, typestr, sizeof(w->name));
2681
2682         hdac_widget_connection_parse(w);
2683
2684         if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) {
2685                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2686                         w->param.outamp_cap =
2687                             hdac_command(sc,
2688                             HDA_CMD_GET_PARAMETER(cad, nid,
2689                             HDA_PARAM_OUTPUT_AMP_CAP), cad);
2690                 else
2691                         w->param.outamp_cap =
2692                             w->devinfo->function.audio.outamp_cap;
2693         } else
2694                 w->param.outamp_cap = 0;
2695
2696         if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) {
2697                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2698                         w->param.inamp_cap =
2699                             hdac_command(sc,
2700                             HDA_CMD_GET_PARAMETER(cad, nid,
2701                             HDA_PARAM_INPUT_AMP_CAP), cad);
2702                 else
2703                         w->param.inamp_cap =
2704                             w->devinfo->function.audio.inamp_cap;
2705         } else
2706                 w->param.inamp_cap = 0;
2707
2708         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
2709             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
2710                 if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) {
2711                         cap = hdac_command(sc,
2712                             HDA_CMD_GET_PARAMETER(cad, nid,
2713                             HDA_PARAM_SUPP_STREAM_FORMATS), cad);
2714                         w->param.supp_stream_formats = (cap != 0) ? cap :
2715                             w->devinfo->function.audio.supp_stream_formats;
2716                         cap = hdac_command(sc,
2717                             HDA_CMD_GET_PARAMETER(cad, nid,
2718                             HDA_PARAM_SUPP_PCM_SIZE_RATE), cad);
2719                         w->param.supp_pcm_size_rate = (cap != 0) ? cap :
2720                             w->devinfo->function.audio.supp_pcm_size_rate;
2721                 } else {
2722                         w->param.supp_stream_formats =
2723                             w->devinfo->function.audio.supp_stream_formats;
2724                         w->param.supp_pcm_size_rate =
2725                             w->devinfo->function.audio.supp_pcm_size_rate;
2726                 }
2727         } else {
2728                 w->param.supp_stream_formats = 0;
2729                 w->param.supp_pcm_size_rate = 0;
2730         }
2731
2732         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
2733                 hdac_widget_pin_parse(w);
2734 }
2735
2736 static struct hdac_widget *
2737 hdac_widget_get(struct hdac_devinfo *devinfo, nid_t nid)
2738 {
2739         if (devinfo == NULL || devinfo->widget == NULL ||
2740                     nid < devinfo->startnode || nid >= devinfo->endnode)
2741                 return (NULL);
2742         return (&devinfo->widget[nid - devinfo->startnode]);
2743 }
2744
2745 static __inline int
2746 hda_poll_channel(struct hdac_chan *ch)
2747 {
2748         uint32_t sz, delta;
2749         volatile uint32_t ptr;
2750
2751         if (!(ch->flags & HDAC_CHN_RUNNING))
2752                 return (0);
2753
2754         sz = ch->blksz * ch->blkcnt;
2755         if (ch->dmapos != NULL)
2756                 ptr = *(ch->dmapos);
2757         else
2758                 ptr = HDAC_READ_4(&ch->devinfo->codec->sc->mem,
2759                     ch->off + HDAC_SDLPIB);
2760         ch->ptr = ptr;
2761         ptr %= sz;
2762         ptr &= ~(ch->blksz - 1);
2763         delta = (sz + ptr - ch->prevptr) % sz;
2764
2765         if (delta < ch->blksz)
2766                 return (0);
2767
2768         ch->prevptr = ptr;
2769
2770         return (1);
2771 }
2772
2773 static void
2774 hda_poll_callback(void *arg)
2775 {
2776         struct hdac_softc *sc = arg;
2777         uint32_t trigger;
2778         int i, active = 0;
2779
2780         if (sc == NULL)
2781                 return;
2782
2783         hdac_lock(sc);
2784         if (sc->polling == 0) {
2785                 hdac_unlock(sc);
2786                 return;
2787         }
2788
2789         trigger = 0;
2790         for (i = 0; i < sc->num_chans; i++) {
2791                 if ((sc->chans[i].flags & HDAC_CHN_RUNNING) == 0)
2792                     continue;
2793                 active = 1;
2794                 if (hda_poll_channel(&sc->chans[i]))
2795                     trigger |= (1 << i);
2796         }
2797
2798         /* XXX */
2799         if (active)
2800                 callout_reset(&sc->poll_hda, sc->poll_ticks,
2801                     hda_poll_callback, sc);
2802
2803         hdac_unlock(sc);
2804
2805         for (i = 0; i < sc->num_chans; i++) {
2806                 if (trigger & (1 << i))
2807                         chn_intr(sc->chans[i].c);
2808         }
2809 }
2810
2811 static int
2812 hdac_rirb_flush(struct hdac_softc *sc)
2813 {
2814         struct hdac_rirb *rirb_base, *rirb;
2815         struct hdac_codec *codec;
2816         struct hdac_command_list *commands;
2817         nid_t cad;
2818         uint32_t resp;
2819         uint8_t rirbwp;
2820         int ret;
2821
2822         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2823         rirbwp = HDAC_READ_1(&sc->mem, HDAC_RIRBWP);
2824 #if 0
2825         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
2826             BUS_DMASYNC_POSTREAD);
2827 #endif
2828
2829         ret = 0;
2830
2831         while (sc->rirb_rp != rirbwp) {
2832                 sc->rirb_rp++;
2833                 sc->rirb_rp %= sc->rirb_size;
2834                 rirb = &rirb_base[sc->rirb_rp];
2835                 cad = HDAC_RIRB_RESPONSE_EX_SDATA_IN(rirb->response_ex);
2836                 if (cad < 0 || cad >= HDAC_CODEC_MAX ||
2837                     sc->codecs[cad] == NULL)
2838                         continue;
2839                 resp = rirb->response;
2840                 codec = sc->codecs[cad];
2841                 commands = codec->commands;
2842                 if (rirb->response_ex & HDAC_RIRB_RESPONSE_EX_UNSOLICITED) {
2843                         sc->unsolq[sc->unsolq_wp++] = (cad << 16) |
2844                             ((resp >> 26) & 0xffff);
2845                         sc->unsolq_wp %= HDAC_UNSOLQ_MAX;
2846                 } else if (commands != NULL && commands->num_commands > 0 &&
2847                     codec->responses_received < commands->num_commands)
2848                         commands->responses[codec->responses_received++] =
2849                             resp;
2850                 ret++;
2851         }
2852
2853         return (ret);
2854 }
2855
2856 static int
2857 hdac_unsolq_flush(struct hdac_softc *sc)
2858 {
2859         nid_t cad;
2860         uint32_t tag;
2861         int ret = 0;
2862
2863         if (sc->unsolq_st == HDAC_UNSOLQ_READY) {
2864                 sc->unsolq_st = HDAC_UNSOLQ_BUSY;
2865                 while (sc->unsolq_rp != sc->unsolq_wp) {
2866                         cad = sc->unsolq[sc->unsolq_rp] >> 16;
2867                         tag = sc->unsolq[sc->unsolq_rp++] & 0xffff;
2868                         sc->unsolq_rp %= HDAC_UNSOLQ_MAX;
2869                         hdac_unsolicited_handler(sc->codecs[cad], tag);
2870                         ret++;
2871                 }
2872                 sc->unsolq_st = HDAC_UNSOLQ_READY;
2873         }
2874
2875         return (ret);
2876 }
2877
2878 static void
2879 hdac_poll_callback(void *arg)
2880 {
2881         struct hdac_softc *sc = arg;
2882         if (sc == NULL)
2883                 return;
2884
2885         hdac_lock(sc);
2886         if (sc->polling == 0 || sc->poll_ival == 0) {
2887                 hdac_unlock(sc);
2888                 return;
2889         }
2890         if (hdac_rirb_flush(sc) != 0)
2891                 hdac_unsolq_flush(sc);
2892         callout_reset(&sc->poll_hdac, sc->poll_ival, hdac_poll_callback, sc);
2893         hdac_unlock(sc);
2894 }
2895
2896 static void
2897 hdac_poll_reinit(struct hdac_softc *sc)
2898 {
2899         int i, pollticks, min = 1000000;
2900         struct hdac_chan *ch;
2901
2902         for (i = 0; i < sc->num_chans; i++) {
2903                 if ((sc->chans[i].flags & HDAC_CHN_RUNNING) == 0)
2904                         continue;
2905                 ch = &sc->chans[i];
2906                 pollticks = ((uint64_t)hz * ch->blksz) /
2907                     ((uint64_t)sndbuf_getbps(ch->b) *
2908                     sndbuf_getspd(ch->b));
2909                 pollticks >>= 1;
2910                 if (pollticks > hz)
2911                         pollticks = hz;
2912                 if (pollticks < 1) {
2913                         HDA_BOOTVERBOSE(
2914                                 device_printf(sc->dev,
2915                                     "%s: pollticks=%d < 1 !\n",
2916                                     __func__, pollticks);
2917                         );
2918                         pollticks = 1;
2919                 }
2920                 if (min > pollticks)
2921                         min = pollticks;
2922         }
2923         HDA_BOOTVERBOSE(
2924                 device_printf(sc->dev,
2925                     "%s: pollticks %d -> %d\n",
2926                     __func__, sc->poll_ticks, min);
2927         );
2928         sc->poll_ticks = min;
2929         if (min == 1000000)
2930                 callout_stop(&sc->poll_hda);
2931         else
2932                 callout_reset(&sc->poll_hda, 1, hda_poll_callback, sc);
2933 }
2934
2935 static void
2936 hdac_stream_stop(struct hdac_chan *ch)
2937 {
2938         struct hdac_softc *sc = ch->devinfo->codec->sc;
2939         uint32_t ctl;
2940
2941         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2942         ctl &= ~(HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2943             HDAC_SDCTL_RUN);
2944         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2945
2946         ch->flags &= ~HDAC_CHN_RUNNING;
2947
2948         if (sc->polling != 0)
2949                 hdac_poll_reinit(sc);
2950
2951         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2952         ctl &= ~(1 << (ch->off >> 5));
2953         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2954 }
2955
2956 static void
2957 hdac_stream_start(struct hdac_chan *ch)
2958 {
2959         struct hdac_softc *sc = ch->devinfo->codec->sc;
2960         uint32_t ctl;
2961
2962         ch->flags |= HDAC_CHN_RUNNING;
2963
2964         if (sc->polling != 0)
2965                 hdac_poll_reinit(sc);
2966
2967         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2968         ctl |= 1 << (ch->off >> 5);
2969         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2970
2971         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2972         ctl |= HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2973             HDAC_SDCTL_RUN;
2974         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2975 }
2976
2977 static void
2978 hdac_stream_reset(struct hdac_chan *ch)
2979 {
2980         struct hdac_softc *sc = ch->devinfo->codec->sc;
2981         int timeout = 1000;
2982         int to = timeout;
2983         uint32_t ctl;
2984
2985         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2986         ctl |= HDAC_SDCTL_SRST;
2987         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2988         do {
2989                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2990                 if (ctl & HDAC_SDCTL_SRST)
2991                         break;
2992                 DELAY(10);
2993         } while (--to);
2994         if (!(ctl & HDAC_SDCTL_SRST)) {
2995                 device_printf(sc->dev, "timeout in reset\n");
2996         }
2997         ctl &= ~HDAC_SDCTL_SRST;
2998         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2999         to = timeout;
3000         do {
3001                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
3002                 if (!(ctl & HDAC_SDCTL_SRST))
3003                         break;
3004                 DELAY(10);
3005         } while (--to);
3006         if (ctl & HDAC_SDCTL_SRST)
3007                 device_printf(sc->dev, "can't reset!\n");
3008 }
3009
3010 static void
3011 hdac_stream_setid(struct hdac_chan *ch)
3012 {
3013         struct hdac_softc *sc = ch->devinfo->codec->sc;
3014         uint32_t ctl;
3015
3016         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL2);
3017         ctl &= ~HDAC_SDCTL2_STRM_MASK;
3018         ctl |= ch->sid << HDAC_SDCTL2_STRM_SHIFT;
3019         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL2, ctl);
3020 }
3021
3022 static void
3023 hdac_bdl_setup(struct hdac_chan *ch)
3024 {
3025         struct hdac_softc *sc = ch->devinfo->codec->sc;
3026         struct hdac_bdle *bdle;
3027         uint64_t addr;
3028         uint32_t blksz, blkcnt;
3029         int i;
3030
3031         addr = (uint64_t)sndbuf_getbufaddr(ch->b);
3032         bdle = (struct hdac_bdle *)ch->bdl_dma.dma_vaddr;
3033
3034         blksz = ch->blksz;
3035         blkcnt = ch->blkcnt;
3036
3037         for (i = 0; i < blkcnt; i++, bdle++) {
3038                 bdle->addrl = (uint32_t)addr;
3039                 bdle->addrh = (uint32_t)(addr >> 32);
3040                 bdle->len = blksz;
3041                 bdle->ioc = 1;
3042                 addr += blksz;
3043         }
3044
3045         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDCBL, blksz * blkcnt);
3046         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDLVI, blkcnt - 1);
3047         addr = ch->bdl_dma.dma_paddr;
3048         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPL, (uint32_t)addr);
3049         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPU, (uint32_t)(addr >> 32));
3050         if (ch->dmapos != NULL &&
3051             !(HDAC_READ_4(&sc->mem, HDAC_DPIBLBASE) & 0x00000001)) {
3052                 addr = sc->pos_dma.dma_paddr;
3053                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE,
3054                     ((uint32_t)addr & HDAC_DPLBASE_DPLBASE_MASK) | 0x00000001);
3055                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, (uint32_t)(addr >> 32));
3056         }
3057 }
3058
3059 static int
3060 hdac_bdl_alloc(struct hdac_chan *ch)
3061 {
3062         struct hdac_softc *sc = ch->devinfo->codec->sc;
3063         int rc;
3064
3065         rc = hdac_dma_alloc(sc, &ch->bdl_dma,
3066             sizeof(struct hdac_bdle) * HDA_BDL_MAX);
3067         if (rc) {
3068                 device_printf(sc->dev, "can't alloc bdl\n");
3069                 return (rc);
3070         }
3071
3072         return (0);
3073 }
3074
3075 static void
3076 hdac_audio_ctl_amp_set_internal(struct hdac_softc *sc, nid_t cad, nid_t nid,
3077                                         int index, int lmute, int rmute,
3078                                         int left, int right, int dir)
3079 {
3080         uint16_t v = 0;
3081
3082         if (sc == NULL)
3083                 return;
3084
3085         if (left != right || lmute != rmute) {
3086                 v = (1 << (15 - dir)) | (1 << 13) | (index << 8) |
3087                     (lmute << 7) | left;
3088                 hdac_command(sc,
3089                     HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
3090                 v = (1 << (15 - dir)) | (1 << 12) | (index << 8) |
3091                     (rmute << 7) | right;
3092         } else
3093                 v = (1 << (15 - dir)) | (3 << 12) | (index << 8) |
3094                     (lmute << 7) | left;
3095
3096         hdac_command(sc,
3097             HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
3098 }
3099
3100 static void
3101 hdac_audio_ctl_amp_set(struct hdac_audio_ctl *ctl, uint32_t mute,
3102                                                 int left, int right)
3103 {
3104         struct hdac_softc *sc;
3105         nid_t nid, cad;
3106         int lmute, rmute;
3107
3108         sc = ctl->widget->devinfo->codec->sc;
3109         cad = ctl->widget->devinfo->codec->cad;
3110         nid = ctl->widget->nid;
3111
3112         /* Save new values if valid. */
3113         if (mute != HDA_AMP_MUTE_DEFAULT)
3114                 ctl->muted = mute;
3115         if (left != HDA_AMP_VOL_DEFAULT)
3116                 ctl->left = left;
3117         if (right != HDA_AMP_VOL_DEFAULT)
3118                 ctl->right = right;
3119         /* Prepare effective values */
3120         if (ctl->forcemute) {
3121                 lmute = 1;
3122                 rmute = 1;
3123                 left = 0;
3124                 right = 0;
3125         } else {
3126                 lmute = HDA_AMP_LEFT_MUTED(ctl->muted);
3127                 rmute = HDA_AMP_RIGHT_MUTED(ctl->muted);
3128                 left = ctl->left;
3129                 right = ctl->right;
3130         }
3131         /* Apply effective values */
3132         if (ctl->dir & HDA_CTL_OUT)
3133                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
3134                     lmute, rmute, left, right, 0);
3135         if (ctl->dir & HDA_CTL_IN)
3136                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
3137                     lmute, rmute, left, right, 1);
3138 }
3139
3140 static void
3141 hdac_widget_connection_select(struct hdac_widget *w, uint8_t index)
3142 {
3143         if (w == NULL || w->nconns < 1 || index > (w->nconns - 1))
3144                 return;
3145         hdac_command(w->devinfo->codec->sc,
3146             HDA_CMD_SET_CONNECTION_SELECT_CONTROL(w->devinfo->codec->cad,
3147             w->nid, index), w->devinfo->codec->cad);
3148         w->selconn = index;
3149 }
3150
3151
3152 /****************************************************************************
3153  * uint32_t hdac_command_sendone_internal
3154  *
3155  * Wrapper function that sends only one command to a given codec
3156  ****************************************************************************/
3157 static uint32_t
3158 hdac_command_sendone_internal(struct hdac_softc *sc, uint32_t verb, nid_t cad)
3159 {
3160         struct hdac_command_list cl;
3161         uint32_t response = HDAC_INVALID;
3162
3163         if (!hdac_lockowned(sc))
3164                 device_printf(sc->dev, "WARNING!!!! mtx not owned!!!!\n");
3165         cl.num_commands = 1;
3166         cl.verbs = &verb;
3167         cl.responses = &response;
3168
3169         hdac_command_send_internal(sc, &cl, cad);
3170
3171         return (response);
3172 }
3173
3174 /****************************************************************************
3175  * hdac_command_send_internal
3176  *
3177  * Send a command list to the codec via the corb. We queue as much verbs as
3178  * we can and msleep on the codec. When the interrupt get the responses
3179  * back from the rirb, it will wake us up so we can queue the remaining verbs
3180  * if any.
3181  ****************************************************************************/
3182 static void
3183 hdac_command_send_internal(struct hdac_softc *sc,
3184                         struct hdac_command_list *commands, nid_t cad)
3185 {
3186         struct hdac_codec *codec;
3187         int corbrp;
3188         uint32_t *corb;
3189         int timeout;
3190         int retry = 10;
3191         struct hdac_rirb *rirb_base;
3192
3193         if (sc == NULL || sc->codecs[cad] == NULL || commands == NULL ||
3194             commands->num_commands < 1)
3195                 return;
3196
3197         codec = sc->codecs[cad];
3198         codec->commands = commands;
3199         codec->responses_received = 0;
3200         codec->verbs_sent = 0;
3201         corb = (uint32_t *)sc->corb_dma.dma_vaddr;
3202         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
3203
3204         do {
3205                 if (codec->verbs_sent != commands->num_commands) {
3206                         /* Queue as many verbs as possible */
3207                         corbrp = HDAC_READ_2(&sc->mem, HDAC_CORBRP);
3208 #if 0
3209                         bus_dmamap_sync(sc->corb_dma.dma_tag,
3210                             sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE);
3211 #endif
3212                         while (codec->verbs_sent != commands->num_commands &&
3213                             ((sc->corb_wp + 1) % sc->corb_size) != corbrp) {
3214                                 sc->corb_wp++;
3215                                 sc->corb_wp %= sc->corb_size;
3216                                 corb[sc->corb_wp] =
3217                                     commands->verbs[codec->verbs_sent++];
3218                         }
3219
3220                         /* Send the verbs to the codecs */
3221 #if 0
3222                         bus_dmamap_sync(sc->corb_dma.dma_tag,
3223                             sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE);
3224 #endif
3225                         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
3226                 }
3227
3228                 timeout = 1000;
3229                 while (hdac_rirb_flush(sc) == 0 && --timeout)
3230                         DELAY(10);
3231         } while ((codec->verbs_sent != commands->num_commands ||
3232             codec->responses_received != commands->num_commands) && --retry);
3233
3234         if (retry == 0)
3235                 device_printf(sc->dev,
3236                     "%s: TIMEOUT numcmd=%d, sent=%d, received=%d\n",
3237                     __func__, commands->num_commands, codec->verbs_sent,
3238                     codec->responses_received);
3239
3240         codec->commands = NULL;
3241         codec->responses_received = 0;
3242         codec->verbs_sent = 0;
3243
3244         hdac_unsolq_flush(sc);
3245 }
3246
3247
3248 /****************************************************************************
3249  * Device Methods
3250  ****************************************************************************/
3251
3252 /****************************************************************************
3253  * int hdac_probe(device_t)
3254  *
3255  * Probe for the presence of an hdac. If none is found, check for a generic
3256  * match using the subclass of the device.
3257  ****************************************************************************/
3258 static int
3259 hdac_probe(device_t dev)
3260 {
3261         int i, result;
3262         uint32_t model;
3263         uint16_t class, subclass;
3264         char desc[64];
3265
3266         model = (uint32_t)pci_get_device(dev) << 16;
3267         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
3268         class = pci_get_class(dev);
3269         subclass = pci_get_subclass(dev);
3270
3271         bzero(desc, sizeof(desc));
3272         result = ENXIO;
3273         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
3274                 if (hdac_devices[i].model == model) {
3275                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3276                         result = BUS_PROBE_DEFAULT;
3277                         break;
3278                 }
3279                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
3280                     class == PCIC_MULTIMEDIA &&
3281                     subclass == PCIS_MULTIMEDIA_HDA) {
3282                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3283                         result = BUS_PROBE_GENERIC;
3284                         break;
3285                 }
3286         }
3287         if (result == ENXIO && class == PCIC_MULTIMEDIA &&
3288             subclass == PCIS_MULTIMEDIA_HDA) {
3289                 strlcpy(desc, "Generic", sizeof(desc));
3290                 result = BUS_PROBE_GENERIC;
3291         }
3292         if (result != ENXIO) {
3293                 strlcat(desc, " High Definition Audio Controller",
3294                     sizeof(desc));
3295                 device_set_desc_copy(dev, desc);
3296         }
3297
3298         return (result);
3299 }
3300
3301 static void *
3302 hdac_channel_init(kobj_t obj, void *data, struct snd_dbuf *b,
3303                                         struct pcm_channel *c, int dir)
3304 {
3305         struct hdac_pcm_devinfo *pdevinfo = data;
3306         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3307         struct hdac_softc *sc = devinfo->codec->sc;
3308         struct hdac_chan *ch;
3309         int i, ord = 0, chid;
3310
3311         hdac_lock(sc);
3312
3313         chid = (dir == PCMDIR_PLAY)?pdevinfo->play:pdevinfo->rec;
3314         ch = &sc->chans[chid];
3315         for (i = 0; i < sc->num_chans && i < chid; i++) {
3316                 if (ch->dir == sc->chans[i].dir)
3317                         ord++;
3318         }
3319         if (dir == PCMDIR_PLAY) {
3320                 ch->off = (sc->num_iss + ord) << 5;
3321         } else {
3322                 ch->off = ord << 5;
3323         }
3324
3325         if (devinfo->function.audio.quirks & HDA_QUIRK_FIXEDRATE) {
3326                 ch->caps.minspeed = ch->caps.maxspeed = 48000;
3327                 ch->pcmrates[0] = 48000;
3328                 ch->pcmrates[1] = 0;
3329         }
3330         if (sc->pos_dma.dma_vaddr != NULL)
3331                 ch->dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr +
3332                     (sc->streamcnt * 8));
3333         else
3334                 ch->dmapos = NULL;
3335         ch->sid = ++sc->streamcnt;
3336         ch->dir = dir;
3337         ch->b = b;
3338         ch->c = c;
3339         ch->blksz = pdevinfo->chan_size / pdevinfo->chan_blkcnt;
3340         ch->blkcnt = pdevinfo->chan_blkcnt;
3341         hdac_unlock(sc);
3342
3343         if (hdac_bdl_alloc(ch) != 0) {
3344                 ch->blkcnt = 0;
3345                 return (NULL);
3346         }
3347
3348         if (sndbuf_alloc(ch->b, sc->chan_dmat,
3349             (sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0,
3350             pdevinfo->chan_size) != 0)
3351                 return (NULL);
3352
3353         return (ch);
3354 }
3355
3356 static int
3357 hdac_channel_setformat(kobj_t obj, void *data, uint32_t format)
3358 {
3359         struct hdac_chan *ch = data;
3360         int i;
3361
3362         for (i = 0; ch->caps.fmtlist[i] != 0; i++) {
3363                 if (format == ch->caps.fmtlist[i]) {
3364                         ch->fmt = format;
3365                         return (0);
3366                 }
3367         }
3368
3369         return (EINVAL);
3370 }
3371
3372 static int
3373 hdac_channel_setspeed(kobj_t obj, void *data, uint32_t speed)
3374 {
3375         struct hdac_chan *ch = data;
3376         uint32_t spd = 0, threshold;
3377         int i;
3378
3379         for (i = 0; ch->pcmrates[i] != 0; i++) {
3380                 spd = ch->pcmrates[i];
3381                 threshold = spd + ((ch->pcmrates[i + 1] != 0) ?
3382                     ((ch->pcmrates[i + 1] - spd) >> 1) : 0);
3383                 if (speed < threshold)
3384                         break;
3385         }
3386
3387         if (spd == 0)   /* impossible */
3388                 ch->spd = 48000;
3389         else
3390                 ch->spd = spd;
3391
3392         return (ch->spd);
3393 }
3394
3395 static void
3396 hdac_stream_setup(struct hdac_chan *ch)
3397 {
3398         struct hdac_softc *sc = ch->devinfo->codec->sc;
3399         struct hdac_audio_as *as = &ch->devinfo->function.audio.as[ch->as];
3400         struct hdac_widget *w;
3401         int i, chn, totalchn, c;
3402         nid_t cad = ch->devinfo->codec->cad;
3403         uint16_t fmt, dfmt;
3404
3405         HDA_BOOTHVERBOSE(
3406                 device_printf(ch->pdevinfo->dev,
3407                     "PCMDIR_%s: Stream setup fmt=%08x speed=%d\n",
3408                     (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3409                     ch->fmt, ch->spd);
3410         );
3411         fmt = 0;
3412         if (ch->fmt & AFMT_S16_LE)
3413                 fmt |= ch->bit16 << 4;
3414         else if (ch->fmt & AFMT_S32_LE)
3415                 fmt |= ch->bit32 << 4;
3416         else
3417                 fmt |= 1 << 4;
3418
3419         for (i = 0; i < HDA_RATE_TAB_LEN; i++) {
3420                 if (hda_rate_tab[i].valid && ch->spd == hda_rate_tab[i].rate) {
3421                         fmt |= hda_rate_tab[i].base;
3422                         fmt |= hda_rate_tab[i].mul;
3423                         fmt |= hda_rate_tab[i].div;
3424                         break;
3425                 }
3426         }
3427
3428         if (ch->fmt & (AFMT_STEREO | AFMT_AC3)) {
3429                 fmt |= 1;
3430                 totalchn = 2;
3431         } else
3432                 totalchn = 1;
3433
3434         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDFMT, fmt);
3435
3436         dfmt = HDA_CMD_SET_DIGITAL_CONV_FMT1_DIGEN;
3437         if (ch->fmt & AFMT_AC3)
3438                 dfmt |= HDA_CMD_SET_DIGITAL_CONV_FMT1_NAUDIO;
3439
3440         chn = 0;
3441         for (i = 0; ch->io[i] != -1; i++) {
3442                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3443                 if (w == NULL)
3444                         continue;
3445
3446                 if (as->hpredir >= 0 && i == as->pincnt)
3447                         chn = 0;
3448                 HDA_BOOTHVERBOSE(
3449                         device_printf(ch->pdevinfo->dev,
3450                             "PCMDIR_%s: Stream setup nid=%d: "
3451                             "fmt=0x%04x, dfmt=0x%04x\n",
3452                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3453                             ch->io[i], fmt, dfmt);
3454                 );
3455                 hdac_command(sc,
3456                     HDA_CMD_SET_CONV_FMT(cad, ch->io[i], fmt), cad);
3457                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
3458                         hdac_command(sc,
3459                             HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, ch->io[i], dfmt),
3460                             cad);
3461                 }
3462                 /* If HP redirection is enabled, but failed to use same
3463                    DAC make last DAC one to duplicate first one. */
3464                 if (as->hpredir >= 0 && i == as->pincnt) {
3465                         c = (ch->sid << 4);
3466                 } else if (chn >= totalchn) {
3467                         /* This is until OSS will support multichannel.
3468                            Should be: c = 0; to disable unused DAC */
3469                         c = (ch->sid << 4);
3470                 }else {
3471                         c = (ch->sid << 4) | chn;
3472                 }
3473                 hdac_command(sc,
3474                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i], c), cad);
3475                 chn +=
3476                     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap) ?
3477                     2 : 1;
3478         }
3479 }
3480
3481 static int
3482 hdac_channel_setfragments(kobj_t obj, void *data,
3483                                         uint32_t blksz, uint32_t blkcnt)
3484 {
3485         struct hdac_chan *ch = data;
3486         struct hdac_softc *sc = ch->devinfo->codec->sc;
3487
3488         blksz &= HDA_BLK_ALIGN;
3489
3490         if (blksz > (sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN))
3491                 blksz = sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN;
3492         if (blksz < HDA_BLK_MIN)
3493                 blksz = HDA_BLK_MIN;
3494         if (blkcnt > HDA_BDL_MAX)
3495                 blkcnt = HDA_BDL_MAX;
3496         if (blkcnt < HDA_BDL_MIN)
3497                 blkcnt = HDA_BDL_MIN;
3498
3499         while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->b)) {
3500                 if ((blkcnt >> 1) >= HDA_BDL_MIN)
3501                         blkcnt >>= 1;
3502                 else if ((blksz >> 1) >= HDA_BLK_MIN)
3503                         blksz >>= 1;
3504                 else
3505                         break;
3506         }
3507
3508         if ((sndbuf_getblksz(ch->b) != blksz ||
3509             sndbuf_getblkcnt(ch->b) != blkcnt) &&
3510             sndbuf_resize(ch->b, blkcnt, blksz) != 0)
3511                 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
3512                     __func__, blksz, blkcnt);
3513
3514         ch->blksz = sndbuf_getblksz(ch->b);
3515         ch->blkcnt = sndbuf_getblkcnt(ch->b);
3516
3517         return (1);
3518 }
3519
3520 static int
3521 hdac_channel_setblocksize(kobj_t obj, void *data, uint32_t blksz)
3522 {
3523         struct hdac_chan *ch = data;
3524
3525         hdac_channel_setfragments(obj, data, blksz, ch->pdevinfo->chan_blkcnt);
3526
3527         return (ch->blksz);
3528 }
3529
3530 static void
3531 hdac_channel_stop(struct hdac_softc *sc, struct hdac_chan *ch)
3532 {
3533         struct hdac_devinfo *devinfo = ch->devinfo;
3534         struct hdac_widget *w;
3535         nid_t cad = devinfo->codec->cad;
3536         int i;
3537
3538         hdac_stream_stop(ch);
3539
3540         for (i = 0; ch->io[i] != -1; i++) {
3541                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3542                 if (w == NULL)
3543                         continue;
3544                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
3545                         hdac_command(sc,
3546                             HDA_CMD_SET_DIGITAL_CONV_FMT1(cad, ch->io[i], 0),
3547                             cad);
3548                 }
3549                 hdac_command(sc,
3550                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3551                     0), cad);
3552         }
3553 }
3554
3555 static void
3556 hdac_channel_start(struct hdac_softc *sc, struct hdac_chan *ch)
3557 {
3558         ch->ptr = 0;
3559         ch->prevptr = 0;
3560         hdac_stream_stop(ch);
3561         hdac_stream_reset(ch);
3562         hdac_bdl_setup(ch);
3563         hdac_stream_setid(ch);
3564         hdac_stream_setup(ch);
3565         hdac_stream_start(ch);
3566 }
3567
3568 static int
3569 hdac_channel_trigger(kobj_t obj, void *data, int go)
3570 {
3571         struct hdac_chan *ch = data;
3572         struct hdac_softc *sc = ch->devinfo->codec->sc;
3573
3574         if (!PCMTRIG_COMMON(go))
3575                 return (0);
3576
3577         hdac_lock(sc);
3578         switch (go) {
3579         case PCMTRIG_START:
3580                 hdac_channel_start(sc, ch);
3581                 break;
3582         case PCMTRIG_STOP:
3583         case PCMTRIG_ABORT:
3584                 hdac_channel_stop(sc, ch);
3585                 break;
3586         default:
3587                 break;
3588         }
3589         hdac_unlock(sc);
3590
3591         return (0);
3592 }
3593
3594 static int
3595 hdac_channel_getptr(kobj_t obj, void *data)
3596 {
3597         struct hdac_chan *ch = data;
3598         struct hdac_softc *sc = ch->devinfo->codec->sc;
3599         uint32_t ptr;
3600
3601         hdac_lock(sc);
3602         if (sc->polling != 0)
3603                 ptr = ch->ptr;
3604         else if (ch->dmapos != NULL)
3605                 ptr = *(ch->dmapos);
3606         else
3607                 ptr = HDAC_READ_4(&sc->mem, ch->off + HDAC_SDLPIB);
3608         hdac_unlock(sc);
3609
3610         /*
3611          * Round to available space and force 128 bytes aligment.
3612          */
3613         ptr %= ch->blksz * ch->blkcnt;
3614         ptr &= HDA_BLK_ALIGN;
3615
3616         return (ptr);
3617 }
3618
3619 static struct pcmchan_caps *
3620 hdac_channel_getcaps(kobj_t obj, void *data)
3621 {
3622         return (&((struct hdac_chan *)data)->caps);
3623 }
3624
3625 static kobj_method_t hdac_channel_methods[] = {
3626         KOBJMETHOD(channel_init,                hdac_channel_init),
3627         KOBJMETHOD(channel_setformat,           hdac_channel_setformat),
3628         KOBJMETHOD(channel_setspeed,            hdac_channel_setspeed),
3629         KOBJMETHOD(channel_setblocksize,        hdac_channel_setblocksize),
3630         KOBJMETHOD(channel_setfragments,        hdac_channel_setfragments),
3631         KOBJMETHOD(channel_trigger,             hdac_channel_trigger),
3632         KOBJMETHOD(channel_getptr,              hdac_channel_getptr),
3633         KOBJMETHOD(channel_getcaps,             hdac_channel_getcaps),
3634         { 0, 0 }
3635 };
3636 CHANNEL_DECLARE(hdac_channel);
3637
3638 static int
3639 hdac_audio_ctl_ossmixer_init(struct snd_mixer *m)
3640 {
3641         struct hdac_pcm_devinfo *pdevinfo = mix_getdevinfo(m);
3642         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3643         struct hdac_softc *sc = devinfo->codec->sc;
3644         struct hdac_widget *w, *cw;
3645         struct hdac_audio_ctl *ctl;
3646         uint32_t mask, recmask, id;
3647         int i, j, softpcmvol;
3648
3649         hdac_lock(sc);
3650
3651         /* Make sure that in case of soft volume it won't stay muted. */
3652         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
3653                 pdevinfo->left[i] = 100;
3654                 pdevinfo->right[i] = 100;
3655         }
3656
3657         mask = 0;
3658         recmask = 0;
3659         id = hdac_codec_id(devinfo->codec);
3660
3661         /* Declate EAPD as ogain control. */
3662         if (pdevinfo->play >= 0) {
3663                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3664                         w = hdac_widget_get(devinfo, i);
3665                         if (w == NULL || w->enable == 0)
3666                                 continue;
3667                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3668                             w->param.eapdbtl == HDAC_INVALID ||
3669                             w->bindas != sc->chans[pdevinfo->play].as)
3670                                 continue;
3671                         mask |= SOUND_MASK_OGAIN;
3672                         break;
3673                 }
3674         }
3675
3676         /* Declare volume controls assigned to this association. */
3677         i = 0;
3678         ctl = NULL;
3679         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3680                 if (ctl->enable == 0)
3681                         continue;
3682                 if ((pdevinfo->play >= 0 &&
3683                     ctl->widget->bindas == sc->chans[pdevinfo->play].as) ||
3684                     (pdevinfo->rec >= 0 &&
3685                     ctl->widget->bindas == sc->chans[pdevinfo->rec].as) ||
3686                     (ctl->widget->bindas == -2 && pdevinfo->index == 0))
3687                         mask |= ctl->ossmask;
3688         }
3689
3690         /* Declare record sources available to this association. */
3691         if (pdevinfo->rec >= 0) {
3692                 struct hdac_chan *ch = &sc->chans[pdevinfo->rec];
3693                 for (i = 0; ch->io[i] != -1; i++) {
3694                         w = hdac_widget_get(devinfo, ch->io[i]);
3695                         if (w == NULL || w->enable == 0)
3696                                 continue;
3697                         for (j = 0; j < w->nconns; j++) {
3698                                 if (w->connsenable[j] == 0)
3699                                         continue;
3700                                 cw = hdac_widget_get(devinfo, w->conns[j]);
3701                                 if (cw == NULL || cw->enable == 0)
3702                                         continue;
3703                                 if (cw->bindas != sc->chans[pdevinfo->rec].as &&
3704                                     cw->bindas != -2)
3705                                         continue;
3706                                 recmask |= cw->ossmask;
3707                         }
3708                 }
3709         }
3710
3711         /* Declare soft PCM volume if needed. */
3712         if (pdevinfo->play >= 0 && !pdevinfo->digital) {
3713                 ctl = NULL;
3714                 if ((mask & SOUND_MASK_PCM) == 0 ||
3715                     (devinfo->function.audio.quirks & HDA_QUIRK_SOFTPCMVOL)) {
3716                         softpcmvol = 1;
3717                         mask |= SOUND_MASK_PCM;
3718                 } else {
3719                         softpcmvol = 0;
3720                         i = 0;
3721                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3722                                 if (ctl->enable == 0)
3723                                         continue;
3724                                 if (ctl->widget->bindas != sc->chans[pdevinfo->play].as &&
3725                                     (ctl->widget->bindas != -2 || pdevinfo->index != 0))
3726                                         continue;
3727                                 if (!(ctl->ossmask & SOUND_MASK_PCM))
3728                                         continue;
3729                                 if (ctl->step > 0)
3730                                         break;
3731                         }
3732                 }
3733
3734                 if (softpcmvol == 1 || ctl == NULL) {
3735                         pcm_setflags(pdevinfo->dev, pcm_getflags(pdevinfo->dev) | SD_F_SOFTPCMVOL);
3736                         HDA_BOOTVERBOSE(
3737                                 device_printf(pdevinfo->dev,
3738                                     "%s Soft PCM volume\n",
3739                                     (softpcmvol == 1) ? "Forcing" : "Enabling");
3740                         );
3741                 }
3742         }
3743
3744         /* Declare master volume if needed. */
3745         if (pdevinfo->play >= 0) {
3746                 if ((mask & (SOUND_MASK_VOLUME | SOUND_MASK_PCM)) ==
3747                     SOUND_MASK_PCM) {
3748                         mask |= SOUND_MASK_VOLUME;
3749                         mix_setparentchild(m, SOUND_MIXER_VOLUME,
3750                             SOUND_MASK_PCM);
3751                         mix_setrealdev(m, SOUND_MIXER_VOLUME,
3752                             SOUND_MIXER_NONE);
3753                         HDA_BOOTVERBOSE(
3754                                 device_printf(pdevinfo->dev,
3755                                     "Forcing master volume with PCM\n");
3756                         );
3757                 }
3758         }
3759
3760         recmask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3761         mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3762
3763         mix_setrecdevs(m, recmask);
3764         mix_setdevs(m, mask);
3765
3766         hdac_unlock(sc);
3767
3768         return (0);
3769 }
3770
3771 static int
3772 hdac_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev,
3773                                         unsigned left, unsigned right)
3774 {
3775         struct hdac_pcm_devinfo *pdevinfo = mix_getdevinfo(m);
3776         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3777         struct hdac_softc *sc = devinfo->codec->sc;
3778         struct hdac_widget *w;
3779         struct hdac_audio_ctl *ctl;
3780         uint32_t mute;
3781         int lvol, rvol;
3782         int i, j;
3783
3784         hdac_lock(sc);
3785         /* Save new values. */
3786         pdevinfo->left[dev] = left;
3787         pdevinfo->right[dev] = right;
3788
3789         /* 'ogain' is the special case implemented with EAPD. */
3790         if (dev == SOUND_MIXER_OGAIN) {
3791                 uint32_t orig;
3792                 w = NULL;
3793                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3794                         w = hdac_widget_get(devinfo, i);
3795                         if (w == NULL || w->enable == 0)
3796                                 continue;
3797                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3798                             w->param.eapdbtl == HDAC_INVALID)
3799                                 continue;
3800                         break;
3801                 }
3802                 if (i >= devinfo->endnode) {
3803                         hdac_unlock(sc);
3804                         return (-1);
3805                 }
3806                 orig = w->param.eapdbtl;
3807                 if (left == 0)
3808                         w->param.eapdbtl &= ~HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3809                 else
3810                         w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3811                 if (orig != w->param.eapdbtl) {
3812                         uint32_t val;
3813
3814                         val = w->param.eapdbtl;
3815                         if (devinfo->function.audio.quirks & HDA_QUIRK_EAPDINV)
3816                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3817                         hdac_command(sc,
3818                             HDA_CMD_SET_EAPD_BTL_ENABLE(devinfo->codec->cad,
3819                             w->nid, val), devinfo->codec->cad);
3820                 }
3821                 hdac_unlock(sc);
3822                 return (left | (left << 8));
3823         }
3824
3825         /* Recalculate all controls related to this OSS device. */
3826         i = 0;
3827         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3828                 if (ctl->enable == 0 ||
3829                     !(ctl->ossmask & (1 << dev)))
3830                         continue;
3831                 if (!((pdevinfo->play >= 0 &&
3832                     ctl->widget->bindas == sc->chans[pdevinfo->play].as) ||
3833                     (pdevinfo->rec >= 0 &&
3834                     ctl->widget->bindas == sc->chans[pdevinfo->rec].as) ||
3835                     ctl->widget->bindas == -2))
3836                         continue;
3837
3838                 lvol = 100;
3839                 rvol = 100;
3840                 for (j = 0; j < SOUND_MIXER_NRDEVICES; j++) {
3841                         if (ctl->ossmask & (1 << j)) {
3842                                 lvol = lvol * pdevinfo->left[j] / 100;
3843                                 rvol = rvol * pdevinfo->right[j] / 100;
3844                         }
3845                 }
3846                 mute = (left == 0) ? HDA_AMP_MUTE_LEFT : 0;
3847                 mute |= (right == 0) ? HDA_AMP_MUTE_RIGHT : 0;
3848                 lvol = (lvol * ctl->step + 50) / 100;
3849                 rvol = (rvol * ctl->step + 50) / 100;
3850                 hdac_audio_ctl_amp_set(ctl, mute, lvol, rvol);
3851         }
3852         hdac_unlock(sc);
3853
3854         return (left | (right << 8));
3855 }
3856
3857 /*
3858  * Commutate specified record source.
3859  */
3860 static uint32_t
3861 hdac_audio_ctl_recsel_comm(struct hdac_pcm_devinfo *pdevinfo, uint32_t src, nid_t nid, int depth)
3862 {
3863         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3864         struct hdac_widget *w, *cw;
3865         struct hdac_audio_ctl *ctl;
3866         char buf[64];
3867         int i, muted;
3868         uint32_t res = 0;
3869
3870         if (depth > HDA_PARSE_MAXDEPTH)
3871                 return (0);
3872
3873         w = hdac_widget_get(devinfo, nid);
3874         if (w == NULL || w->enable == 0)
3875                 return (0);
3876
3877         for (i = 0; i < w->nconns; i++) {
3878                 if (w->connsenable[i] == 0)
3879                         continue;
3880                 cw = hdac_widget_get(devinfo, w->conns[i]);
3881                 if (cw == NULL || cw->enable == 0 || cw->bindas == -1)
3882                         continue;
3883                 /* Call recursively to trace signal to it's source if needed. */
3884                 if ((src & cw->ossmask) != 0) {
3885                         if (cw->ossdev < 0) {
3886                                 res |= hdac_audio_ctl_recsel_comm(pdevinfo, src,
3887                                     w->conns[i], depth + 1);
3888                         } else {
3889                                 res |= cw->ossmask;
3890                         }
3891                 }
3892                 /* We have two special cases: mixers and others (selectors). */
3893                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) {
3894                         ctl = hdac_audio_ctl_amp_get(devinfo,
3895                             w->nid, HDA_CTL_IN, i, 1);
3896                         if (ctl == NULL)
3897                                 continue;
3898                         /* If we have input control on this node mute them
3899                          * according to requested sources. */
3900                         muted = (src & cw->ossmask) ? 0 : 1;
3901                         if (muted != ctl->forcemute) {
3902                                 ctl->forcemute = muted;
3903                                 hdac_audio_ctl_amp_set(ctl,
3904                                     HDA_AMP_MUTE_DEFAULT,
3905                                     HDA_AMP_VOL_DEFAULT, HDA_AMP_VOL_DEFAULT);
3906                         }
3907                         HDA_BOOTHVERBOSE(
3908                                 device_printf(pdevinfo->dev,
3909                                     "Recsel (%s): nid %d source %d %s\n",
3910                                     hdac_audio_ctl_ossmixer_mask2allname(
3911                                     src, buf, sizeof(buf)),
3912                                     nid, i, muted?"mute":"unmute");
3913                         );
3914                 } else {
3915                         if (w->nconns == 1)
3916                                 break;
3917                         if ((src & cw->ossmask) == 0)
3918                                 continue;
3919                         /* If we found requested source - select it and exit. */
3920                         hdac_widget_connection_select(w, i);
3921                         HDA_BOOTHVERBOSE(
3922                                 device_printf(pdevinfo->dev,
3923                                     "Recsel (%s): nid %d source %d select\n",
3924                                     hdac_audio_ctl_ossmixer_mask2allname(
3925                                     src, buf, sizeof(buf)),
3926                                     nid, i);
3927                         );
3928                         break;
3929                 }
3930         }
3931         return (res);
3932 }
3933
3934 static uint32_t
3935 hdac_audio_ctl_ossmixer_setrecsrc(struct snd_mixer *m, uint32_t src)
3936 {
3937         struct hdac_pcm_devinfo *pdevinfo = mix_getdevinfo(m);
3938         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
3939         struct hdac_widget *w;
3940         struct hdac_softc *sc = devinfo->codec->sc;
3941         struct hdac_chan *ch;
3942         int i;
3943         uint32_t ret = 0xffffffff;
3944
3945         hdac_lock(sc);
3946
3947         /* Commutate requested recsrc for each ADC. */
3948         ch = &sc->chans[pdevinfo->rec];
3949         for (i = 0; ch->io[i] != -1; i++) {
3950                 w = hdac_widget_get(devinfo, ch->io[i]);
3951                 if (w == NULL || w->enable == 0)
3952                         continue;
3953                 ret &= hdac_audio_ctl_recsel_comm(pdevinfo, src, ch->io[i], 0);
3954         }
3955
3956         hdac_unlock(sc);
3957
3958         return ((ret == 0xffffffff)? 0 : ret);
3959 }
3960
3961 static kobj_method_t hdac_audio_ctl_ossmixer_methods[] = {
3962         KOBJMETHOD(mixer_init,          hdac_audio_ctl_ossmixer_init),
3963         KOBJMETHOD(mixer_set,           hdac_audio_ctl_ossmixer_set),
3964         KOBJMETHOD(mixer_setrecsrc,     hdac_audio_ctl_ossmixer_setrecsrc),
3965         { 0, 0 }
3966 };
3967 MIXER_DECLARE(hdac_audio_ctl_ossmixer);
3968
3969 static void
3970 hdac_unsolq_task(void *context, int pending)
3971 {
3972         struct hdac_softc *sc;
3973
3974         sc = (struct hdac_softc *)context;
3975
3976         hdac_lock(sc);
3977         hdac_unsolq_flush(sc);
3978         hdac_unlock(sc);
3979 }
3980
3981 /****************************************************************************
3982  * int hdac_attach(device_t)
3983  *
3984  * Attach the device into the kernel. Interrupts usually won't be enabled
3985  * when this function is called. Setup everything that doesn't require
3986  * interrupts and defer probing of codecs until interrupts are enabled.
3987  ****************************************************************************/
3988 static int
3989 hdac_attach(device_t dev)
3990 {
3991         struct hdac_softc *sc;
3992         int result;
3993         int i;
3994         uint16_t vendor;
3995         uint8_t v;
3996
3997         device_printf(dev, "HDA Driver Revision: %s\n", HDA_DRV_TEST_REV);
3998
3999         sc = device_get_softc(dev);
4000         sc->lock = snd_mtxcreate(device_get_nameunit(dev), HDAC_MTX_NAME);
4001         sc->dev = dev;
4002         sc->pci_subvendor = (uint32_t)pci_get_subdevice(sc->dev) << 16;
4003         sc->pci_subvendor |= (uint32_t)pci_get_subvendor(sc->dev) & 0x0000ffff;
4004         vendor = pci_get_vendor(dev);
4005
4006         if (sc->pci_subvendor == HP_NX6325_SUBVENDORX) {
4007                 /* Screw nx6325 - subdevice/subvendor swapped */
4008                 sc->pci_subvendor = HP_NX6325_SUBVENDOR;
4009         }
4010
4011         callout_init(&sc->poll_hda, CALLOUT_MPSAFE);
4012         callout_init(&sc->poll_hdac, CALLOUT_MPSAFE);
4013         callout_init(&sc->poll_jack, CALLOUT_MPSAFE);
4014
4015         TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc);
4016
4017         sc->poll_ticks = 1000000;
4018         sc->poll_ival = HDAC_POLL_INTERVAL;
4019         if (resource_int_value(device_get_name(dev),
4020             device_get_unit(dev), "polling", &i) == 0 && i != 0)
4021                 sc->polling = 1;
4022         else
4023                 sc->polling = 0;
4024
4025         result = bus_dma_tag_create(NULL,       /* parent */
4026             HDAC_DMA_ALIGNMENT,                 /* alignment */
4027             0,                                  /* boundary */
4028             BUS_SPACE_MAXADDR_32BIT,            /* lowaddr */
4029             BUS_SPACE_MAXADDR,                  /* highaddr */
4030             NULL,                               /* filtfunc */
4031             NULL,                               /* fistfuncarg */
4032             HDA_BUFSZ_MAX,                      /* maxsize */
4033             1,                                  /* nsegments */
4034             HDA_BUFSZ_MAX,                      /* maxsegsz */
4035             0,                                  /* flags */
4036             NULL,                               /* lockfunc */
4037             NULL,                               /* lockfuncarg */
4038             &sc->chan_dmat);                    /* dmat */
4039         if (result != 0) {
4040                 device_printf(dev, "%s: bus_dma_tag_create failed (%x)\n",
4041                      __func__, result);
4042                 snd_mtxfree(sc->lock);
4043                 free(sc, M_DEVBUF);
4044                 return (ENXIO);
4045         }
4046
4047
4048         sc->hdabus = NULL;
4049         for (i = 0; i < HDAC_CODEC_MAX; i++)
4050                 sc->codecs[i] = NULL;
4051
4052         pci_enable_busmaster(dev);
4053
4054         if (vendor == INTEL_VENDORID) {
4055                 /* TCSEL -> TC0 */
4056                 v = pci_read_config(dev, 0x44, 1);
4057                 pci_write_config(dev, 0x44, v & 0xf8, 1);
4058                 HDA_BOOTHVERBOSE(
4059                         device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v,
4060                             pci_read_config(dev, 0x44, 1));
4061                 );
4062         }
4063
4064 #ifdef HDAC_MSI_ENABLED
4065         if (resource_int_value(device_get_name(dev),
4066             device_get_unit(dev), "msi", &i) == 0 && i != 0 &&
4067             pci_msi_count(dev) == 1)
4068                 sc->flags |= HDAC_F_MSI;
4069         else
4070 #endif
4071                 sc->flags &= ~HDAC_F_MSI;
4072
4073 #if defined(__i386__) || defined(__amd64__)
4074         sc->flags |= HDAC_F_DMA_NOCACHE;
4075
4076         if (resource_int_value(device_get_name(dev),
4077             device_get_unit(dev), "snoop", &i) == 0 && i != 0) {
4078 #else
4079         sc->flags &= ~HDAC_F_DMA_NOCACHE;
4080 #endif
4081                 /*
4082                  * Try to enable PCIe snoop to avoid messing around with
4083                  * uncacheable DMA attribute. Since PCIe snoop register
4084                  * config is pretty much vendor specific, there are no
4085                  * general solutions on how to enable it, forcing us (even
4086                  * Microsoft) to enable uncacheable or write combined DMA
4087                  * by default.
4088                  *
4089                  * http://msdn2.microsoft.com/en-us/library/ms790324.aspx
4090                  */
4091                 for (i = 0; i < HDAC_PCIESNOOP_LEN; i++) {
4092                         if (hdac_pcie_snoop[i].vendor != vendor)
4093                                 continue;
4094                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
4095                         if (hdac_pcie_snoop[i].reg == 0x00)
4096                                 break;
4097                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
4098                         if ((v & hdac_pcie_snoop[i].enable) ==
4099                             hdac_pcie_snoop[i].enable)
4100                                 break;
4101                         v &= hdac_pcie_snoop[i].mask;
4102                         v |= hdac_pcie_snoop[i].enable;
4103                         pci_write_config(dev, hdac_pcie_snoop[i].reg, v, 1);
4104                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
4105                         if ((v & hdac_pcie_snoop[i].enable) !=
4106                             hdac_pcie_snoop[i].enable) {
4107                                 HDA_BOOTVERBOSE(
4108                                         device_printf(dev,
4109                                             "WARNING: Failed to enable PCIe "
4110                                             "snoop!\n");
4111                                 );
4112 #if defined(__i386__) || defined(__amd64__)
4113                                 sc->flags |= HDAC_F_DMA_NOCACHE;
4114 #endif
4115                         }
4116                         break;
4117                 }
4118 #if defined(__i386__) || defined(__amd64__)
4119         }
4120 #endif
4121
4122         HDA_BOOTHVERBOSE(
4123                 device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n",
4124                     (sc->flags & HDAC_F_DMA_NOCACHE) ?
4125                     "Uncacheable" : "PCIe snoop", vendor);
4126         );
4127
4128         /* Allocate resources */
4129         result = hdac_mem_alloc(sc);
4130         if (result != 0)
4131                 goto hdac_attach_fail;
4132         result = hdac_irq_alloc(sc);
4133         if (result != 0)
4134                 goto hdac_attach_fail;
4135
4136         /* Get Capabilities */
4137         result = hdac_get_capabilities(sc);
4138         if (result != 0)
4139                 goto hdac_attach_fail;
4140
4141         /* Allocate CORB and RIRB dma memory */
4142         result = hdac_dma_alloc(sc, &sc->corb_dma,
4143             sc->corb_size * sizeof(uint32_t));
4144         if (result != 0)
4145                 goto hdac_attach_fail;
4146         result = hdac_dma_alloc(sc, &sc->rirb_dma,
4147             sc->rirb_size * sizeof(struct hdac_rirb));
4148         if (result != 0)
4149                 goto hdac_attach_fail;
4150
4151         /* Quiesce everything */
4152         HDA_BOOTHVERBOSE(
4153                 device_printf(dev, "Reset controller...\n");
4154         );
4155         hdac_reset(sc, 1);
4156
4157         /* Initialize the CORB and RIRB */
4158         hdac_corb_init(sc);
4159         hdac_rirb_init(sc);
4160
4161         /* Defer remaining of initialization until interrupts are enabled */
4162         sc->intrhook.ich_func = hdac_attach2;
4163         sc->intrhook.ich_arg = (void *)sc;
4164         if (cold == 0 || config_intrhook_establish(&sc->intrhook) != 0) {
4165                 sc->intrhook.ich_func = NULL;
4166                 hdac_attach2((void *)sc);
4167         }
4168
4169         return (0);
4170
4171 hdac_attach_fail:
4172         hdac_irq_free(sc);
4173         hdac_dma_free(sc, &sc->rirb_dma);
4174         hdac_dma_free(sc, &sc->corb_dma);
4175         hdac_mem_free(sc);
4176         snd_mtxfree(sc->lock);
4177         free(sc, M_DEVBUF);
4178
4179         return (ENXIO);
4180 }
4181
4182 static void
4183 hdac_audio_parse(struct hdac_devinfo *devinfo)
4184 {
4185         struct hdac_codec *codec = devinfo->codec;
4186         struct hdac_softc *sc = codec->sc;
4187         struct hdac_widget *w;
4188         uint32_t res;
4189         int i;
4190         nid_t cad, nid;
4191
4192         cad = devinfo->codec->cad;
4193         nid = devinfo->nid;
4194
4195         res = hdac_command(sc,
4196             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_GPIO_COUNT), cad);
4197         devinfo->function.audio.gpio = res;
4198
4199         HDA_BOOTVERBOSE(
4200                 device_printf(sc->dev, "GPIO: 0x%08x "
4201                     "NumGPIO=%d NumGPO=%d "
4202                     "NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
4203                     devinfo->function.audio.gpio,
4204                     HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
4205                     HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
4206                     HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
4207                     HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
4208                     HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
4209         );
4210
4211         res = hdac_command(sc,
4212             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_STREAM_FORMATS),
4213             cad);
4214         devinfo->function.audio.supp_stream_formats = res;
4215
4216         res = hdac_command(sc,
4217             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_PCM_SIZE_RATE),
4218             cad);
4219         devinfo->function.audio.supp_pcm_size_rate = res;
4220
4221         res = hdac_command(sc,
4222             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_OUTPUT_AMP_CAP),
4223             cad);
4224         devinfo->function.audio.outamp_cap = res;
4225
4226         res = hdac_command(sc,
4227             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_INPUT_AMP_CAP),
4228             cad);
4229         devinfo->function.audio.inamp_cap = res;
4230
4231         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4232                 w = hdac_widget_get(devinfo, i);
4233                 if (w == NULL)
4234                         device_printf(sc->dev, "Ghost widget! nid=%d!\n", i);
4235                 else {
4236                         w->devinfo = devinfo;
4237                         w->nid = i;
4238                         w->enable = 1;
4239                         w->selconn = -1;
4240                         w->pflags = 0;
4241                         w->ossdev = -1;
4242                         w->bindas = -1;
4243                         w->param.eapdbtl = HDAC_INVALID;
4244                         hdac_widget_parse(w);
4245                 }
4246         }
4247 }
4248
4249 static void
4250 hdac_audio_ctl_parse(struct hdac_devinfo *devinfo)
4251 {
4252         struct hdac_softc *sc = devinfo->codec->sc;
4253         struct hdac_audio_ctl *ctls;
4254         struct hdac_widget *w, *cw;
4255         int i, j, cnt, max, ocap, icap;
4256         int mute, offset, step, size;
4257
4258         /* XXX This is redundant */
4259         max = 0;
4260         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4261                 w = hdac_widget_get(devinfo, i);
4262                 if (w == NULL || w->enable == 0)
4263                         continue;
4264                 if (w->param.outamp_cap != 0)
4265                         max++;
4266                 if (w->param.inamp_cap != 0) {
4267                         switch (w->type) {
4268                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4269                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4270                                 for (j = 0; j < w->nconns; j++) {
4271                                         cw = hdac_widget_get(devinfo,
4272                                             w->conns[j]);
4273                                         if (cw == NULL || cw->enable == 0)
4274                                                 continue;
4275                                         max++;
4276                                 }
4277                                 break;
4278                         default:
4279                                 max++;
4280                                 break;
4281                         }
4282                 }
4283         }
4284
4285         devinfo->function.audio.ctlcnt = max;
4286
4287         if (max < 1)
4288                 return;
4289
4290         ctls = (struct hdac_audio_ctl *)malloc(
4291             sizeof(*ctls) * max, M_HDAC, M_ZERO | M_NOWAIT);
4292
4293         if (ctls == NULL) {
4294                 /* Blekh! */
4295                 device_printf(sc->dev, "unable to allocate ctls!\n");
4296                 devinfo->function.audio.ctlcnt = 0;
4297                 return;
4298         }
4299
4300         cnt = 0;
4301         for (i = devinfo->startnode; cnt < max && i < devinfo->endnode; i++) {
4302                 if (cnt >= max) {
4303                         device_printf(sc->dev, "%s: Ctl overflow!\n",
4304                             __func__);
4305                         break;
4306                 }
4307                 w = hdac_widget_get(devinfo, i);
4308                 if (w == NULL || w->enable == 0)
4309                         continue;
4310                 ocap = w->param.outamp_cap;
4311                 icap = w->param.inamp_cap;
4312                 if (ocap != 0) {
4313                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(ocap);
4314                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(ocap);
4315                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(ocap);
4316                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(ocap);
4317                         /*if (offset > step) {
4318                                 HDA_BOOTVERBOSE(
4319                                         device_printf(sc->dev,
4320                                             "BUGGY outamp: nid=%d "
4321                                             "[offset=%d > step=%d]\n",
4322                                             w->nid, offset, step);
4323                                 );
4324                                 offset = step;
4325                         }*/
4326                         ctls[cnt].enable = 1;
4327                         ctls[cnt].widget = w;
4328                         ctls[cnt].mute = mute;
4329                         ctls[cnt].step = step;
4330                         ctls[cnt].size = size;
4331                         ctls[cnt].offset = offset;
4332                         ctls[cnt].left = offset;
4333                         ctls[cnt].right = offset;
4334                         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
4335                             w->waspin)
4336                                 ctls[cnt].ndir = HDA_CTL_IN;
4337                         else
4338                                 ctls[cnt].ndir = HDA_CTL_OUT;
4339                         ctls[cnt++].dir = HDA_CTL_OUT;
4340                 }
4341
4342                 if (icap != 0) {
4343                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(icap);
4344                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(icap);
4345                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(icap);
4346                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(icap);
4347                         /*if (offset > step) {
4348                                 HDA_BOOTVERBOSE(
4349                                         device_printf(sc->dev,
4350                                             "BUGGY inamp: nid=%d "
4351                                             "[offset=%d > step=%d]\n",
4352                                             w->nid, offset, step);
4353                                 );
4354                                 offset = step;
4355                         }*/
4356                         switch (w->type) {
4357                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4358                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4359                                 for (j = 0; j < w->nconns; j++) {
4360                                         if (cnt >= max) {
4361                                                 device_printf(sc->dev,
4362                                                     "%s: Ctl overflow!\n",
4363                                                     __func__);
4364                                                 break;
4365                                         }
4366                                         cw = hdac_widget_get(devinfo,
4367                                             w->conns[j]);
4368                                         if (cw == NULL || cw->enable == 0)
4369                                                 continue;
4370                                         ctls[cnt].enable = 1;
4371                                         ctls[cnt].widget = w;
4372                                         ctls[cnt].childwidget = cw;
4373                                         ctls[cnt].index = j;
4374                                         ctls[cnt].mute = mute;
4375                                         ctls[cnt].step = step;
4376                                         ctls[cnt].size = size;
4377                                         ctls[cnt].offset = offset;
4378                                         ctls[cnt].left = offset;
4379                                         ctls[cnt].right = offset;
4380                                         ctls[cnt].ndir = HDA_CTL_IN;
4381                                         ctls[cnt++].dir = HDA_CTL_IN;
4382                                 }
4383                                 break;
4384                         default:
4385                                 if (cnt >= max) {
4386                                         device_printf(sc->dev,
4387                                             "%s: Ctl overflow!\n",
4388                                             __func__);
4389                                         break;
4390                                 }
4391                                 ctls[cnt].enable = 1;
4392                                 ctls[cnt].widget = w;
4393                                 ctls[cnt].mute = mute;
4394                                 ctls[cnt].step = step;
4395                                 ctls[cnt].size = size;
4396                                 ctls[cnt].offset = offset;
4397                                 ctls[cnt].left = offset;
4398                                 ctls[cnt].right = offset;
4399                                 if (w->type ==
4400                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4401                                         ctls[cnt].ndir = HDA_CTL_OUT;
4402                                 else
4403                                         ctls[cnt].ndir = HDA_CTL_IN;
4404                                 ctls[cnt++].dir = HDA_CTL_IN;
4405                                 break;
4406                         }
4407                 }
4408         }
4409
4410         devinfo->function.audio.ctl = ctls;
4411 }
4412
4413 static void
4414 hdac_audio_as_parse(struct hdac_devinfo *devinfo)
4415 {
4416         struct hdac_softc *sc = devinfo->codec->sc;
4417         struct hdac_audio_as *as;
4418         struct hdac_widget *w;
4419         int i, j, cnt, max, type, dir, assoc, seq, first, hpredir;
4420
4421         /* Count present associations */
4422         max = 0;
4423         for (j = 1; j < 16; j++) {
4424                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4425                         w = hdac_widget_get(devinfo, i);
4426                         if (w == NULL || w->enable == 0)
4427                                 continue;
4428                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4429                                 continue;
4430                         if (HDA_CONFIG_DEFAULTCONF_ASSOCIATION(w->wclass.pin.config)
4431                             != j)
4432                                 continue;
4433                         max++;
4434                         if (j != 15)  /* There could be many 1-pin assocs #15 */
4435                                 break;
4436                 }
4437         }
4438
4439         devinfo->function.audio.ascnt = max;
4440
4441         if (max < 1)
4442                 return;
4443
4444         as = (struct hdac_audio_as *)malloc(
4445             sizeof(*as) * max, M_HDAC, M_ZERO | M_NOWAIT);
4446
4447         if (as == NULL) {
4448                 /* Blekh! */
4449                 device_printf(sc->dev, "unable to allocate assocs!\n");
4450                 devinfo->function.audio.ascnt = 0;
4451                 return;
4452         }
4453
4454         for (i = 0; i < max; i++) {
4455                 as[i].hpredir = -1;
4456                 as[i].chan = -1;
4457                 as[i].digital = 1;
4458         }
4459
4460         /* Scan associations skipping as=0. */
4461         cnt = 0;
4462         for (j = 1; j < 16; j++) {
4463                 first = 16;
4464                 hpredir = 0;
4465                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4466                         w = hdac_widget_get(devinfo, i);
4467                         if (w == NULL || w->enable == 0)
4468                                 continue;
4469                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4470                                 continue;
4471                         assoc = HDA_CONFIG_DEFAULTCONF_ASSOCIATION(w->wclass.pin.config);
4472                         seq = HDA_CONFIG_DEFAULTCONF_SEQUENCE(w->wclass.pin.config);
4473                         if (assoc != j) {
4474                                 continue;
4475                         }
4476                         KASSERT(cnt < max,
4477                             ("%s: Associations owerflow (%d of %d)",
4478                             __func__, cnt, max));
4479                         type = w->wclass.pin.config &
4480                             HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4481                         /* Get pin direction. */
4482                         if (type == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT ||
4483                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER ||
4484                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT ||
4485                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT ||
4486                             type == HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT)
4487                                 dir = HDA_CTL_OUT;
4488                         else
4489                                 dir = HDA_CTL_IN;
4490                         /* If this is a first pin - create new association. */
4491                         if (as[cnt].pincnt == 0) {
4492                                 as[cnt].enable = 1;
4493                                 as[cnt].index = j;
4494                                 as[cnt].dir = dir;
4495                         }
4496                         if (seq < first)
4497                                 first = seq;
4498                         /* Check association correctness. */
4499                         if (as[cnt].pins[seq] != 0) {
4500                                 device_printf(sc->dev, "%s: Duplicate pin %d (%d) "
4501                                     "in association %d! Disabling association.\n",
4502                                     __func__, seq, w->nid, j);
4503                                 as[cnt].enable = 0;
4504                         }
4505                         if (dir != as[cnt].dir) {
4506                                 device_printf(sc->dev, "%s: Pin %d has wrong "
4507                                     "direction for association %d! Disabling "
4508                                     "association.\n",
4509                                     __func__, w->nid, j);
4510                                 as[cnt].enable = 0;
4511                         }
4512                         if (!HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
4513                                 as[cnt].digital = 0;
4514                         /* Headphones with seq=15 may mean redirection. */
4515                         if (type == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT &&
4516                             seq == 15)
4517                                 hpredir = 1;
4518                         as[cnt].pins[seq] = w->nid;
4519                         as[cnt].pincnt++;
4520                         /* Association 15 is a multiple unassociated pins. */
4521                         if (j == 15)
4522                                 cnt++;
4523                 }
4524                 if (j != 15 && as[cnt].pincnt > 0) {
4525                         if (hpredir && as[cnt].pincnt > 1)
4526                                 as[cnt].hpredir = first;
4527                         cnt++;
4528                 }
4529         }
4530         HDA_BOOTVERBOSE(
4531                 device_printf(sc->dev,
4532                     "%d associations found:\n", max);
4533                 for (i = 0; i < max; i++) {
4534                         device_printf(sc->dev,
4535                             "Association %d (%d) %s%s:\n",
4536                             i, as[i].index, (as[i].dir == HDA_CTL_IN)?"in":"out",
4537                             as[i].enable?"":" (disabled)");
4538                         for (j = 0; j < 16; j++) {
4539                                 if (as[i].pins[j] == 0)
4540                                         continue;
4541                                 device_printf(sc->dev,
4542                                     " Pin nid=%d seq=%d\n",
4543                                     as[i].pins[j], j);
4544                         }
4545                 }
4546         );
4547
4548         devinfo->function.audio.as = as;
4549 }
4550
4551 static const struct {
4552         uint32_t model;
4553         uint32_t id;
4554         uint32_t set, unset;
4555 } hdac_quirks[] = {
4556         /*
4557          * XXX Force stereo quirk. Monoural recording / playback
4558          *     on few codecs (especially ALC880) seems broken or
4559          *     perhaps unsupported.
4560          */
4561         { HDA_MATCH_ALL, HDA_MATCH_ALL,
4562             HDA_QUIRK_FORCESTEREO | HDA_QUIRK_IVREF, 0 },
4563         { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL,
4564             HDA_QUIRK_GPIO0, 0 },
4565         { ASUS_G2K_SUBVENDOR, HDA_CODEC_ALC660,
4566             HDA_QUIRK_GPIO0, 0 },
4567         { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880,
4568             HDA_QUIRK_GPIO0, 0 },
4569         { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880,
4570             HDA_QUIRK_GPIO0, 0 },
4571         { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882,
4572             HDA_QUIRK_GPIO0, 0 },
4573         { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882,
4574             HDA_QUIRK_GPIO0, 0 },
4575         { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A,
4576             HDA_QUIRK_EAPDINV, 0 },
4577         { ASUS_A8X_SUBVENDOR, HDA_CODEC_AD1986A,
4578             HDA_QUIRK_EAPDINV, 0 },
4579         { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861,
4580             HDA_QUIRK_OVREF, 0 },
4581         { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861,
4582             HDA_QUIRK_OVREF, 0 },
4583         /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988,
4584             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },*/
4585         { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880,
4586             HDA_QUIRK_GPIO1, 0 },
4587         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A,
4588             HDA_QUIRK_EAPDINV | HDA_QUIRK_SENSEINV, 0 },
4589         { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A,
4590             HDA_QUIRK_EAPDINV, 0 },
4591         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885,
4592             HDA_QUIRK_GPIO0 | HDA_QUIRK_OVREF50, 0},
4593         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221,
4594             HDA_QUIRK_GPIO0 | HDA_QUIRK_GPIO1, 0 },
4595         { DELL_D630_SUBVENDOR, HDA_CODEC_STAC9205X,
4596             HDA_QUIRK_GPIO0, 0 },
4597         { DELL_V1400_SUBVENDOR, HDA_CODEC_STAC9228X,
4598             HDA_QUIRK_GPIO2, 0 },
4599         { DELL_V1500_SUBVENDOR, HDA_CODEC_STAC9205X,
4600             HDA_QUIRK_GPIO0, 0 },
4601         { HDA_MATCH_ALL, HDA_CODEC_AD1988,
4602             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4603         { HDA_MATCH_ALL, HDA_CODEC_AD1988B,
4604             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4605         { HDA_MATCH_ALL, HDA_CODEC_CX20549,
4606             0, HDA_QUIRK_FORCESTEREO }
4607 };
4608 #define HDAC_QUIRKS_LEN (sizeof(hdac_quirks) / sizeof(hdac_quirks[0]))
4609
4610 static void
4611 hdac_vendor_patch_parse(struct hdac_devinfo *devinfo)
4612 {
4613         struct hdac_widget *w;
4614         uint32_t id, subvendor;
4615         int i;
4616
4617         id = hdac_codec_id(devinfo->codec);
4618         subvendor = devinfo->codec->sc->pci_subvendor;
4619
4620         /*
4621          * Quirks
4622          */
4623         for (i = 0; i < HDAC_QUIRKS_LEN; i++) {
4624                 if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subvendor) &&
4625                     HDA_DEV_MATCH(hdac_quirks[i].id, id)))
4626                         continue;
4627                 if (hdac_quirks[i].set != 0)
4628                         devinfo->function.audio.quirks |=
4629                             hdac_quirks[i].set;
4630                 if (hdac_quirks[i].unset != 0)
4631                         devinfo->function.audio.quirks &=
4632                             ~(hdac_quirks[i].unset);
4633         }
4634
4635         switch (id) {
4636         case HDA_CODEC_ALC883:
4637                 /*
4638                  * nid: 24/25 = External (jack) or Internal (fixed) Mic.
4639                  *              Clear vref cap for jack connectivity.
4640                  */
4641                 w = hdac_widget_get(devinfo, 24);
4642                 if (w != NULL && w->enable != 0 && w->type ==
4643                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4644                     (w->wclass.pin.config &
4645                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4646                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4647                         w->wclass.pin.cap &= ~(
4648                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4649                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4650                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4651                 w = hdac_widget_get(devinfo, 25);
4652                 if (w != NULL && w->enable != 0 && w->type ==
4653                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4654                     (w->wclass.pin.config &
4655                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4656                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4657                         w->wclass.pin.cap &= ~(
4658                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4659                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4660                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4661                 /*
4662                  * nid: 26 = Line-in, leave it alone.
4663                  */
4664                 break;
4665         case HDA_CODEC_AD1983:
4666                 /*
4667                  * This codec has several possible usages, but none
4668                  * fit the parser best. Help parser to choose better.
4669                  */
4670                 /* Disable direct unmixed playback to get pcm volume. */
4671                 w = hdac_widget_get(devinfo, 5);
4672                 if (w != NULL)
4673                         w->connsenable[0] = 0;
4674                 w = hdac_widget_get(devinfo, 6);
4675                 if (w != NULL)
4676                         w->connsenable[0] = 0;
4677                 w = hdac_widget_get(devinfo, 11);
4678                 if (w != NULL)
4679                         w->connsenable[0] = 0;
4680                 /* Disable mic and line selectors. */
4681                 w = hdac_widget_get(devinfo, 12);
4682                 if (w != NULL)
4683                         w->connsenable[1] = 0;
4684                 w = hdac_widget_get(devinfo, 13);
4685                 if (w != NULL)
4686                         w->connsenable[1] = 0;
4687                 /* Disable recording from mono playback mix. */
4688                 w = hdac_widget_get(devinfo, 20);
4689                 if (w != NULL)
4690                         w->connsenable[3] = 0;
4691                 break;
4692         case HDA_CODEC_AD1986A:
4693                 /*
4694                  * This codec has overcomplicated input mixing.
4695                  * Make some cleaning there.
4696                  */
4697                 /* Disable input mono mixer. Not needed and not supported. */
4698                 w = hdac_widget_get(devinfo, 43);
4699                 if (w != NULL)
4700                         w->enable = 0;
4701                 /* Disable any with any input mixing mesh. Use separately. */
4702                 w = hdac_widget_get(devinfo, 39);
4703                 if (w != NULL)
4704                         w->enable = 0;
4705                 w = hdac_widget_get(devinfo, 40);
4706                 if (w != NULL)
4707                         w->enable = 0;
4708                 w = hdac_widget_get(devinfo, 41);
4709                 if (w != NULL)
4710                         w->enable = 0;
4711                 w = hdac_widget_get(devinfo, 42);
4712                 if (w != NULL)
4713                         w->enable = 0;
4714                 /* Disable duplicate mixer node connector. */
4715                 w = hdac_widget_get(devinfo, 15);
4716                 if (w != NULL)
4717                         w->connsenable[3] = 0;
4718
4719                 if (subvendor == ASUS_A8X_SUBVENDOR) {
4720                         /*
4721                          * This is just plain ridiculous.. There
4722                          * are several A8 series that share the same
4723                          * pci id but works differently (EAPD).
4724                          */
4725                         w = hdac_widget_get(devinfo, 26);
4726                         if (w != NULL && w->type ==
4727                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4728                             (w->wclass.pin.config &
4729                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) !=
4730                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
4731                                 devinfo->function.audio.quirks &=
4732                                     ~HDA_QUIRK_EAPDINV;
4733                 }
4734                 break;
4735         case HDA_CODEC_AD1981HD:
4736                 /*
4737                  * This codec has very unusual design with several
4738                  * points inappropriate for the present parser.
4739                  */
4740                 /* Disable recording from mono playback mix. */
4741                 w = hdac_widget_get(devinfo, 21);
4742                 if (w != NULL)
4743                         w->connsenable[3] = 0;
4744                 /* Disable rear to front mic mixer, use separately. */
4745                 w = hdac_widget_get(devinfo, 31);
4746                 if (w != NULL)
4747                         w->enable = 0;
4748                 /* Disable playback mixer, use direct bypass. */
4749                 w = hdac_widget_get(devinfo, 14);
4750                 if (w != NULL)
4751                         w->enable = 0;
4752                 break;
4753         }
4754 }
4755
4756 /*
4757  * Trace path from DAC to pin.
4758  */
4759 static nid_t
4760 hdac_audio_trace_dac(struct hdac_devinfo *devinfo, int as, int seq, nid_t nid,
4761     int dupseq, int min, int only, int depth)
4762 {
4763         struct hdac_widget *w;
4764         int i, im = -1;
4765         nid_t m = 0, ret;
4766
4767         if (depth > HDA_PARSE_MAXDEPTH)
4768                 return (0);
4769         w = hdac_widget_get(devinfo, nid);
4770         if (w == NULL || w->enable == 0)
4771                 return (0);
4772         HDA_BOOTHVERBOSE(
4773                 if (!only) {
4774                         device_printf(devinfo->codec->sc->dev,
4775                             " %*stracing via nid %d\n",
4776                                 depth + 1, "", w->nid);
4777                 }
4778         );
4779         /* Use only unused widgets */
4780         if (w->bindas >= 0 && w->bindas != as) {
4781                 HDA_BOOTHVERBOSE(
4782                         if (!only) {
4783                                 device_printf(devinfo->codec->sc->dev,
4784                                     " %*snid %d busy by association %d\n",
4785                                         depth + 1, "", w->nid, w->bindas);
4786                         }
4787                 );
4788                 return (0);
4789         }
4790         if (dupseq < 0) {
4791                 if (w->bindseqmask != 0) {
4792                         HDA_BOOTHVERBOSE(
4793                                 if (!only) {
4794                                         device_printf(devinfo->codec->sc->dev,
4795                                             " %*snid %d busy by seqmask %x\n",
4796                                                 depth + 1, "", w->nid, w->bindseqmask);
4797                                 }
4798                         );
4799                         return (0);
4800                 }
4801         } else {
4802                 /* If this is headphones - allow duplicate first pin. */
4803                 if (w->bindseqmask != 0 &&
4804                     (w->bindseqmask & (1 << dupseq)) == 0) {
4805                         HDA_BOOTHVERBOSE(
4806                                 device_printf(devinfo->codec->sc->dev,
4807                                     " %*snid %d busy by seqmask %x\n",
4808                                         depth + 1, "", w->nid, w->bindseqmask);
4809                         );
4810                         return (0);
4811                 }
4812         }
4813
4814         switch (w->type) {
4815         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4816                 /* Do not traverse input. AD1988 has digital monitor
4817                 for which we are not ready. */
4818                 break;
4819         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
4820                 /* If we are tracing HP take only dac of first pin. */
4821                 if ((only == 0 || only == w->nid) &&
4822                     (w->nid >= min) && (dupseq < 0 || w->nid ==
4823                     devinfo->function.audio.as[as].dacs[dupseq]))
4824                         m = w->nid;
4825                 break;
4826         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4827                 if (depth > 0)
4828                         break;
4829                 /* Fall */
4830         default:
4831                 /* Find reachable DACs with smallest nid respecting constraints. */
4832                 for (i = 0; i < w->nconns; i++) {
4833                         if (w->connsenable[i] == 0)
4834                                 continue;
4835                         if (w->selconn != -1 && w->selconn != i)
4836                                 continue;
4837                         if ((ret = hdac_audio_trace_dac(devinfo, as, seq,
4838                             w->conns[i], dupseq, min, only, depth + 1)) != 0) {
4839                                 if (m == 0 || ret < m) {
4840                                         m = ret;
4841                                         im = i;
4842                                 }
4843                                 if (only || dupseq >= 0)
4844                                         break;
4845                         }
4846                 }
4847                 if (m && only && ((w->nconns > 1 &&
4848                     w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
4849                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4850                         w->selconn = im;
4851                 break;
4852         }
4853         if (m && only) {
4854                 w->bindas = as;
4855                 w->bindseqmask |= (1 << seq);
4856         }
4857         HDA_BOOTHVERBOSE(
4858                 if (!only) {
4859                         device_printf(devinfo->codec->sc->dev,
4860                             " %*snid %d returned %d\n",
4861                                 depth + 1, "", w->nid, m);
4862                 }
4863         );
4864         return (m);
4865 }
4866
4867 /*
4868  * Trace path from widget to ADC.
4869  */
4870 static nid_t
4871 hdac_audio_trace_adc(struct hdac_devinfo *devinfo, int as, int seq, nid_t nid,
4872     int only, int depth)
4873 {
4874         struct hdac_widget *w, *wc;
4875         int i, j;
4876         nid_t res = 0;
4877
4878         if (depth > HDA_PARSE_MAXDEPTH)
4879                 return (0);
4880         w = hdac_widget_get(devinfo, nid);
4881         if (w == NULL || w->enable == 0)
4882                 return (0);
4883         HDA_BOOTHVERBOSE(
4884                 device_printf(devinfo->codec->sc->dev,
4885                     " %*stracing via nid %d\n",
4886                         depth + 1, "", w->nid);
4887         );
4888         /* Use only unused widgets */
4889         if (w->bindas >= 0 && w->bindas != as) {
4890                 HDA_BOOTHVERBOSE(
4891                         device_printf(devinfo->codec->sc->dev,
4892                             " %*snid %d busy by association %d\n",
4893                                 depth + 1, "", w->nid, w->bindas);
4894                 );
4895                 return (0);
4896         }
4897
4898         switch (w->type) {
4899         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4900                 /* If we are tracing HP take only dac of first pin. */
4901                 if (only == w->nid)
4902                         res = 1;
4903                 break;
4904         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4905                 if (depth > 0)
4906                         break;
4907                 /* Fall */
4908         default:
4909                 /* Try to find reachable ADCs with specified nid. */
4910                 for (j = devinfo->startnode; j < devinfo->endnode; j++) {
4911                         wc = hdac_widget_get(devinfo, j);
4912                         if (wc == NULL || wc->enable == 0)
4913                                 continue;
4914                         for (i = 0; i < wc->nconns; i++) {
4915                                 if (wc->connsenable[i] == 0)
4916                                         continue;
4917                                 if (wc->conns[i] != nid)
4918                                         continue;
4919                                 if (hdac_audio_trace_adc(devinfo, as, seq,
4920                                     j, only, depth + 1) != 0) {
4921                                         res = 1;
4922                                         if (((wc->nconns > 1 &&
4923                                             wc->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
4924                                             wc->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR) &&
4925                                             wc->selconn == -1)
4926                                                 wc->selconn = i;
4927                                 }
4928                         }
4929                 }
4930                 break;
4931         }
4932         if (res) {
4933                 w->bindas = as;
4934                 w->bindseqmask |= (1 << seq);
4935         }
4936         HDA_BOOTHVERBOSE(
4937                 device_printf(devinfo->codec->sc->dev,
4938                     " %*snid %d returned %d\n",
4939                         depth + 1, "", w->nid, res);
4940         );
4941         return (res);
4942 }
4943
4944 /*
4945  * Erase trace path of the specified association.
4946  */
4947 static void
4948 hdac_audio_undo_trace(struct hdac_devinfo *devinfo, int as, int seq)
4949 {
4950         struct hdac_widget *w;
4951         int i;
4952
4953         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4954                 w = hdac_widget_get(devinfo, i);
4955                 if (w == NULL || w->enable == 0)
4956                         continue;
4957                 if (w->bindas == as) {
4958                         if (seq >= 0) {
4959                                 w->bindseqmask &= ~(1 << seq);
4960                                 if (w->bindseqmask == 0) {
4961                                         w->bindas = -1;
4962                                         w->selconn = -1;
4963                                 }
4964                         } else {
4965                                 w->bindas = -1;
4966                                 w->bindseqmask = 0;
4967                                 w->selconn = -1;
4968                         }
4969                 }
4970         }
4971 }
4972
4973 /*
4974  * Trace association path from DAC to output
4975  */
4976 static int
4977 hdac_audio_trace_as_out(struct hdac_devinfo *devinfo, int as, int seq)
4978 {
4979         struct hdac_audio_as *ases = devinfo->function.audio.as;
4980         int i, hpredir;
4981         nid_t min, res;
4982
4983         /* Find next pin */
4984         for (i = seq; i < 16 && ases[as].pins[i] == 0; i++)
4985                 ;
4986         /* Check if there is no any left. If so - we succeeded. */
4987         if (i == 16)
4988                 return (1);
4989
4990         hpredir = (i == 15 && ases[as].fakeredir == 0)?ases[as].hpredir:-1;
4991         min = 0;
4992         res = 0;
4993         do {
4994                 HDA_BOOTHVERBOSE(
4995                         device_printf(devinfo->codec->sc->dev,
4996                             " Tracing pin %d with min nid %d",
4997                             ases[as].pins[i], min);
4998                         if (hpredir >= 0)
4999                                 printf(" and hpredir %d", hpredir);
5000                         printf("\n");
5001                 );
5002                 /* Trace this pin taking min nid into account. */
5003                 res = hdac_audio_trace_dac(devinfo, as, i,
5004                     ases[as].pins[i], hpredir, min, 0, 0);
5005                 if (res == 0) {
5006                         /* If we failed - return to previous and redo it. */
5007                         HDA_BOOTVERBOSE(
5008                                 device_printf(devinfo->codec->sc->dev,
5009                                     " Unable to trace pin %d seq %d with min "
5010                                     "nid %d",
5011                                     ases[as].pins[i], i, min);
5012                                 if (hpredir >= 0)
5013                                         printf(" and hpredir %d", hpredir);
5014                                 printf("\n");
5015                         );
5016                         return (0);
5017                 }
5018                 HDA_BOOTVERBOSE(
5019                         device_printf(devinfo->codec->sc->dev,
5020                             " Pin %d traced to DAC %d",
5021                             ases[as].pins[i], res);
5022                         if (hpredir >= 0)
5023                                 printf(" and hpredir %d", hpredir);
5024                         if (ases[as].fakeredir)
5025                                 printf(" with fake redirection");
5026                         printf("\n");
5027                 );
5028                 /* Trace again to mark the path */
5029                 hdac_audio_trace_dac(devinfo, as, i,
5030                     ases[as].pins[i], hpredir, min, res, 0);
5031                 ases[as].dacs[i] = res;
5032                 /* We succeeded, so call next. */
5033                 if (hdac_audio_trace_as_out(devinfo, as, i + 1))
5034                         return (1);
5035                 /* If next failed, we should retry with next min */
5036                 hdac_audio_undo_trace(devinfo, as, i);
5037                 ases[as].dacs[i] = 0;
5038                 min = res + 1;
5039         } while (1);
5040 }
5041
5042 /*
5043  * Trace association path from input to ADC
5044  */
5045 static int
5046 hdac_audio_trace_as_in(struct hdac_devinfo *devinfo, int as)
5047 {
5048         struct hdac_audio_as *ases = devinfo->function.audio.as;
5049         struct hdac_widget *w;
5050         int i, j, k;
5051
5052         for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5053                 w = hdac_widget_get(devinfo, j);
5054                 if (w == NULL || w->enable == 0)
5055                         continue;
5056                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
5057                         continue;
5058                 if (w->bindas >= 0 && w->bindas != as)
5059                         continue;
5060
5061                 /* Find next pin */
5062                 for (i = 0; i < 16; i++) {
5063                         if (ases[as].pins[i] == 0)
5064                                 continue;
5065
5066                         HDA_BOOTHVERBOSE(
5067                                 device_printf(devinfo->codec->sc->dev,
5068                                     " Tracing pin %d to ADC %d\n",
5069                                     ases[as].pins[i], j);
5070                         );
5071                         /* Trace this pin taking goal into account. */
5072                         if (hdac_audio_trace_adc(devinfo, as, i,
5073                             ases[as].pins[i], j, 0) == 0) {
5074                                 /* If we failed - return to previous and redo it. */
5075                                 HDA_BOOTVERBOSE(
5076                                         device_printf(devinfo->codec->sc->dev,
5077                                             " Unable to trace pin %d to ADC %d, undo traces\n",
5078                                             ases[as].pins[i], j);
5079                                 );
5080                                 hdac_audio_undo_trace(devinfo, as, -1);
5081                                 for (k = 0; k < 16; k++)
5082                                         ases[as].dacs[k] = 0;
5083                                 break;
5084                         }
5085                         HDA_BOOTVERBOSE(
5086                                 device_printf(devinfo->codec->sc->dev,
5087                                     " Pin %d traced to ADC %d\n",
5088                                     ases[as].pins[i], j);
5089                         );
5090                         ases[as].dacs[i] = j;
5091                 }
5092                 if (i == 16)
5093                         return (1);
5094         }
5095         return (0);
5096 }
5097
5098 /*
5099  * Trace input monitor path from mixer to output association.
5100  */
5101 static int
5102 hdac_audio_trace_to_out(struct hdac_devinfo *devinfo, nid_t nid, int depth)
5103 {
5104         struct hdac_audio_as *ases = devinfo->function.audio.as;
5105         struct hdac_widget *w, *wc;
5106         int i, j;
5107         nid_t res = 0;
5108
5109         if (depth > HDA_PARSE_MAXDEPTH)
5110                 return (0);
5111         w = hdac_widget_get(devinfo, nid);
5112         if (w == NULL || w->enable == 0)
5113                 return (0);
5114         HDA_BOOTHVERBOSE(
5115                 device_printf(devinfo->codec->sc->dev,
5116                     " %*stracing via nid %d\n",
5117                         depth + 1, "", w->nid);
5118         );
5119         /* Use only unused widgets */
5120         if (depth > 0 && w->bindas != -1) {
5121                 if (w->bindas < 0 || ases[w->bindas].dir == HDA_CTL_OUT) {
5122                         HDA_BOOTHVERBOSE(
5123                                 device_printf(devinfo->codec->sc->dev,
5124                                     " %*snid %d found output association %d\n",
5125                                         depth + 1, "", w->nid, w->bindas);
5126                         );
5127                         return (1);
5128                 } else {
5129                         HDA_BOOTHVERBOSE(
5130                                 device_printf(devinfo->codec->sc->dev,
5131                                     " %*snid %d busy by input association %d\n",
5132                                         depth + 1, "", w->nid, w->bindas);
5133                         );
5134                         return (0);
5135                 }
5136         }
5137
5138         switch (w->type) {
5139         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
5140                 /* Do not traverse input. AD1988 has digital monitor
5141                 for which we are not ready. */
5142                 break;
5143         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
5144                 if (depth > 0)
5145                         break;
5146                 /* Fall */
5147         default:
5148                 /* Try to find reachable ADCs with specified nid. */
5149                 for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5150                         wc = hdac_widget_get(devinfo, j);
5151                         if (wc == NULL || wc->enable == 0)
5152                                 continue;
5153                         for (i = 0; i < wc->nconns; i++) {
5154                                 if (wc->connsenable[i] == 0)
5155                                         continue;
5156                                 if (wc->conns[i] != nid)
5157                                         continue;
5158                                 if (hdac_audio_trace_to_out(devinfo,
5159                                     j, depth + 1) != 0) {
5160                                         res = 1;
5161                                         if (wc->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
5162                                             wc->selconn == -1)
5163                                                 wc->selconn = i;
5164                                 }
5165                         }
5166                 }
5167                 break;
5168         }
5169         if (res)
5170                 w->bindas = -2;
5171
5172         HDA_BOOTHVERBOSE(
5173                 device_printf(devinfo->codec->sc->dev,
5174                     " %*snid %d returned %d\n",
5175                         depth + 1, "", w->nid, res);
5176         );
5177         return (res);
5178 }
5179
5180 /*
5181  * Trace extra associations (beeper, monitor)
5182  */
5183 static void
5184 hdac_audio_trace_as_extra(struct hdac_devinfo *devinfo)
5185 {
5186         struct hdac_audio_as *as = devinfo->function.audio.as;
5187         struct hdac_widget *w;
5188         int j;
5189
5190         /* Input monitor */
5191         /* Find mixer associated with input, but supplying signal
5192            for output associations. Hope it will be input monitor. */
5193         HDA_BOOTVERBOSE(
5194                 device_printf(devinfo->codec->sc->dev,
5195                     "Tracing input monitor\n");
5196         );
5197         for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5198                 w = hdac_widget_get(devinfo, j);
5199                 if (w == NULL || w->enable == 0)
5200                         continue;
5201                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5202                         continue;
5203                 if (w->bindas < 0 || as[w->bindas].dir != HDA_CTL_IN)
5204                         continue;
5205                 HDA_BOOTVERBOSE(
5206                         device_printf(devinfo->codec->sc->dev,
5207                             " Tracing nid %d to out\n",
5208                             j);
5209                 );
5210                 if (hdac_audio_trace_to_out(devinfo, w->nid, 0)) {
5211                         HDA_BOOTVERBOSE(
5212                                 device_printf(devinfo->codec->sc->dev,
5213                                     " nid %d is input monitor\n",
5214                                         w->nid);
5215                         );
5216                         w->pflags |= HDA_ADC_MONITOR;
5217                         w->ossdev = SOUND_MIXER_IMIX;
5218                 }
5219         }
5220
5221         /* Beeper */
5222         HDA_BOOTVERBOSE(
5223                 device_printf(devinfo->codec->sc->dev,
5224                     "Tracing beeper\n");
5225         );
5226         for (j = devinfo->startnode; j < devinfo->endnode; j++) {
5227                 w = hdac_widget_get(devinfo, j);
5228                 if (w == NULL || w->enable == 0)
5229                         continue;
5230                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET)
5231                         continue;
5232                 HDA_BOOTHVERBOSE(
5233                         device_printf(devinfo->codec->sc->dev,
5234                             " Tracing nid %d to out\n",
5235                             j);
5236                 );
5237                 if (hdac_audio_trace_to_out(devinfo, w->nid, 0)) {
5238                         HDA_BOOTVERBOSE(
5239                                 device_printf(devinfo->codec->sc->dev,
5240                                     " nid %d traced to out\n",
5241                                     j);
5242                         );
5243                 }
5244                 w->bindas = -2;
5245         }
5246 }
5247
5248 /*
5249  * Bind assotiations to PCM channels
5250  */
5251 static void
5252 hdac_audio_bind_as(struct hdac_devinfo *devinfo)
5253 {
5254         struct hdac_softc *sc = devinfo->codec->sc;
5255         struct hdac_audio_as *as = devinfo->function.audio.as;
5256         int j, cnt = 0, free;
5257
5258         for (j = 0; j < devinfo->function.audio.ascnt; j++) {
5259                 if (as[j].enable)
5260                         cnt++;
5261         }
5262         if (sc->num_chans == 0) {
5263                 sc->chans = (struct hdac_chan *)malloc(
5264                     sizeof(struct hdac_chan) * cnt,
5265                     M_HDAC, M_ZERO | M_NOWAIT);
5266                 if (sc->chans == NULL) {
5267                         device_printf(sc->dev,
5268                             "Channels memory allocation failed!\n");
5269                         return;
5270                 }
5271         } else {
5272                 sc->chans = (struct hdac_chan *)realloc(sc->chans,
5273                     sizeof(struct hdac_chan) * (sc->num_chans + cnt),
5274                     M_HDAC, M_ZERO | M_NOWAIT);
5275                 if (sc->chans == NULL) {
5276                         sc->num_chans = 0;
5277                         device_printf(sc->dev,
5278                             "Channels memory allocation failed!\n");
5279                         return;
5280                 }
5281                 /* Fixup relative pointers after realloc */
5282                 for (j = 0; j < sc->num_chans; j++)
5283                         sc->chans[j].caps.fmtlist = sc->chans[j].fmtlist;
5284         }
5285         free = sc->num_chans;
5286         sc->num_chans += cnt;
5287
5288         for (j = free; j < free + cnt; j++) {
5289                 sc->chans[j].devinfo = devinfo;
5290                 sc->chans[j].as = -1;
5291         }
5292
5293         /* Assign associations in order of their numbers, */
5294         for (j = 0; j < devinfo->function.audio.ascnt; j++) {
5295                 if (as[j].enable == 0)
5296                         continue;
5297
5298                 as[j].chan = free;
5299                 sc->chans[free].as = j;
5300                 sc->chans[free].dir =
5301                     (as[j].dir == HDA_CTL_IN) ? PCMDIR_REC : PCMDIR_PLAY;
5302                 hdac_pcmchannel_setup(&sc->chans[free]);
5303                 free++;
5304         }
5305 }
5306
5307 static void
5308 hdac_audio_disable_nonaudio(struct hdac_devinfo *devinfo)
5309 {
5310         struct hdac_widget *w;
5311         int i;
5312
5313         /* Disable power and volume widgets. */
5314         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5315                 w = hdac_widget_get(devinfo, i);
5316                 if (w == NULL || w->enable == 0)
5317                         continue;
5318                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET ||
5319                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET) {
5320                         w->enable = 0;
5321                         HDA_BOOTHVERBOSE(
5322                                 device_printf(devinfo->codec->sc->dev,
5323                                     " Disabling nid %d due to it's"
5324                                     " non-audio type.\n",
5325                                     w->nid);
5326                         );
5327                 }
5328         }
5329 }
5330
5331 static void
5332 hdac_audio_disable_useless(struct hdac_devinfo *devinfo)
5333 {
5334         struct hdac_widget *w, *cw;
5335         struct hdac_audio_ctl *ctl;
5336         int done, found, i, j, k;
5337
5338         /* Disable useless pins. */
5339         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5340                 w = hdac_widget_get(devinfo, i);
5341                 if (w == NULL || w->enable == 0)
5342                         continue;
5343                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5344                         if ((w->wclass.pin.config &
5345                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
5346                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE) {
5347                                 w->enable = 0;
5348                                 HDA_BOOTHVERBOSE(
5349                                         device_printf(devinfo->codec->sc->dev,
5350                                             " Disabling pin nid %d due"
5351                                             " to None connectivity.\n",
5352                                             w->nid);
5353                                 );
5354                         } else if ((w->wclass.pin.config &
5355                             HDA_CONFIG_DEFAULTCONF_ASSOCIATION_MASK) == 0) {
5356                                 w->enable = 0;
5357                                 HDA_BOOTHVERBOSE(
5358                                         device_printf(devinfo->codec->sc->dev,
5359                                             " Disabling unassociated"
5360                                             " pin nid %d.\n",
5361                                             w->nid);
5362                                 );
5363                         }
5364                 }
5365         }
5366         do {
5367                 done = 1;
5368                 /* Disable and mute controls for disabled widgets. */
5369                 i = 0;
5370                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5371                         if (ctl->enable == 0)
5372                                 continue;
5373                         if (ctl->widget->enable == 0 ||
5374                             (ctl->childwidget != NULL &&
5375                             ctl->childwidget->enable == 0)) {
5376                                 ctl->forcemute = 1;
5377                                 ctl->muted = HDA_AMP_MUTE_ALL;
5378                                 ctl->left = 0;
5379                                 ctl->right = 0;
5380                                 ctl->enable = 0;
5381                                 if (ctl->ndir == HDA_CTL_IN)
5382                                         ctl->widget->connsenable[ctl->index] = 0;
5383                                 done = 0;
5384                                 HDA_BOOTHVERBOSE(
5385                                         device_printf(devinfo->codec->sc->dev,
5386                                             " Disabling ctl %d nid %d cnid %d due"
5387                                             " to disabled widget.\n", i,
5388                                             ctl->widget->nid,
5389                                             (ctl->childwidget != NULL)?
5390                                             ctl->childwidget->nid:-1);
5391                                 );
5392                         }
5393                 }
5394                 /* Disable useless widgets. */
5395                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5396                         w = hdac_widget_get(devinfo, i);
5397                         if (w == NULL || w->enable == 0)
5398                                 continue;
5399                         /* Disable inputs with disabled child widgets. */
5400                         for (j = 0; j < w->nconns; j++) {
5401                                 if (w->connsenable[j]) {
5402                                         cw = hdac_widget_get(devinfo, w->conns[j]);
5403                                         if (cw == NULL || cw->enable == 0) {
5404                                                 w->connsenable[j] = 0;
5405                                                 HDA_BOOTHVERBOSE(
5406                                                         device_printf(devinfo->codec->sc->dev,
5407                                                             " Disabling nid %d connection %d due"
5408                                                             " to disabled child widget.\n",
5409                                                             i, j);
5410                                                 );
5411                                         }
5412                                 }
5413                         }
5414                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
5415                             w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5416                                 continue;
5417                         /* Disable mixers and selectors without inputs. */
5418                         found = 0;
5419                         for (j = 0; j < w->nconns; j++) {
5420                                 if (w->connsenable[j]) {
5421                                         found = 1;
5422                                         break;
5423                                 }
5424                         }
5425                         if (found == 0) {
5426                                 w->enable = 0;
5427                                 done = 0;
5428                                 HDA_BOOTHVERBOSE(
5429                                         device_printf(devinfo->codec->sc->dev,
5430                                             " Disabling nid %d due to all it's"
5431                                             " inputs disabled.\n", w->nid);
5432                                 );
5433                         }
5434                         /* Disable nodes without consumers. */
5435                         if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
5436                             w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5437                                 continue;
5438                         found = 0;
5439                         for (k = devinfo->startnode; k < devinfo->endnode; k++) {
5440                                 cw = hdac_widget_get(devinfo, k);
5441                                 if (cw == NULL || cw->enable == 0)
5442                                         continue;
5443                                 for (j = 0; j < cw->nconns; j++) {
5444                                         if (cw->connsenable[j] && cw->conns[j] == i) {
5445                                                 found = 1;
5446                                                 break;
5447                                         }
5448                                 }
5449                         }
5450                         if (found == 0) {
5451                                 w->enable = 0;
5452                                 done = 0;
5453                                 HDA_BOOTHVERBOSE(
5454                                         device_printf(devinfo->codec->sc->dev,
5455                                             " Disabling nid %d due to all it's"
5456                                             " consumers disabled.\n", w->nid);
5457                                 );
5458                         }
5459                 }
5460         } while (done == 0);
5461
5462 }
5463
5464 static void
5465 hdac_audio_disable_unas(struct hdac_devinfo *devinfo)
5466 {
5467         struct hdac_audio_as *as = devinfo->function.audio.as;
5468         struct hdac_widget *w, *cw;
5469         struct hdac_audio_ctl *ctl;
5470         int i, j, k;
5471
5472         /* Disable unassosiated widgets. */
5473         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5474                 w = hdac_widget_get(devinfo, i);
5475                 if (w == NULL || w->enable == 0)
5476                         continue;
5477                 if (w->bindas == -1) {
5478                         w->enable = 0;
5479                         HDA_BOOTHVERBOSE(
5480                                 device_printf(devinfo->codec->sc->dev,
5481                                     " Disabling unassociated nid %d.\n",
5482                                     w->nid);
5483                         );
5484                 }
5485         }
5486         /* Disable input connections on input pin and
5487          * output on output. */
5488         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5489                 w = hdac_widget_get(devinfo, i);
5490                 if (w == NULL || w->enable == 0)
5491                         continue;
5492                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5493                         continue;
5494                 if (w->bindas < 0)
5495                         continue;
5496                 if (as[w->bindas].dir == HDA_CTL_IN) {
5497                         for (j = 0; j < w->nconns; j++) {
5498                                 if (w->connsenable[j] == 0)
5499                                         continue;
5500                                 w->connsenable[j] = 0;
5501                                 HDA_BOOTHVERBOSE(
5502                                         device_printf(devinfo->codec->sc->dev,
5503                                             " Disabling connection to input pin "
5504                                             "nid %d conn %d.\n",
5505                                             i, j);
5506                                 );
5507                         }
5508                         ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
5509                             HDA_CTL_IN, -1, 1);
5510                         if (ctl && ctl->enable) {
5511                                 ctl->forcemute = 1;
5512                                 ctl->muted = HDA_AMP_MUTE_ALL;
5513                                 ctl->left = 0;
5514                                 ctl->right = 0;
5515                                 ctl->enable = 0;
5516                         }
5517                 } else {
5518                         ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
5519                             HDA_CTL_OUT, -1, 1);
5520                         if (ctl && ctl->enable) {
5521                                 ctl->forcemute = 1;
5522                                 ctl->muted = HDA_AMP_MUTE_ALL;
5523                                 ctl->left = 0;
5524                                 ctl->right = 0;
5525                                 ctl->enable = 0;
5526                         }
5527                         for (k = devinfo->startnode; k < devinfo->endnode; k++) {
5528                                 cw = hdac_widget_get(devinfo, k);
5529                                 if (cw == NULL || cw->enable == 0)
5530                                         continue;
5531                                 for (j = 0; j < cw->nconns; j++) {
5532                                         if (cw->connsenable[j] && cw->conns[j] == i) {
5533                                                 cw->connsenable[j] = 0;
5534                                                 HDA_BOOTHVERBOSE(
5535                                                         device_printf(devinfo->codec->sc->dev,
5536                                                             " Disabling connection from output pin "
5537                                                             "nid %d conn %d cnid %d.\n",
5538                                                             k, j, i);
5539                                                 );
5540                                                 if (cw->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
5541                                                     cw->nconns > 1)
5542                                                         continue;
5543                                                 ctl = hdac_audio_ctl_amp_get(devinfo, k,
5544                                                     HDA_CTL_IN, j, 1);
5545                                                 if (ctl && ctl->enable) {
5546                                                         ctl->forcemute = 1;
5547                                                         ctl->muted = HDA_AMP_MUTE_ALL;
5548                                                         ctl->left = 0;
5549                                                         ctl->right = 0;
5550                                                         ctl->enable = 0;
5551                                                 }
5552                                         }
5553                                 }
5554                         }
5555                 }
5556         }
5557 }
5558
5559 static void
5560 hdac_audio_disable_notselected(struct hdac_devinfo *devinfo)
5561 {
5562         struct hdac_audio_as *as = devinfo->function.audio.as;
5563         struct hdac_widget *w;
5564         int i, j;
5565
5566         /* On playback path we can safely disable all unseleted inputs. */
5567         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5568                 w = hdac_widget_get(devinfo, i);
5569                 if (w == NULL || w->enable == 0)
5570                         continue;
5571                 if (w->nconns <= 1)
5572                         continue;
5573                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5574                         continue;
5575                 if (w->bindas < 0 || as[w->bindas].dir == HDA_CTL_IN)
5576                         continue;
5577                 for (j = 0; j < w->nconns; j++) {
5578                         if (w->connsenable[j] == 0)
5579                                 continue;
5580                         if (w->selconn < 0 || w->selconn == j)
5581                                 continue;
5582                         w->connsenable[j] = 0;
5583                         HDA_BOOTHVERBOSE(
5584                                 device_printf(devinfo->codec->sc->dev,
5585                                     " Disabling unselected connection "
5586                                     "nid %d conn %d.\n",
5587                                     i, j);
5588                         );
5589                 }
5590         }
5591 }
5592
5593 static void
5594 hdac_audio_disable_crossas(struct hdac_devinfo *devinfo)
5595 {
5596         struct hdac_widget *w, *cw;
5597         struct hdac_audio_ctl *ctl;
5598         int i, j;
5599
5600         /* Disable crossassociatement and unwanted crosschannel connections. */
5601         /* ... using selectors */
5602         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5603                 w = hdac_widget_get(devinfo, i);
5604                 if (w == NULL || w->enable == 0)
5605                         continue;
5606                 if (w->nconns <= 1)
5607                         continue;
5608                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5609                         continue;
5610                 if (w->bindas == -2)
5611                         continue;
5612                 for (j = 0; j < w->nconns; j++) {
5613                         if (w->connsenable[j] == 0)
5614                                 continue;
5615                         cw = hdac_widget_get(devinfo, w->conns[j]);
5616                         if (cw == NULL || w->enable == 0)
5617                                 continue;
5618                         if (cw->bindas == -2)
5619                                 continue;
5620                         if (w->bindas == cw->bindas &&
5621                             (w->bindseqmask & cw->bindseqmask) != 0)
5622                                 continue;
5623                         w->connsenable[j] = 0;
5624                         HDA_BOOTHVERBOSE(
5625                                 device_printf(devinfo->codec->sc->dev,
5626                                     " Disabling crossassociatement connection "
5627                                     "nid %d conn %d cnid %d.\n",
5628                                     i, j, cw->nid);
5629                         );
5630                 }
5631         }
5632         /* ... using controls */
5633         i = 0;
5634         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5635                 if (ctl->enable == 0 || ctl->childwidget == NULL)
5636                         continue;
5637                 if (ctl->widget->bindas == -2 ||
5638                     ctl->childwidget->bindas == -2)
5639                         continue;
5640                 if (ctl->widget->bindas != ctl->childwidget->bindas ||
5641                     (ctl->widget->bindseqmask & ctl->childwidget->bindseqmask) == 0) {
5642                         ctl->forcemute = 1;
5643                         ctl->muted = HDA_AMP_MUTE_ALL;
5644                         ctl->left = 0;
5645                         ctl->right = 0;
5646                         ctl->enable = 0;
5647                         if (ctl->ndir == HDA_CTL_IN)
5648                                 ctl->widget->connsenable[ctl->index] = 0;
5649                         HDA_BOOTHVERBOSE(
5650                                 device_printf(devinfo->codec->sc->dev,
5651                                     " Disabling crossassociatement connection "
5652                                     "ctl %d nid %d cnid %d.\n", i,
5653                                     ctl->widget->nid,
5654                                     ctl->childwidget->nid);
5655                         );
5656                 }
5657         }
5658
5659 }
5660
5661 #define HDA_CTL_GIVE(ctl)       ((ctl)->step?1:0)
5662
5663 /*
5664  * Find controls to control amplification for source.
5665  */
5666 static int
5667 hdac_audio_ctl_source_amp(struct hdac_devinfo *devinfo, nid_t nid, int index,
5668     int ossdev, int ctlable, int depth, int need)
5669 {
5670         struct hdac_widget *w, *wc;
5671         struct hdac_audio_ctl *ctl;
5672         int i, j, conns = 0, rneed;
5673
5674         if (depth > HDA_PARSE_MAXDEPTH)
5675                 return (need);
5676
5677         w = hdac_widget_get(devinfo, nid);
5678         if (w == NULL || w->enable == 0)
5679                 return (need);
5680
5681         /* Count number of active inputs. */
5682         if (depth > 0) {
5683                 for (j = 0; j < w->nconns; j++) {
5684                         if (w->connsenable[j])
5685                                 conns++;
5686                 }
5687         }
5688
5689         /* If this is not a first step - use input mixer.
5690            Pins have common input ctl so care must be taken. */
5691         if (depth > 0 && ctlable && (conns == 1 ||
5692             w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)) {
5693                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid, HDA_CTL_IN,
5694                     index, 1);
5695                 if (ctl) {
5696                         if (HDA_CTL_GIVE(ctl) & need)
5697                                 ctl->ossmask |= (1 << ossdev);
5698                         else
5699                                 ctl->possmask |= (1 << ossdev);
5700                         need &= ~HDA_CTL_GIVE(ctl);
5701                 }
5702         }
5703
5704         /* If widget has own ossdev - not traverse it.
5705            It will be traversed on it's own. */
5706         if (w->ossdev >= 0 && depth > 0)
5707                 return (need);
5708
5709         /* We must not traverse pin */
5710         if ((w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
5711             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) &&
5712             depth > 0)
5713                 return (need);
5714
5715         /* record that this widget exports such signal, */
5716         w->ossmask |= (1 << ossdev);
5717
5718         /* If signals mixed, we can't assign controls farther.
5719          * Ignore this on depth zero. Caller must knows why.
5720          * Ignore this for static selectors if this input selected.
5721          */
5722         if (conns > 1)
5723                 ctlable = 0;
5724
5725         if (ctlable) {
5726                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid, HDA_CTL_OUT, -1, 1);
5727                 if (ctl) {
5728                         if (HDA_CTL_GIVE(ctl) & need)
5729                                 ctl->ossmask |= (1 << ossdev);
5730                         else
5731                                 ctl->possmask |= (1 << ossdev);
5732                         need &= ~HDA_CTL_GIVE(ctl);
5733                 }
5734         }
5735
5736         rneed = 0;
5737         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5738                 wc = hdac_widget_get(devinfo, i);
5739                 if (wc == NULL || wc->enable == 0)
5740                         continue;
5741                 for (j = 0; j < wc->nconns; j++) {
5742                         if (wc->connsenable[j] && wc->conns[j] == nid) {
5743                                 rneed |= hdac_audio_ctl_source_amp(devinfo,
5744                                     wc->nid, j, ossdev, ctlable, depth + 1, need);
5745                         }
5746                 }
5747         }
5748         rneed &= need;
5749
5750         return (rneed);
5751 }
5752
5753 /*
5754  * Find controls to control amplification for destination.
5755  */
5756 static void
5757 hdac_audio_ctl_dest_amp(struct hdac_devinfo *devinfo, nid_t nid,
5758     int ossdev, int depth, int need)
5759 {
5760         struct hdac_audio_as *as = devinfo->function.audio.as;
5761         struct hdac_widget *w, *wc;
5762         struct hdac_audio_ctl *ctl;
5763         int i, j, consumers;
5764
5765         if (depth > HDA_PARSE_MAXDEPTH)
5766                 return;
5767
5768         w = hdac_widget_get(devinfo, nid);
5769         if (w == NULL || w->enable == 0)
5770                 return;
5771
5772         if (depth > 0) {
5773                 /* If this node produce output for several consumers,
5774                    we can't touch it. */
5775                 consumers = 0;
5776                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5777                         wc = hdac_widget_get(devinfo, i);
5778                         if (wc == NULL || wc->enable == 0)
5779                                 continue;
5780                         for (j = 0; j < wc->nconns; j++) {
5781                                 if (wc->connsenable[j] && wc->conns[j] == nid)
5782                                         consumers++;
5783                         }
5784                 }
5785                 /* The only exception is if real HP redirection is configured
5786                    and this is a duplication point.
5787                    XXX: Actually exception is not completely correct.
5788                    XXX: Duplication point check is not perfect. */
5789                 if ((consumers == 2 && (w->bindas < 0 ||
5790                     as[w->bindas].hpredir < 0 || as[w->bindas].fakeredir ||
5791                     (w->bindseqmask & (1 << 15)) == 0)) ||
5792                     consumers > 2)
5793                         return;
5794
5795                 /* Else use it's output mixer. */
5796                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
5797                     HDA_CTL_OUT, -1, 1);
5798                 if (ctl) {
5799                         if (HDA_CTL_GIVE(ctl) & need)
5800                                 ctl->ossmask |= (1 << ossdev);
5801                         else
5802                                 ctl->possmask |= (1 << ossdev);
5803                         need &= ~HDA_CTL_GIVE(ctl);
5804                 }
5805         }
5806
5807         /* We must not traverse pin */
5808         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
5809             depth > 0)
5810                 return;
5811
5812         for (i = 0; i < w->nconns; i++) {
5813                 int tneed = need;
5814                 if (w->connsenable[i] == 0)
5815                         continue;
5816                 ctl = hdac_audio_ctl_amp_get(devinfo, w->nid,
5817                     HDA_CTL_IN, i, 1);
5818                 if (ctl) {
5819                         if (HDA_CTL_GIVE(ctl) & tneed)
5820                                 ctl->ossmask |= (1 << ossdev);
5821                         else
5822                                 ctl->possmask |= (1 << ossdev);
5823                         tneed &= ~HDA_CTL_GIVE(ctl);
5824                 }
5825                 hdac_audio_ctl_dest_amp(devinfo, w->conns[i], ossdev,
5826                     depth + 1, tneed);
5827         }
5828 }
5829
5830 /*
5831  * Assign OSS names to sound sources
5832  */
5833 static void
5834 hdac_audio_assign_names(struct hdac_devinfo *devinfo)
5835 {
5836         struct hdac_audio_as *as = devinfo->function.audio.as;
5837         struct hdac_widget *w;
5838         int i, j;
5839         int type = -1, use, used = 0;
5840         static const int types[7][13] = {
5841             { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2,
5842               SOUND_MIXER_LINE3, -1 },  /* line */
5843             { SOUND_MIXER_MONITOR, SOUND_MIXER_MIC, -1 }, /* int mic */
5844             { SOUND_MIXER_MIC, SOUND_MIXER_MONITOR, -1 }, /* ext mic */
5845             { SOUND_MIXER_CD, -1 },     /* cd */
5846             { SOUND_MIXER_SPEAKER, -1 },        /* speaker */
5847             { SOUND_MIXER_DIGITAL1, SOUND_MIXER_DIGITAL2, SOUND_MIXER_DIGITAL3,
5848               -1 },     /* digital */
5849             { SOUND_MIXER_LINE, SOUND_MIXER_LINE1, SOUND_MIXER_LINE2,
5850               SOUND_MIXER_LINE3, SOUND_MIXER_PHONEIN, SOUND_MIXER_PHONEOUT,
5851               SOUND_MIXER_VIDEO, SOUND_MIXER_RADIO, SOUND_MIXER_DIGITAL1,
5852               SOUND_MIXER_DIGITAL2, SOUND_MIXER_DIGITAL3, SOUND_MIXER_MONITOR,
5853               -1 }      /* others */
5854         };
5855
5856         /* Surely known names */
5857         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5858                 w = hdac_widget_get(devinfo, i);
5859                 if (w == NULL || w->enable == 0)
5860                         continue;
5861                 if (w->bindas == -1)
5862                         continue;
5863                 use = -1;
5864                 switch (w->type) {
5865                 case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
5866                         if (as[w->bindas].dir == HDA_CTL_OUT)
5867                                 break;
5868                         type = -1;
5869                         switch (w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
5870                         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
5871                                 type = 0;
5872                                 break;
5873                         case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
5874                                 if ((w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK)
5875                                     == HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
5876                                         break;
5877                                 type = 1;
5878                                 break;
5879                         case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
5880                                 type = 3;
5881                                 break;
5882                         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
5883                                 type = 4;
5884                                 break;
5885                         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN:
5886                         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN:
5887                                 type = 5;
5888                                 break;
5889                         }
5890                         if (type == -1)
5891                                 break;
5892                         j = 0;
5893                         while (types[type][j] >= 0 &&
5894                             (used & (1 << types[type][j])) != 0) {
5895                                 j++;
5896                         }
5897                         if (types[type][j] >= 0)
5898                                 use = types[type][j];
5899                         break;
5900                 case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
5901                         use = SOUND_MIXER_PCM;
5902                         break;
5903                 case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
5904                         use = SOUND_MIXER_SPEAKER;
5905                         break;
5906                 default:
5907                         break;
5908                 }
5909                 if (use >= 0) {
5910                         w->ossdev = use;
5911                         used |= (1 << use);
5912                 }
5913         }
5914         /* Semi-known names */
5915         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5916                 w = hdac_widget_get(devinfo, i);
5917                 if (w == NULL || w->enable == 0)
5918                         continue;
5919                 if (w->ossdev >= 0)
5920                         continue;
5921                 if (w->bindas == -1)
5922                         continue;
5923                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5924                         continue;
5925                 if (as[w->bindas].dir == HDA_CTL_OUT)
5926                         continue;
5927                 type = -1;
5928                 switch (w->wclass.pin.config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
5929                 case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT:
5930                 case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
5931                 case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT:
5932                 case HDA_CONFIG_DEFAULTCONF_DEVICE_AUX:
5933                         type = 0;
5934                         break;
5935                 case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
5936                         type = 2;
5937                         break;
5938                 case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT:
5939                 case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT:
5940                         type = 5;
5941                         break;
5942                 }
5943                 if (type == -1)
5944                         break;
5945                 j = 0;
5946                 while (types[type][j] >= 0 &&
5947                     (used & (1 << types[type][j])) != 0) {
5948                         j++;
5949                 }
5950                 if (types[type][j] >= 0) {
5951                         w->ossdev = types[type][j];
5952                         used |= (1 << types[type][j]);
5953                 }
5954         }
5955         /* Others */
5956         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5957                 w = hdac_widget_get(devinfo, i);
5958                 if (w == NULL || w->enable == 0)
5959                         continue;
5960                 if (w->ossdev >= 0)
5961                         continue;
5962                 if (w->bindas == -1)
5963                         continue;
5964                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5965                         continue;
5966                 if (as[w->bindas].dir == HDA_CTL_OUT)
5967                         continue;
5968                 j = 0;
5969                 while (types[6][j] >= 0 &&
5970                     (used & (1 << types[6][j])) != 0) {
5971                         j++;
5972                 }
5973                 if (types[6][j] >= 0) {
5974                         w->ossdev = types[6][j];
5975                         used |= (1 << types[6][j]);
5976                 }
5977         }
5978 }
5979
5980 static void
5981 hdac_audio_build_tree(struct hdac_devinfo *devinfo)
5982 {
5983         struct hdac_audio_as *as = devinfo->function.audio.as;
5984         int j, res;
5985
5986         /* Trace all associations in order of their numbers, */
5987         for (j = 0; j < devinfo->function.audio.ascnt; j++) {
5988                 if (as[j].enable == 0)
5989                         continue;
5990                 HDA_BOOTVERBOSE(
5991                         device_printf(devinfo->codec->sc->dev,
5992                             "Tracing association %d (%d)\n", j, as[j].index);
5993                 );
5994                 if (as[j].dir == HDA_CTL_OUT) {
5995 retry:
5996                         res = hdac_audio_trace_as_out(devinfo, j, 0);
5997                         if (res == 0 && as[j].hpredir >= 0 &&
5998                             as[j].fakeredir == 0) {
5999                                 /* If codec can't do analog HP redirection
6000                                    try to make it using one more DAC. */
6001                                 as[j].fakeredir = 1;
6002                                 goto retry;
6003                         }
6004                 } else {
6005                         res = hdac_audio_trace_as_in(devinfo, j);
6006                 }
6007                 if (res) {
6008                         HDA_BOOTVERBOSE(
6009                                 device_printf(devinfo->codec->sc->dev,
6010                                     "Association %d (%d) trace succeeded\n",
6011                                     j, as[j].index);
6012                         );
6013                 } else {
6014                         HDA_BOOTVERBOSE(
6015                                 device_printf(devinfo->codec->sc->dev,
6016                                     "Association %d (%d) trace failed\n",
6017                                     j, as[j].index);
6018                         );
6019                         as[j].enable = 0;
6020                 }
6021         }
6022
6023         /* Trace mixer and beeper pseudo associations. */
6024         hdac_audio_trace_as_extra(devinfo);
6025 }
6026
6027 static void
6028 hdac_audio_assign_mixers(struct hdac_devinfo *devinfo)
6029 {
6030         struct hdac_audio_as *as = devinfo->function.audio.as;
6031         struct hdac_audio_ctl *ctl;
6032         struct hdac_widget *w;
6033         int i;
6034
6035         /* Assign mixers to the tree. */
6036         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6037                 w = hdac_widget_get(devinfo, i);
6038                 if (w == NULL || w->enable == 0)
6039                         continue;
6040                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
6041                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET ||
6042                     (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6043                     as[w->bindas].dir == HDA_CTL_IN)) {
6044                         if (w->ossdev < 0)
6045                                 continue;
6046                         hdac_audio_ctl_source_amp(devinfo, w->nid, -1,
6047                             w->ossdev, 1, 0, 1);
6048                 } else if ((w->pflags & HDA_ADC_MONITOR) != 0) {
6049                         if (w->ossdev < 0)
6050                                 continue;
6051                         if (hdac_audio_ctl_source_amp(devinfo, w->nid, -1,
6052                             w->ossdev, 1, 0, 1)) {
6053                                 /* If we are unable to control input monitor
6054                                    as source - try to control it as destination. */
6055                                 hdac_audio_ctl_dest_amp(devinfo, w->nid,
6056                                     w->ossdev, 0, 1);
6057                         }
6058                 } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
6059                         hdac_audio_ctl_dest_amp(devinfo, w->nid,
6060                             SOUND_MIXER_RECLEV, 0, 1);
6061                 } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6062                     as[w->bindas].dir == HDA_CTL_OUT) {
6063                         hdac_audio_ctl_dest_amp(devinfo, w->nid,
6064                             SOUND_MIXER_VOLUME, 0, 1);
6065                 }
6066         }
6067         /* Treat unrequired as possible. */
6068         i = 0;
6069         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6070                 if (ctl->ossmask == 0)
6071                         ctl->ossmask = ctl->possmask;
6072         }
6073 }
6074
6075 static void
6076 hdac_audio_prepare_pin_ctrl(struct hdac_devinfo *devinfo)
6077 {
6078         struct hdac_audio_as *as = devinfo->function.audio.as;
6079         struct hdac_widget *w;
6080         uint32_t pincap;
6081         int i;
6082
6083         for (i = 0; i < devinfo->nodecnt; i++) {
6084                 w = &devinfo->widget[i];
6085                 if (w == NULL)
6086                         continue;
6087                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6088                         continue;
6089
6090                 pincap = w->wclass.pin.cap;
6091
6092                 /* Disable everything. */
6093                 w->wclass.pin.ctrl &= ~(
6094                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
6095                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
6096                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
6097                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
6098
6099                 if (w->enable == 0 ||
6100                     w->bindas < 0 || as[w->bindas].enable == 0) {
6101                         /* Pin is unused so left it disabled. */
6102                         continue;
6103                 } else if (as[w->bindas].dir == HDA_CTL_IN) {
6104                         /* Input pin, configure for input. */
6105                         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
6106                                 w->wclass.pin.ctrl |=
6107                                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
6108
6109                         if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF100) &&
6110                             HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
6111                                 w->wclass.pin.ctrl |=
6112                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6113                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
6114                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF80) &&
6115                             HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
6116                                 w->wclass.pin.ctrl |=
6117                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6118                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
6119                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF50) &&
6120                             HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
6121                                 w->wclass.pin.ctrl |=
6122                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6123                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
6124                 } else {
6125                         /* Output pin, configure for output. */
6126                         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
6127                                 w->wclass.pin.ctrl |=
6128                                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
6129
6130                         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap) &&
6131                             (w->wclass.pin.config &
6132                             HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) ==
6133                             HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT)
6134                                 w->wclass.pin.ctrl |=
6135                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
6136
6137                         if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF100) &&
6138                             HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
6139                                 w->wclass.pin.ctrl |=
6140                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6141                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
6142                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF80) &&
6143                             HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
6144                                 w->wclass.pin.ctrl |=
6145                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6146                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
6147                         else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF50) &&
6148                             HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
6149                                 w->wclass.pin.ctrl |=
6150                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
6151                                     HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
6152                 }
6153         }
6154 }
6155
6156 static void
6157 hdac_audio_ctl_commit(struct hdac_devinfo *devinfo)
6158 {
6159         struct hdac_audio_ctl *ctl;
6160         int i, z;
6161
6162         i = 0;
6163         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6164                 if (ctl->enable == 0 || ctl->ossmask != 0) {
6165                         /* Mute disabled and mixer controllable controls.
6166                          * Last will be initialized by mixer_init().
6167                          * This expected to reduce click on startup. */
6168                         hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_ALL, 0, 0);
6169                         continue;
6170                 }
6171                 /* Init fixed controls to 0dB amplification. */
6172                 z = ctl->offset;
6173                 if (z > ctl->step)
6174                         z = ctl->step;
6175                 hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_NONE, z, z);
6176         }
6177 }
6178
6179 static void
6180 hdac_audio_commit(struct hdac_devinfo *devinfo)
6181 {
6182         struct hdac_softc *sc = devinfo->codec->sc;
6183         struct hdac_widget *w;
6184         nid_t cad;
6185         uint32_t gdata, gmask, gdir;
6186         int commitgpio, numgpio;
6187         int i;
6188
6189         cad = devinfo->codec->cad;
6190
6191         if (sc->pci_subvendor == APPLE_INTEL_MAC)
6192                 hdac_command(sc, HDA_CMD_12BIT(cad, devinfo->nid,
6193                     0x7e7, 0), cad);
6194
6195         /* Commit controls. */
6196         hdac_audio_ctl_commit(devinfo);
6197
6198         /* Commit selectors, pins and EAPD. */
6199         for (i = 0; i < devinfo->nodecnt; i++) {
6200                 w = &devinfo->widget[i];
6201                 if (w == NULL)
6202                         continue;
6203                 if (w->selconn == -1)
6204                         w->selconn = 0;
6205                 if (w->nconns > 0)
6206                         hdac_widget_connection_select(w, w->selconn);
6207                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
6208                         hdac_command(sc,
6209                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad, w->nid,
6210                             w->wclass.pin.ctrl), cad);
6211                 }
6212                 if (w->param.eapdbtl != HDAC_INVALID) {
6213                         uint32_t val;
6214
6215                         val = w->param.eapdbtl;
6216                         if (devinfo->function.audio.quirks &
6217                             HDA_QUIRK_EAPDINV)
6218                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
6219                         hdac_command(sc,
6220                             HDA_CMD_SET_EAPD_BTL_ENABLE(cad, w->nid,
6221                             val), cad);
6222                 }
6223         }
6224
6225         /* Commit GPIOs. */
6226         gdata = 0;
6227         gmask = 0;
6228         gdir = 0;
6229         commitgpio = 0;
6230         numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(
6231             devinfo->function.audio.gpio);
6232
6233         if (devinfo->function.audio.quirks & HDA_QUIRK_GPIOFLUSH)
6234                 commitgpio = (numgpio > 0) ? 1 : 0;
6235         else {
6236                 for (i = 0; i < numgpio && i < HDA_GPIO_MAX; i++) {
6237                         if (!(devinfo->function.audio.quirks &
6238                             (1 << i)))
6239                                 continue;
6240                         if (commitgpio == 0) {
6241                                 commitgpio = 1;
6242                                 HDA_BOOTVERBOSE(
6243                                         gdata = hdac_command(sc,
6244                                             HDA_CMD_GET_GPIO_DATA(cad,
6245                                             devinfo->nid), cad);
6246                                         gmask = hdac_command(sc,
6247                                             HDA_CMD_GET_GPIO_ENABLE_MASK(cad,
6248                                             devinfo->nid), cad);
6249                                         gdir = hdac_command(sc,
6250                                             HDA_CMD_GET_GPIO_DIRECTION(cad,
6251                                             devinfo->nid), cad);
6252                                         device_printf(sc->dev,
6253                                             "GPIO init: data=0x%08x "
6254                                             "mask=0x%08x dir=0x%08x\n",
6255                                             gdata, gmask, gdir);
6256                                         gdata = 0;
6257                                         gmask = 0;
6258                                         gdir = 0;
6259                                 );
6260                         }
6261                         gdata |= 1 << i;
6262                         gmask |= 1 << i;
6263                         gdir |= 1 << i;
6264                 }
6265         }
6266
6267         if (commitgpio != 0) {
6268                 HDA_BOOTVERBOSE(
6269                         device_printf(sc->dev,
6270                             "GPIO commit: data=0x%08x mask=0x%08x "
6271                             "dir=0x%08x\n",
6272                             gdata, gmask, gdir);
6273                 );
6274                 hdac_command(sc,
6275                     HDA_CMD_SET_GPIO_ENABLE_MASK(cad, devinfo->nid,
6276                     gmask), cad);
6277                 hdac_command(sc,
6278                     HDA_CMD_SET_GPIO_DIRECTION(cad, devinfo->nid,
6279                     gdir), cad);
6280                 hdac_command(sc,
6281                     HDA_CMD_SET_GPIO_DATA(cad, devinfo->nid,
6282                     gdata), cad);
6283         }
6284 }
6285
6286 static void
6287 hdac_powerup(struct hdac_devinfo *devinfo)
6288 {
6289         struct hdac_softc *sc = devinfo->codec->sc;
6290         nid_t cad = devinfo->codec->cad;
6291         int i;
6292
6293         hdac_command(sc,
6294             HDA_CMD_SET_POWER_STATE(cad,
6295             devinfo->nid, HDA_CMD_POWER_STATE_D0),
6296             cad);
6297         DELAY(100);
6298
6299         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6300                 hdac_command(sc,
6301                     HDA_CMD_SET_POWER_STATE(cad,
6302                     i, HDA_CMD_POWER_STATE_D0),
6303                     cad);
6304         }
6305         DELAY(1000);
6306 }
6307
6308 static int
6309 hdac_pcmchannel_setup(struct hdac_chan *ch)
6310 {
6311         struct hdac_devinfo *devinfo = ch->devinfo;
6312         struct hdac_audio_as *as = devinfo->function.audio.as;
6313         struct hdac_widget *w;
6314         uint32_t cap, fmtcap, pcmcap;
6315         int i, j, ret, max;
6316
6317         ch->caps = hdac_caps;
6318         ch->caps.fmtlist = ch->fmtlist;
6319         ch->bit16 = 1;
6320         ch->bit32 = 0;
6321         ch->pcmrates[0] = 48000;
6322         ch->pcmrates[1] = 0;
6323
6324         ret = 0;
6325         fmtcap = devinfo->function.audio.supp_stream_formats;
6326         pcmcap = devinfo->function.audio.supp_pcm_size_rate;
6327         max = (sizeof(ch->io) / sizeof(ch->io[0])) - 1;
6328
6329         for (i = 0; i < 16 && ret < max; i++) {
6330                 /* Check as is correct */
6331                 if (ch->as < 0)
6332                         break;
6333                 /* Cound only present DACs */
6334                 if (as[ch->as].dacs[i] <= 0)
6335                         continue;
6336                 /* Ignore duplicates */
6337                 for (j = 0; j < ret; j++) {
6338                         if (ch->io[j] == as[ch->as].dacs[i])
6339                                 break;
6340                 }
6341                 if (j < ret)
6342                         continue;
6343
6344                 w = hdac_widget_get(devinfo, as[ch->as].dacs[i]);
6345                 if (w == NULL || w->enable == 0)
6346                         continue;
6347                 if (!HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap))
6348                         continue;
6349                 cap = w->param.supp_stream_formats;
6350                 /*if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap)) {
6351                 }*/
6352                 if (!HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap) &&
6353                     !HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
6354                         continue;
6355                 /* Many codec does not declare AC3 support on SPDIF.
6356                    I don't beleave that they doesn't support it! */
6357                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6358                         cap |= HDA_PARAM_SUPP_STREAM_FORMATS_AC3_MASK;
6359                 if (ret == 0) {
6360                         fmtcap = cap;
6361                         pcmcap = w->param.supp_pcm_size_rate;
6362                 } else {
6363                         fmtcap &= cap;
6364                         pcmcap &= w->param.supp_pcm_size_rate;
6365                 }
6366                 ch->io[ret++] = as[ch->as].dacs[i];
6367         }
6368         ch->io[ret] = -1;
6369
6370         ch->supp_stream_formats = fmtcap;
6371         ch->supp_pcm_size_rate = pcmcap;
6372
6373         /*
6374          *  8bit = 0
6375          * 16bit = 1
6376          * 20bit = 2
6377          * 24bit = 3
6378          * 32bit = 4
6379          */
6380         if (ret > 0) {
6381                 i = 0;
6382                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(fmtcap)) {
6383                         if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(pcmcap))
6384                                 ch->bit16 = 1;
6385                         else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(pcmcap))
6386                                 ch->bit16 = 0;
6387                         if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(pcmcap))
6388                                 ch->bit32 = 4;
6389                         else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(pcmcap))
6390                                 ch->bit32 = 3;
6391                         else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(pcmcap))
6392                                 ch->bit32 = 2;
6393                         if (!(devinfo->function.audio.quirks & HDA_QUIRK_FORCESTEREO))
6394                                 ch->fmtlist[i++] = AFMT_S16_LE;
6395                         ch->fmtlist[i++] = AFMT_S16_LE | AFMT_STEREO;
6396                         if (ch->bit32 > 0) {
6397                                 if (!(devinfo->function.audio.quirks &
6398                                     HDA_QUIRK_FORCESTEREO))
6399                                         ch->fmtlist[i++] = AFMT_S32_LE;
6400                                 ch->fmtlist[i++] = AFMT_S32_LE | AFMT_STEREO;
6401                         }
6402                 }
6403                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(fmtcap)) {
6404                         ch->fmtlist[i++] = AFMT_AC3;
6405                 }
6406                 ch->fmtlist[i] = 0;
6407                 i = 0;
6408                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(pcmcap))
6409                         ch->pcmrates[i++] = 8000;
6410                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(pcmcap))
6411                         ch->pcmrates[i++] = 11025;
6412                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(pcmcap))
6413                         ch->pcmrates[i++] = 16000;
6414                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(pcmcap))
6415                         ch->pcmrates[i++] = 22050;
6416                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(pcmcap))
6417                         ch->pcmrates[i++] = 32000;
6418                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(pcmcap))
6419                         ch->pcmrates[i++] = 44100;
6420                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(pcmcap)) */
6421                 ch->pcmrates[i++] = 48000;
6422                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(pcmcap))
6423                         ch->pcmrates[i++] = 88200;
6424                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(pcmcap))
6425                         ch->pcmrates[i++] = 96000;
6426                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(pcmcap))
6427                         ch->pcmrates[i++] = 176400;
6428                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(pcmcap))
6429                         ch->pcmrates[i++] = 192000;
6430                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(pcmcap)) */
6431                 ch->pcmrates[i] = 0;
6432                 if (i > 0) {
6433                         ch->caps.minspeed = ch->pcmrates[0];
6434                         ch->caps.maxspeed = ch->pcmrates[i - 1];
6435                 }
6436         }
6437
6438         return (ret);
6439 }
6440
6441 static void
6442 hdac_create_pcms(struct hdac_devinfo *devinfo)
6443 {
6444         struct hdac_softc *sc = devinfo->codec->sc;
6445         struct hdac_audio_as *as = devinfo->function.audio.as;
6446         int i, j, apdev = 0, ardev = 0, dpdev = 0, drdev = 0;
6447
6448         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
6449                 if (as[i].enable == 0)
6450                         continue;
6451                 if (as[i].dir == HDA_CTL_IN) {
6452                         if (as[i].digital)
6453                                 drdev++;
6454                         else
6455                                 ardev++;
6456                 } else {
6457                         if (as[i].digital)
6458                                 dpdev++;
6459                         else
6460                                 apdev++;
6461                 }
6462         }
6463         devinfo->function.audio.num_devs =
6464             max(ardev, apdev) + max(drdev, dpdev);
6465         devinfo->function.audio.devs =
6466             (struct hdac_pcm_devinfo *)malloc(
6467             devinfo->function.audio.num_devs * sizeof(struct hdac_pcm_devinfo),
6468             M_HDAC, M_ZERO | M_NOWAIT);
6469         if (devinfo->function.audio.devs == NULL) {
6470                 device_printf(sc->dev,
6471                     "Unable to allocate memory for devices\n");
6472                 return;
6473         }
6474         for (i = 0; i < devinfo->function.audio.num_devs; i++) {
6475                 devinfo->function.audio.devs[i].index = i;
6476                 devinfo->function.audio.devs[i].devinfo = devinfo;
6477                 devinfo->function.audio.devs[i].play = -1;
6478                 devinfo->function.audio.devs[i].rec = -1;
6479                 devinfo->function.audio.devs[i].digital = 2;
6480         }
6481         for (i = 0; i < devinfo->function.audio.ascnt; i++) {
6482                 if (as[i].enable == 0)
6483                         continue;
6484                 for (j = 0; j < devinfo->function.audio.num_devs; j++) {
6485                         if (devinfo->function.audio.devs[j].digital != 2 &&
6486                             devinfo->function.audio.devs[j].digital !=
6487                             as[i].digital)
6488                                 continue;
6489                         if (as[i].dir == HDA_CTL_IN) {
6490                                 if (devinfo->function.audio.devs[j].rec >= 0)
6491                                         continue;
6492                                 devinfo->function.audio.devs[j].rec
6493                                     = as[i].chan;
6494                         } else {
6495                                 if (devinfo->function.audio.devs[j].play >= 0)
6496                                         continue;
6497                                 devinfo->function.audio.devs[j].play
6498                                     = as[i].chan;
6499                         }
6500                         sc->chans[as[i].chan].pdevinfo =
6501                             &devinfo->function.audio.devs[j];
6502                         devinfo->function.audio.devs[j].digital =
6503                             as[i].digital;
6504                         break;
6505                 }
6506         }
6507         for (i = 0; i < devinfo->function.audio.num_devs; i++) {
6508                 struct hdac_pcm_devinfo *pdevinfo =
6509                     &devinfo->function.audio.devs[i];
6510                 pdevinfo->dev =
6511                     device_add_child(sc->dev, "pcm", -1);
6512                 device_set_ivars(pdevinfo->dev,
6513                      (void *)pdevinfo);
6514         }
6515 }
6516
6517 static void
6518 hdac_dump_ctls(struct hdac_pcm_devinfo *pdevinfo, const char *banner, uint32_t flag)
6519 {
6520         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
6521         struct hdac_audio_ctl *ctl;
6522         struct hdac_softc *sc = devinfo->codec->sc;
6523         char buf[64];
6524         int i, j, printed;
6525
6526         if (flag == 0) {
6527                 flag = ~(SOUND_MASK_VOLUME | SOUND_MASK_PCM |
6528                     SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV |
6529                     SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_OGAIN |
6530                     SOUND_MASK_IMIX | SOUND_MASK_MONITOR);
6531         }
6532
6533         for (j = 0; j < SOUND_MIXER_NRDEVICES; j++) {
6534                 if ((flag & (1 << j)) == 0)
6535                         continue;
6536                 i = 0;
6537                 printed = 0;
6538                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6539                         if (ctl->enable == 0 ||
6540                             ctl->widget->enable == 0)
6541                                 continue;
6542                         if (!((pdevinfo->play >= 0 &&
6543                             ctl->widget->bindas == sc->chans[pdevinfo->play].as) ||
6544                             (pdevinfo->rec >= 0 &&
6545                             ctl->widget->bindas == sc->chans[pdevinfo->rec].as) ||
6546                             (ctl->widget->bindas == -2 && pdevinfo->index == 0)))
6547                                 continue;
6548                         if ((ctl->ossmask & (1 << j)) == 0)
6549                                 continue;
6550
6551                         if (printed == 0) {
6552                                 device_printf(pdevinfo->dev, "\n");
6553                                 if (banner != NULL) {
6554                                         device_printf(pdevinfo->dev, "%s", banner);
6555                                 } else {
6556                                         device_printf(pdevinfo->dev, "Unknown Ctl");
6557                                 }
6558                                 printf(" (OSS: %s)\n",
6559                                     hdac_audio_ctl_ossmixer_mask2allname(1 << j,
6560                                     buf, sizeof(buf)));
6561                                 device_printf(pdevinfo->dev, "   |\n");
6562                                 printed = 1;
6563                         }
6564                         device_printf(pdevinfo->dev, "   +- ctl %2d (nid %3d %s", i,
6565                                 ctl->widget->nid,
6566                                 (ctl->ndir == HDA_CTL_IN)?"in ":"out");
6567                         if (ctl->ndir == HDA_CTL_IN && ctl->ndir == ctl->dir)
6568                                 printf(" %2d): ", ctl->index);
6569                         else
6570                                 printf("):    ");
6571                         if (ctl->step > 0) {
6572                                 printf("%+d/%+ddB (%d steps)%s\n",
6573                                     (0 - ctl->offset) * (ctl->size + 1) / 4,
6574                                     (ctl->step - ctl->offset) * (ctl->size + 1) / 4,
6575                                     ctl->step + 1,
6576                                     ctl->mute?" + mute":"");
6577                         } else
6578                                 printf("%s\n", ctl->mute?"mute":"");
6579                 }
6580         }
6581 }
6582
6583 static void
6584 hdac_dump_audio_formats(device_t dev, uint32_t fcap, uint32_t pcmcap)
6585 {
6586         uint32_t cap;
6587
6588         cap = fcap;
6589         if (cap != 0) {
6590                 device_printf(dev, "     Stream cap: 0x%08x\n", cap);
6591                 device_printf(dev, "                ");
6592                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
6593                         printf(" AC3");
6594                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap))
6595                         printf(" FLOAT32");
6596                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
6597                         printf(" PCM");
6598                 printf("\n");
6599         }
6600         cap = pcmcap;
6601         if (cap != 0) {
6602                 device_printf(dev, "        PCM cap: 0x%08x\n", cap);
6603                 device_printf(dev, "                ");
6604                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
6605                         printf(" 8");
6606                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
6607                         printf(" 16");
6608                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
6609                         printf(" 20");
6610                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
6611                         printf(" 24");
6612                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
6613                         printf(" 32");
6614                 printf(" bits,");
6615                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
6616                         printf(" 8");
6617                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
6618                         printf(" 11");
6619                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
6620                         printf(" 16");
6621                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
6622                         printf(" 22");
6623                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
6624                         printf(" 32");
6625                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
6626                         printf(" 44");
6627                 printf(" 48");
6628                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
6629                         printf(" 88");
6630                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
6631                         printf(" 96");
6632                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
6633                         printf(" 176");
6634                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
6635                         printf(" 192");
6636                 printf(" KHz\n");
6637         }
6638 }
6639
6640 static void
6641 hdac_dump_pin(struct hdac_softc *sc, struct hdac_widget *w)
6642 {
6643         uint32_t pincap;
6644
6645         pincap = w->wclass.pin.cap;
6646
6647         device_printf(sc->dev, "        Pin cap: 0x%08x\n", pincap);
6648         device_printf(sc->dev, "                ");
6649         if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap))
6650                 printf(" ISC");
6651         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap))
6652                 printf(" TRQD");
6653         if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap))
6654                 printf(" PDC");
6655         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
6656                 printf(" HP");
6657         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
6658                 printf(" OUT");
6659         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
6660                 printf(" IN");
6661         if (HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(pincap))
6662                 printf(" BAL");
6663         if (HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)) {
6664                 printf(" VREF[");
6665                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
6666                         printf(" 50");
6667                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
6668                         printf(" 80");
6669                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
6670                         printf(" 100");
6671                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(pincap))
6672                         printf(" GROUND");
6673                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(pincap))
6674                         printf(" HIZ");
6675                 printf(" ]");
6676         }
6677         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap))
6678                 printf(" EAPD");
6679         printf("\n");
6680         device_printf(sc->dev, "     Pin config: 0x%08x\n",
6681             w->wclass.pin.config);
6682         device_printf(sc->dev, "    Pin control: 0x%08x", w->wclass.pin.ctrl);
6683         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE)
6684                 printf(" HP");
6685         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE)
6686                 printf(" IN");
6687         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE)
6688                 printf(" OUT");
6689         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK)
6690                 printf(" VREFs");
6691         printf("\n");
6692 }
6693
6694 static void
6695 hdac_dump_pin_config(struct hdac_widget *w, uint32_t conf)
6696 {
6697         struct hdac_softc *sc = w->devinfo->codec->sc;
6698
6699         device_printf(sc->dev, " nid %d 0x%08x as %2d seq %2d %13s %5s "
6700             "jack %2d loc %2d color %7s misc %d%s\n",
6701             w->nid, conf,
6702             HDA_CONFIG_DEFAULTCONF_ASSOCIATION(conf),
6703             HDA_CONFIG_DEFAULTCONF_SEQUENCE(conf),
6704             HDA_DEVS[HDA_CONFIG_DEFAULTCONF_DEVICE(conf)],
6705             HDA_CONNS[HDA_CONFIG_DEFAULTCONF_CONNECTIVITY(conf)],
6706             HDA_CONFIG_DEFAULTCONF_CONNECTION_TYPE(conf),
6707             HDA_CONFIG_DEFAULTCONF_LOCATION(conf),
6708             HDA_COLORS[HDA_CONFIG_DEFAULTCONF_COLOR(conf)],
6709             HDA_CONFIG_DEFAULTCONF_MISC(conf),
6710             (w->enable == 0)?" [DISABLED]":"");
6711 }
6712
6713 static void
6714 hdac_dump_pin_configs(struct hdac_devinfo *devinfo)
6715 {
6716         struct hdac_widget *w;
6717         int i;
6718
6719         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6720                 w = hdac_widget_get(devinfo, i);
6721                 if (w == NULL)
6722                         continue;
6723                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6724                         continue;
6725                 hdac_dump_pin_config(w, w->wclass.pin.config);
6726         }
6727 }
6728
6729 static void
6730 hdac_dump_amp(struct hdac_softc *sc, uint32_t cap, char *banner)
6731 {
6732         device_printf(sc->dev, "     %s amp: 0x%08x\n", banner, cap);
6733         device_printf(sc->dev, "                 "
6734             "mute=%d step=%d size=%d offset=%d\n",
6735             HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap),
6736             HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap),
6737             HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap),
6738             HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap));
6739 }
6740
6741 static void
6742 hdac_dump_nodes(struct hdac_devinfo *devinfo)
6743 {
6744         struct hdac_softc *sc = devinfo->codec->sc;
6745         static char *ossname[] = SOUND_DEVICE_NAMES;
6746         struct hdac_widget *w, *cw;
6747         char buf[64];
6748         int i, j;
6749
6750         device_printf(sc->dev, "\n");
6751         device_printf(sc->dev, "Default Parameter\n");
6752         device_printf(sc->dev, "-----------------\n");
6753         hdac_dump_audio_formats(sc->dev,
6754             devinfo->function.audio.supp_stream_formats,
6755             devinfo->function.audio.supp_pcm_size_rate);
6756         device_printf(sc->dev, "         IN amp: 0x%08x\n",
6757             devinfo->function.audio.inamp_cap);
6758         device_printf(sc->dev, "        OUT amp: 0x%08x\n",
6759             devinfo->function.audio.outamp_cap);
6760         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6761                 w = hdac_widget_get(devinfo, i);
6762                 if (w == NULL) {
6763                         device_printf(sc->dev, "Ghost widget nid=%d\n", i);
6764                         continue;
6765                 }
6766                 device_printf(sc->dev, "\n");
6767                 device_printf(sc->dev, "            nid: %d%s\n", w->nid,
6768                     (w->enable == 0) ? " [DISABLED]" : "");
6769                 device_printf(sc->dev, "           Name: %s\n", w->name);
6770                 device_printf(sc->dev, "     Widget cap: 0x%08x\n",
6771                     w->param.widget_cap);
6772                 if (w->param.widget_cap & 0x0ee1) {
6773                         device_printf(sc->dev, "                ");
6774                         if (HDA_PARAM_AUDIO_WIDGET_CAP_LR_SWAP(w->param.widget_cap))
6775                             printf(" LRSWAP");
6776                         if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(w->param.widget_cap))
6777                             printf(" PWR");
6778                         if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6779                             printf(" DIGITAL");
6780                         if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap))
6781                             printf(" UNSOL");
6782                         if (HDA_PARAM_AUDIO_WIDGET_CAP_PROC_WIDGET(w->param.widget_cap))
6783                             printf(" PROC");
6784                         if (HDA_PARAM_AUDIO_WIDGET_CAP_STRIPE(w->param.widget_cap))
6785                             printf(" STRIPE");
6786                         if (HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap))
6787                             printf(" STEREO");
6788                         printf("\n");
6789                 }
6790                 if (w->bindas != -1) {
6791                         device_printf(sc->dev, "    Association: %d (0x%08x)\n",
6792                             w->bindas, w->bindseqmask);
6793                 }
6794                 if (w->ossmask != 0 || w->ossdev >= 0) {
6795                         device_printf(sc->dev, "            OSS: %s",
6796                             hdac_audio_ctl_ossmixer_mask2allname(w->ossmask, buf, sizeof(buf)));
6797                         if (w->ossdev >= 0)
6798                             printf(" (%s)", ossname[w->ossdev]);
6799                         printf("\n");
6800                 }
6801                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
6802                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
6803                         hdac_dump_audio_formats(sc->dev,
6804                             w->param.supp_stream_formats,
6805                             w->param.supp_pcm_size_rate);
6806                 } else if (w->type ==
6807                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6808                         hdac_dump_pin(sc, w);
6809                 if (w->param.eapdbtl != HDAC_INVALID)
6810                         device_printf(sc->dev, "           EAPD: 0x%08x\n",
6811                             w->param.eapdbtl);
6812                 if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) &&
6813                     w->param.outamp_cap != 0)
6814                         hdac_dump_amp(sc, w->param.outamp_cap, "Output");
6815                 if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) &&
6816                     w->param.inamp_cap != 0)
6817                         hdac_dump_amp(sc, w->param.inamp_cap, " Input");
6818                 if (w->nconns > 0) {
6819                         device_printf(sc->dev, "    connections: %d\n", w->nconns);
6820                         device_printf(sc->dev, "          |\n");
6821                 }
6822                 for (j = 0; j < w->nconns; j++) {
6823                         cw = hdac_widget_get(devinfo, w->conns[j]);
6824                         device_printf(sc->dev, "          + %s<- nid=%d [%s]",
6825                             (w->connsenable[j] == 0)?"[DISABLED] ":"",
6826                             w->conns[j], (cw == NULL) ? "GHOST!" : cw->name);
6827                         if (cw == NULL)
6828                                 printf(" [UNKNOWN]");
6829                         else if (cw->enable == 0)
6830                                 printf(" [DISABLED]");
6831                         if (w->nconns > 1 && w->selconn == j && w->type !=
6832                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
6833                                 printf(" (selected)");
6834                         printf("\n");
6835                 }
6836         }
6837
6838 }
6839
6840 static void
6841 hdac_dump_dst_nid(struct hdac_pcm_devinfo *pdevinfo, nid_t nid, int depth)
6842 {
6843         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
6844         struct hdac_widget *w, *cw;
6845         char buf[64];
6846         int i, printed = 0;
6847
6848         if (depth > HDA_PARSE_MAXDEPTH)
6849                 return;
6850
6851         w = hdac_widget_get(devinfo, nid);
6852         if (w == NULL || w->enable == 0)
6853                 return;
6854
6855         if (depth == 0)
6856                 device_printf(pdevinfo->dev, "%*s", 4, "");
6857         else
6858                 device_printf(pdevinfo->dev, "%*s  + <- ", 4 + (depth - 1) * 7, "");
6859         printf("nid=%d [%s]", w->nid, w->name);
6860
6861         if (depth > 0) {
6862                 if (w->ossmask == 0) {
6863                         printf("\n");
6864                         return;
6865                 }
6866                 printf(" [src: %s]",
6867                     hdac_audio_ctl_ossmixer_mask2allname(
6868                         w->ossmask, buf, sizeof(buf)));
6869                 if (w->ossdev >= 0) {
6870                         printf("\n");
6871                         return;
6872                 }
6873         }
6874         printf("\n");
6875
6876         for (i = 0; i < w->nconns; i++) {
6877                 if (w->connsenable[i] == 0)
6878                         continue;
6879                 cw = hdac_widget_get(devinfo, w->conns[i]);
6880                 if (cw == NULL || cw->enable == 0 || cw->bindas == -1)
6881                         continue;
6882                 if (printed == 0) {
6883                         device_printf(pdevinfo->dev, "%*s  |\n", 4 + (depth) * 7, "");
6884                         printed = 1;
6885                 }
6886                 hdac_dump_dst_nid(pdevinfo, w->conns[i], depth + 1);
6887         }
6888
6889 }
6890
6891 static void
6892 hdac_dump_dac(struct hdac_pcm_devinfo *pdevinfo)
6893 {
6894         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
6895         struct hdac_softc *sc = devinfo->codec->sc;
6896         struct hdac_widget *w;
6897         int i, printed = 0;
6898
6899         if (pdevinfo->play < 0)
6900                 return;
6901
6902         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6903                 w = hdac_widget_get(devinfo, i);
6904                 if (w == NULL || w->enable == 0)
6905                         continue;
6906                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6907                         continue;
6908                 if (w->bindas != sc->chans[pdevinfo->play].as)
6909                         continue;
6910                 if (printed == 0) {
6911                         printed = 1;
6912                         device_printf(pdevinfo->dev, "\n");
6913                         device_printf(pdevinfo->dev, "Playback:\n");
6914                 }
6915                 device_printf(pdevinfo->dev, "\n");
6916                 hdac_dump_dst_nid(pdevinfo, i, 0);
6917         }
6918 }
6919
6920 static void
6921 hdac_dump_adc(struct hdac_pcm_devinfo *pdevinfo)
6922 {
6923         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
6924         struct hdac_softc *sc = devinfo->codec->sc;
6925         struct hdac_widget *w;
6926         int i;
6927         int printed = 0;
6928
6929         if (pdevinfo->rec < 0)
6930                 return;
6931
6932         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6933                 w = hdac_widget_get(devinfo, i);
6934                 if (w == NULL || w->enable == 0)
6935                         continue;
6936                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
6937                         continue;
6938                 if (w->bindas != sc->chans[pdevinfo->rec].as)
6939                         continue;
6940                 if (printed == 0) {
6941                         printed = 1;
6942                         device_printf(pdevinfo->dev, "\n");
6943                         device_printf(pdevinfo->dev, "Record:\n");
6944                 }
6945                 device_printf(pdevinfo->dev, "\n");
6946                 hdac_dump_dst_nid(pdevinfo, i, 0);
6947         }
6948 }
6949
6950 static void
6951 hdac_dump_mix(struct hdac_pcm_devinfo *pdevinfo)
6952 {
6953         struct hdac_devinfo *devinfo = pdevinfo->devinfo;
6954         struct hdac_widget *w;
6955         int i;
6956         int printed = 0;
6957
6958         if (pdevinfo->index != 0)
6959                 return;
6960
6961         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6962                 w = hdac_widget_get(devinfo, i);
6963                 if (w == NULL || w->enable == 0)
6964                         continue;
6965                 if ((w->pflags & HDA_ADC_MONITOR) == 0)
6966                         continue;
6967                 if (printed == 0) {
6968                         printed = 1;
6969                         device_printf(pdevinfo->dev, "\n");
6970                         device_printf(pdevinfo->dev, "Input Mix:\n");
6971                 }
6972                 device_printf(pdevinfo->dev, "\n");
6973                 hdac_dump_dst_nid(pdevinfo, i, 0);
6974         }
6975 }
6976
6977 static void
6978 hdac_dump_pcmchannels(struct hdac_pcm_devinfo *pdevinfo)
6979 {
6980         struct hdac_softc *sc = pdevinfo->devinfo->codec->sc;
6981         nid_t *nids;
6982         int i;
6983
6984         if (pdevinfo->play >= 0) {
6985                 i = pdevinfo->play;
6986                 device_printf(pdevinfo->dev, "\n");
6987                 device_printf(pdevinfo->dev, "Playback:\n");
6988                 device_printf(pdevinfo->dev, "\n");
6989                 hdac_dump_audio_formats(pdevinfo->dev, sc->chans[i].supp_stream_formats,
6990                     sc->chans[i].supp_pcm_size_rate);
6991                 device_printf(pdevinfo->dev, "            DAC:");
6992                 for (nids = sc->chans[i].io; *nids != -1; nids++)
6993                         printf(" %d", *nids);
6994                 printf("\n");
6995         }
6996         if (pdevinfo->rec >= 0) {
6997                 i = pdevinfo->rec;
6998                 device_printf(pdevinfo->dev, "\n");
6999                 device_printf(pdevinfo->dev, "Record:\n");
7000                 device_printf(pdevinfo->dev, "\n");
7001                 hdac_dump_audio_formats(pdevinfo->dev, sc->chans[i].supp_stream_formats,
7002                     sc->chans[i].supp_pcm_size_rate);
7003                 device_printf(pdevinfo->dev, "            ADC:");
7004                 for (nids = sc->chans[i].io; *nids != -1; nids++)
7005                         printf(" %d", *nids);
7006                 printf("\n");
7007         }
7008 }
7009
7010 static void
7011 hdac_release_resources(struct hdac_softc *sc)
7012 {
7013         int i, j;
7014
7015         if (sc == NULL)
7016                 return;
7017
7018         hdac_lock(sc);
7019         sc->polling = 0;
7020         sc->poll_ival = 0;
7021         callout_stop(&sc->poll_hda);
7022         callout_stop(&sc->poll_hdac);
7023         callout_stop(&sc->poll_jack);
7024         hdac_reset(sc, 0);
7025         hdac_unlock(sc);
7026         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
7027         callout_drain(&sc->poll_hda);
7028         callout_drain(&sc->poll_hdac);
7029         callout_drain(&sc->poll_jack);
7030
7031         hdac_irq_free(sc);
7032
7033         for (i = 0; i < HDAC_CODEC_MAX; i++) {
7034                 if (sc->codecs[i] == NULL)
7035                         continue;
7036                 for (j = 0; j < sc->codecs[i]->num_fgs; j++) {
7037                         free(sc->codecs[i]->fgs[j].widget, M_HDAC);
7038                         if (sc->codecs[i]->fgs[j].node_type ==
7039                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
7040                                 free(sc->codecs[i]->fgs[j].function.audio.ctl,
7041                                     M_HDAC);
7042                                 free(sc->codecs[i]->fgs[j].function.audio.as,
7043                                     M_HDAC);
7044                                 free(sc->codecs[i]->fgs[j].function.audio.devs,
7045                                     M_HDAC);
7046                         }
7047                 }
7048                 free(sc->codecs[i]->fgs, M_HDAC);
7049                 free(sc->codecs[i], M_HDAC);
7050                 sc->codecs[i] = NULL;
7051         }
7052
7053         hdac_dma_free(sc, &sc->pos_dma);
7054         hdac_dma_free(sc, &sc->rirb_dma);
7055         hdac_dma_free(sc, &sc->corb_dma);
7056         for (i = 0; i < sc->num_chans; i++) {
7057                 if (sc->chans[i].blkcnt > 0)
7058                         hdac_dma_free(sc, &sc->chans[i].bdl_dma);
7059         }
7060         free(sc->chans, M_HDAC);
7061         if (sc->chan_dmat != NULL) {
7062                 bus_dma_tag_destroy(sc->chan_dmat);
7063                 sc->chan_dmat = NULL;
7064         }
7065         hdac_mem_free(sc);
7066         snd_mtxfree(sc->lock);
7067 }
7068
7069 /* This function surely going to make its way into upper level someday. */
7070 static void
7071 hdac_config_fetch(struct hdac_softc *sc, uint32_t *on, uint32_t *off)
7072 {
7073         const char *res = NULL;
7074         int i = 0, j, k, len, inv;
7075
7076         if (on != NULL)
7077                 *on = 0;
7078         if (off != NULL)
7079                 *off = 0;
7080         if (sc == NULL)
7081                 return;
7082         if (resource_string_value(device_get_name(sc->dev),
7083             device_get_unit(sc->dev), "config", &res) != 0)
7084                 return;
7085         if (!(res != NULL && strlen(res) > 0))
7086                 return;
7087         HDA_BOOTVERBOSE(
7088                 device_printf(sc->dev, "HDA Config:");
7089         );
7090         for (;;) {
7091                 while (res[i] != '\0' &&
7092                     (res[i] == ',' || isspace(res[i]) != 0))
7093                         i++;
7094                 if (res[i] == '\0') {
7095                         HDA_BOOTVERBOSE(
7096                                 printf("\n");
7097                         );
7098                         return;
7099                 }
7100                 j = i;
7101                 while (res[j] != '\0' &&
7102                     !(res[j] == ',' || isspace(res[j]) != 0))
7103                         j++;
7104                 len = j - i;
7105                 if (len > 2 && strncmp(res + i, "no", 2) == 0)
7106                         inv = 2;
7107                 else
7108                         inv = 0;
7109                 for (k = 0; len > inv && k < HDAC_QUIRKS_TAB_LEN; k++) {
7110                         if (strncmp(res + i + inv,
7111                             hdac_quirks_tab[k].key, len - inv) != 0)
7112                                 continue;
7113                         if (len - inv != strlen(hdac_quirks_tab[k].key))
7114                                 continue;
7115                         HDA_BOOTVERBOSE(
7116                                 printf(" %s%s", (inv != 0) ? "no" : "",
7117                                     hdac_quirks_tab[k].key);
7118                         );
7119                         if (inv == 0 && on != NULL)
7120                                 *on |= hdac_quirks_tab[k].value;
7121                         else if (inv != 0 && off != NULL)
7122                                 *off |= hdac_quirks_tab[k].value;
7123                         break;
7124                 }
7125                 i = j;
7126         }
7127 }
7128
7129 #ifdef SND_DYNSYSCTL
7130 static int
7131 sysctl_hdac_polling(SYSCTL_HANDLER_ARGS)
7132 {
7133         struct hdac_softc *sc;
7134         device_t dev;
7135         uint32_t ctl;
7136         int err, val;
7137
7138         dev = oidp->oid_arg1;
7139         sc = device_get_softc(dev);
7140         if (sc == NULL)
7141                 return (EINVAL);
7142         hdac_lock(sc);
7143         val = sc->polling;
7144         hdac_unlock(sc);
7145         err = sysctl_handle_int(oidp, &val, 0, req);
7146
7147         if (err != 0 || req->newptr == NULL)
7148                 return (err);
7149         if (val < 0 || val > 1)
7150                 return (EINVAL);
7151
7152         hdac_lock(sc);
7153         if (val != sc->polling) {
7154                 if (val == 0) {
7155                         callout_stop(&sc->poll_hda);
7156                         callout_stop(&sc->poll_hdac);
7157                         hdac_unlock(sc);
7158                         callout_drain(&sc->poll_hda);
7159                         callout_drain(&sc->poll_hdac);
7160                         hdac_lock(sc);
7161                         sc->polling = 0;
7162                         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
7163                         ctl |= HDAC_INTCTL_GIE;
7164                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
7165                 } else {
7166                         ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
7167                         ctl &= ~HDAC_INTCTL_GIE;
7168                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
7169                         hdac_unlock(sc);
7170                         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
7171                         hdac_lock(sc);
7172                         sc->polling = 1;
7173                         hdac_poll_reinit(sc);
7174                         callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
7175                 }
7176         }
7177         hdac_unlock(sc);
7178
7179         return (err);
7180 }
7181
7182 static int
7183 sysctl_hdac_polling_interval(SYSCTL_HANDLER_ARGS)
7184 {
7185         struct hdac_softc *sc;
7186         device_t dev;
7187         int err, val;
7188
7189         dev = oidp->oid_arg1;
7190         sc = device_get_softc(dev);
7191         if (sc == NULL)
7192                 return (EINVAL);
7193         hdac_lock(sc);
7194         val = ((uint64_t)sc->poll_ival * 1000) / hz;
7195         hdac_unlock(sc);
7196         err = sysctl_handle_int(oidp, &val, 0, req);
7197
7198         if (err != 0 || req->newptr == NULL)
7199                 return (err);
7200
7201         if (val < 1)
7202                 val = 1;
7203         if (val > 5000)
7204                 val = 5000;
7205         val = ((uint64_t)val * hz) / 1000;
7206         if (val < 1)
7207                 val = 1;
7208         if (val > (hz * 5))
7209                 val = hz * 5;
7210
7211         hdac_lock(sc);
7212         sc->poll_ival = val;
7213         hdac_unlock(sc);
7214
7215         return (err);
7216 }
7217
7218 static int
7219 sysctl_hdac_pindump(SYSCTL_HANDLER_ARGS)
7220 {
7221         struct hdac_softc *sc;
7222         struct hdac_codec *codec;
7223         struct hdac_devinfo *devinfo;
7224         struct hdac_widget *w;
7225         device_t dev;
7226         uint32_t res, pincap, delay;
7227         int codec_index, fg_index;
7228         int i, err, val;
7229         nid_t cad;
7230
7231         dev = oidp->oid_arg1;
7232         sc = device_get_softc(dev);
7233         if (sc == NULL)
7234                 return (EINVAL);
7235         val = 0;
7236         err = sysctl_handle_int(oidp, &val, 0, req);
7237         if (err != 0 || req->newptr == NULL || val == 0)
7238                 return (err);
7239
7240         /* XXX: Temporary. For debugging. */
7241         if (val == 100) {
7242                 hdac_suspend(dev);
7243                 return (0);
7244         } else if (val == 101) {
7245                 hdac_resume(dev);
7246                 return (0);
7247         }
7248
7249         hdac_lock(sc);
7250         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7251                 codec = sc->codecs[codec_index];
7252                 if (codec == NULL)
7253                         continue;
7254                 cad = codec->cad;
7255                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7256                         devinfo = &codec->fgs[fg_index];
7257                         if (devinfo->node_type !=
7258                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO)
7259                                 continue;
7260
7261                         device_printf(dev, "Dumping AFG cad=%d nid=%d pins:\n",
7262                             codec_index, devinfo->nid);
7263                         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
7264                                         w = hdac_widget_get(devinfo, i);
7265                                 if (w == NULL || w->type !=
7266                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
7267                                         continue;
7268                                 hdac_dump_pin_config(w, w->wclass.pin.config);
7269                                 pincap = w->wclass.pin.cap;
7270                                 device_printf(dev, "       Caps: %2s %3s %2s %4s %4s",
7271                                     HDA_PARAM_PIN_CAP_INPUT_CAP(pincap)?"IN":"",
7272                                     HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap)?"OUT":"",
7273                                     HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap)?"HP":"",
7274                                     HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)?"EAPD":"",
7275                                     HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)?"VREF":"");
7276                                 if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) ||
7277                                     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) {
7278                                         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) {
7279                                                 delay = 0;
7280                                                 hdac_command(sc,
7281                                                     HDA_CMD_SET_PIN_SENSE(cad, w->nid, 0), cad);
7282                                                 do {
7283                                                         res = hdac_command(sc,
7284                                                             HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
7285                                                         if (res != 0x7fffffff && res != 0xffffffff)
7286                                                                 break;
7287                                                         DELAY(10);
7288                                                 } while (++delay < 10000);
7289                                         } else {
7290                                                 delay = 0;
7291                                                 res = hdac_command(sc, HDA_CMD_GET_PIN_SENSE(cad,
7292                                                     w->nid), cad);
7293                                         }
7294                                         printf(" Sense: 0x%08x", res);
7295                                         if (delay > 0)
7296                                                 printf(" delay %dus", delay * 10);
7297                                 }
7298                                 printf("\n");
7299                         }
7300                         device_printf(dev,
7301                             "NumGPIO=%d NumGPO=%d NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
7302                             HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
7303                             HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
7304                             HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
7305                             HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
7306                             HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
7307                         if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio) > 0) {
7308                                 device_printf(dev, " GPI:");
7309                                 res = hdac_command(sc,
7310                                     HDA_CMD_GET_GPI_DATA(cad, devinfo->nid), cad);
7311                                 printf(" data=0x%08x", res);
7312                                 res = hdac_command(sc,
7313                                     HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, devinfo->nid),
7314                                     cad);
7315                                 printf(" wake=0x%08x", res);
7316                                 res = hdac_command(sc,
7317                                     HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
7318                                     cad);
7319                                 printf(" unsol=0x%08x", res);
7320                                 res = hdac_command(sc,
7321                                     HDA_CMD_GET_GPI_STICKY_MASK(cad, devinfo->nid), cad);
7322                                 printf(" sticky=0x%08x\n", res);
7323                         }
7324                         if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio) > 0) {
7325                                 device_printf(dev, " GPO:");
7326                                 res = hdac_command(sc,
7327                                     HDA_CMD_GET_GPO_DATA(cad, devinfo->nid), cad);
7328                                 printf(" data=0x%08x\n", res);
7329                         }
7330                         if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio) > 0) {
7331                                 device_printf(dev, "GPIO:");
7332                                 res = hdac_command(sc,
7333                                     HDA_CMD_GET_GPIO_DATA(cad, devinfo->nid), cad);
7334                                 printf(" data=0x%08x", res);
7335                                 res = hdac_command(sc,
7336                                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad, devinfo->nid), cad);
7337                                 printf(" enable=0x%08x", res);
7338                                 res = hdac_command(sc,
7339                                     HDA_CMD_GET_GPIO_DIRECTION(cad, devinfo->nid), cad);
7340                                 printf(" direction=0x%08x\n", res);
7341                                 res = hdac_command(sc,
7342                                     HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, devinfo->nid), cad);
7343                                 device_printf(dev, "      wake=0x%08x", res);
7344                                 res = hdac_command(sc,
7345                                     HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
7346                                     cad);
7347                                 printf("  unsol=0x%08x", res);
7348                                 res = hdac_command(sc,
7349                                     HDA_CMD_GET_GPIO_STICKY_MASK(cad, devinfo->nid), cad);
7350                                 printf("    sticky=0x%08x\n", res);
7351                         }
7352                 }
7353         }
7354         hdac_unlock(sc);
7355         return (0);
7356 }
7357 #endif
7358
7359 static void
7360 hdac_attach2(void *arg)
7361 {
7362         struct hdac_codec *codec;
7363         struct hdac_softc *sc;
7364         struct hdac_audio_ctl *ctl;
7365         uint32_t quirks_on, quirks_off;
7366         int codec_index, fg_index;
7367         int i, dmaalloc = 0;
7368         struct hdac_devinfo *devinfo;
7369
7370         sc = (struct hdac_softc *)arg;
7371
7372         hdac_config_fetch(sc, &quirks_on, &quirks_off);
7373
7374         HDA_BOOTHVERBOSE(
7375                 device_printf(sc->dev, "HDA Config: on=0x%08x off=0x%08x\n",
7376                     quirks_on, quirks_off);
7377         );
7378
7379         hdac_lock(sc);
7380
7381         /* Remove ourselves from the config hooks */
7382         if (sc->intrhook.ich_func != NULL) {
7383                 config_intrhook_disestablish(&sc->intrhook);
7384                 sc->intrhook.ich_func = NULL;
7385         }
7386
7387         /* Start the corb and rirb engines */
7388         HDA_BOOTHVERBOSE(
7389                 device_printf(sc->dev, "Starting CORB Engine...\n");
7390         );
7391         hdac_corb_start(sc);
7392         HDA_BOOTHVERBOSE(
7393                 device_printf(sc->dev, "Starting RIRB Engine...\n");
7394         );
7395         hdac_rirb_start(sc);
7396
7397         HDA_BOOTHVERBOSE(
7398                 device_printf(sc->dev,
7399                     "Enabling controller interrupt...\n");
7400         );
7401         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
7402             HDAC_GCTL_UNSOL);
7403         if (sc->polling == 0) {
7404                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
7405                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
7406         } else {
7407                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
7408         }
7409         DELAY(1000);
7410
7411         HDA_BOOTHVERBOSE(
7412                 device_printf(sc->dev,
7413                     "Scanning HDA codecs ...\n");
7414         );
7415         hdac_scan_codecs(sc);
7416
7417         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7418                 codec = sc->codecs[codec_index];
7419                 if (codec == NULL)
7420                         continue;
7421                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7422                         devinfo = &codec->fgs[fg_index];
7423                         HDA_BOOTVERBOSE(
7424                                 device_printf(sc->dev, "\n");
7425                                 device_printf(sc->dev,
7426                                     "Processing %s FG cad=%d nid=%d...\n",
7427                                     (devinfo->node_type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) ? "audio":
7428                                     (devinfo->node_type == HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_MODEM) ? "modem":
7429                                     "unknown",
7430                                     devinfo->codec->cad, devinfo->nid);
7431                         );
7432                         if (devinfo->node_type !=
7433                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
7434                                 HDA_BOOTHVERBOSE(
7435                                         device_printf(sc->dev,
7436                                             "Powering down...\n");
7437                                 );
7438                                 hdac_command(sc,
7439                                     HDA_CMD_SET_POWER_STATE(codec->cad,
7440                                     devinfo->nid, HDA_CMD_POWER_STATE_D3),
7441                                     codec->cad);
7442                                 continue;
7443                         }
7444
7445                         HDA_BOOTHVERBOSE(
7446                                 device_printf(sc->dev, "Powering up...\n");
7447                         );
7448                         hdac_powerup(devinfo);
7449                         HDA_BOOTHVERBOSE(
7450                                 device_printf(sc->dev, "Parsing audio FG...\n");
7451                         );
7452                         hdac_audio_parse(devinfo);
7453                         HDA_BOOTHVERBOSE(
7454                                 device_printf(sc->dev, "Parsing Ctls...\n");
7455                         );
7456                         hdac_audio_ctl_parse(devinfo);
7457                         HDA_BOOTHVERBOSE(
7458                                 device_printf(sc->dev, "Parsing vendor patch...\n");
7459                         );
7460                         hdac_vendor_patch_parse(devinfo);
7461                         devinfo->function.audio.quirks |= quirks_on;
7462                         devinfo->function.audio.quirks &= ~quirks_off;
7463
7464                         HDA_BOOTHVERBOSE(
7465                                 device_printf(sc->dev, "Disabling nonaudio...\n");
7466                         );
7467                         hdac_audio_disable_nonaudio(devinfo);
7468                         HDA_BOOTHVERBOSE(
7469                                 device_printf(sc->dev, "Disabling useless...\n");
7470                         );
7471                         hdac_audio_disable_useless(devinfo);
7472                         HDA_BOOTVERBOSE(
7473                                 device_printf(sc->dev, "Patched pins configuration:\n");
7474                                 hdac_dump_pin_configs(devinfo);
7475                         );
7476                         HDA_BOOTHVERBOSE(
7477                                 device_printf(sc->dev, "Parsing pin associations...\n");
7478                         );
7479                         hdac_audio_as_parse(devinfo);
7480                         HDA_BOOTHVERBOSE(
7481                                 device_printf(sc->dev, "Building AFG tree...\n");
7482                         );
7483                         hdac_audio_build_tree(devinfo);
7484                         HDA_BOOTHVERBOSE(
7485                                 device_printf(sc->dev, "Disabling unassociated "
7486                                     "widgets...\n");
7487                         );
7488                         hdac_audio_disable_unas(devinfo);
7489                         HDA_BOOTHVERBOSE(
7490                                 device_printf(sc->dev, "Disabling nonselected "
7491                                     "inputs...\n");
7492                         );
7493                         hdac_audio_disable_notselected(devinfo);
7494                         HDA_BOOTHVERBOSE(
7495                                 device_printf(sc->dev, "Disabling useless...\n");
7496                         );
7497                         hdac_audio_disable_useless(devinfo);
7498                         HDA_BOOTHVERBOSE(
7499                                 device_printf(sc->dev, "Disabling "
7500                                     "crossassociatement connections...\n");
7501                         );
7502                         hdac_audio_disable_crossas(devinfo);
7503                         HDA_BOOTHVERBOSE(
7504                                 device_printf(sc->dev, "Disabling useless...\n");
7505                         );
7506                         hdac_audio_disable_useless(devinfo);
7507                         HDA_BOOTHVERBOSE(
7508                                 device_printf(sc->dev, "Binding associations to channels...\n");
7509                         );
7510                         hdac_audio_bind_as(devinfo);
7511                         HDA_BOOTHVERBOSE(
7512                                 device_printf(sc->dev, "Assigning names to signal sources...\n");
7513                         );
7514                         hdac_audio_assign_names(devinfo);
7515                         HDA_BOOTHVERBOSE(
7516                                 device_printf(sc->dev, "Assigning mixers to the tree...\n");
7517                         );
7518                         hdac_audio_assign_mixers(devinfo);
7519                         HDA_BOOTHVERBOSE(
7520                                 device_printf(sc->dev, "Preparing pin controls...\n");
7521                         );
7522                         hdac_audio_prepare_pin_ctrl(devinfo);
7523                         HDA_BOOTHVERBOSE(
7524                                 device_printf(sc->dev, "AFG commit...\n");
7525                         );
7526                         hdac_audio_commit(devinfo);
7527                         HDA_BOOTHVERBOSE(
7528                                 device_printf(sc->dev, "HP switch init...\n");
7529                         );
7530                         hdac_hp_switch_init(devinfo);
7531
7532                         if ((devinfo->function.audio.quirks & HDA_QUIRK_DMAPOS) &&
7533                             dmaalloc == 0) {
7534                                 if (hdac_dma_alloc(sc, &sc->pos_dma,
7535                                     (sc->num_iss + sc->num_oss + sc->num_bss) * 8) != 0) {
7536                                         HDA_BOOTVERBOSE(
7537                                                 device_printf(sc->dev, "Failed to "
7538                                                     "allocate DMA pos buffer "
7539                                                     "(non-fatal)\n");
7540                                         );
7541                                 } else
7542                                         dmaalloc = 1;
7543                         }
7544
7545                         HDA_BOOTHVERBOSE(
7546                                 device_printf(sc->dev, "Creating PCM devices...\n");
7547                         );
7548                         hdac_create_pcms(devinfo);
7549
7550                         HDA_BOOTVERBOSE(
7551                                 if (devinfo->function.audio.quirks != 0) {
7552                                         device_printf(sc->dev, "FG config/quirks:");
7553                                         for (i = 0; i < HDAC_QUIRKS_TAB_LEN; i++) {
7554                                                 if ((devinfo->function.audio.quirks &
7555                                                     hdac_quirks_tab[i].value) ==
7556                                                     hdac_quirks_tab[i].value)
7557                                                         printf(" %s", hdac_quirks_tab[i].key);
7558                                         }
7559                                         printf("\n");
7560                                 }
7561
7562                                 device_printf(sc->dev, "\n");
7563                                 device_printf(sc->dev, "+-------------------+\n");
7564                                 device_printf(sc->dev, "| DUMPING HDA NODES |\n");
7565                                 device_printf(sc->dev, "+-------------------+\n");
7566                                 hdac_dump_nodes(devinfo);
7567                         );
7568
7569                         HDA_BOOTHVERBOSE(
7570                                 device_printf(sc->dev, "\n");
7571                                 device_printf(sc->dev, "+------------------------+\n");
7572                                 device_printf(sc->dev, "| DUMPING HDA AMPLIFIERS |\n");
7573                                 device_printf(sc->dev, "+------------------------+\n");
7574                                 device_printf(sc->dev, "\n");
7575                                 i = 0;
7576                                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
7577                                         device_printf(sc->dev, "%3d: nid %3d %s (%s) index %d", i,
7578                                             (ctl->widget != NULL) ? ctl->widget->nid : -1,
7579                                             (ctl->ndir == HDA_CTL_IN)?"in ":"out",
7580                                             (ctl->dir == HDA_CTL_IN)?"in ":"out",
7581                                             ctl->index);
7582                                         if (ctl->childwidget != NULL)
7583                                                 printf(" cnid %3d", ctl->childwidget->nid);
7584                                         else
7585                                                 printf("         ");
7586                                         printf(" ossmask=0x%08x\n",
7587                                             ctl->ossmask);
7588                                         device_printf(sc->dev,
7589                                             "       mute: %d step: %3d size: %3d off: %3d%s\n",
7590                                             ctl->mute, ctl->step, ctl->size, ctl->offset,
7591                                             (ctl->enable == 0) ? " [DISABLED]" :
7592                                             ((ctl->ossmask == 0) ? " [UNUSED]" : ""));
7593                                 }
7594                         );
7595                 }
7596         }
7597         hdac_unlock(sc);
7598
7599         HDA_BOOTVERBOSE(
7600                 device_printf(sc->dev, "\n");
7601         );
7602
7603         bus_generic_attach(sc->dev);
7604
7605 #ifdef SND_DYNSYSCTL
7606         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
7607             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
7608             "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
7609             sysctl_hdac_polling, "I", "Enable polling mode");
7610         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
7611             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
7612             "polling_interval", CTLTYPE_INT | CTLFLAG_RW, sc->dev,
7613             sizeof(sc->dev), sysctl_hdac_polling_interval, "I",
7614             "Controller/Jack Sense polling interval (1-1000 ms)");
7615         SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->dev),
7616             SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)), OID_AUTO,
7617             "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
7618             sysctl_hdac_pindump, "I", "Dump pin states/data");
7619 #endif
7620 }
7621
7622 /****************************************************************************
7623  * int hdac_suspend(device_t)
7624  *
7625  * Suspend and power down HDA bus and codecs.
7626  ****************************************************************************/
7627 static int
7628 hdac_suspend(device_t dev)
7629 {
7630         struct hdac_softc *sc;
7631         struct hdac_codec *codec;
7632         struct hdac_devinfo *devinfo;
7633         int codec_index, fg_index, i;
7634
7635         HDA_BOOTHVERBOSE(
7636                 device_printf(dev, "Suspend...\n");
7637         );
7638
7639         sc = device_get_softc(dev);
7640         hdac_lock(sc);
7641
7642         HDA_BOOTHVERBOSE(
7643                 device_printf(dev, "Stop streams...\n");
7644         );
7645         for (i = 0; i < sc->num_chans; i++) {
7646                 if (sc->chans[i].flags & HDAC_CHN_RUNNING) {
7647                         sc->chans[i].flags |= HDAC_CHN_SUSPEND;
7648                         hdac_channel_stop(sc, &sc->chans[i]);
7649                 }
7650         }
7651
7652         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7653                 codec = sc->codecs[codec_index];
7654                 if (codec == NULL)
7655                         continue;
7656                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7657                         devinfo = &codec->fgs[fg_index];
7658                         HDA_BOOTHVERBOSE(
7659                                 device_printf(dev,
7660                                     "Power down FG"
7661                                     " cad=%d nid=%d to the D3 state...\n",
7662                                     codec->cad, devinfo->nid);
7663                         );
7664                         hdac_command(sc,
7665                             HDA_CMD_SET_POWER_STATE(codec->cad,
7666                             devinfo->nid, HDA_CMD_POWER_STATE_D3),
7667                             codec->cad);
7668                 }
7669         }
7670
7671         HDA_BOOTHVERBOSE(
7672                 device_printf(dev, "Reset controller...\n");
7673         );
7674         callout_stop(&sc->poll_hda);
7675         callout_stop(&sc->poll_hdac);
7676         callout_stop(&sc->poll_jack);
7677         hdac_reset(sc, 0);
7678         hdac_unlock(sc);
7679         taskqueue_drain(taskqueue_thread, &sc->unsolq_task);
7680         callout_drain(&sc->poll_hda);
7681         callout_drain(&sc->poll_hdac);
7682         callout_drain(&sc->poll_jack);
7683
7684         HDA_BOOTHVERBOSE(
7685                 device_printf(dev, "Suspend done\n");
7686         );
7687
7688         return (0);
7689 }
7690
7691 /****************************************************************************
7692  * int hdac_resume(device_t)
7693  *
7694  * Powerup and restore HDA bus and codecs state.
7695  ****************************************************************************/
7696 static int
7697 hdac_resume(device_t dev)
7698 {
7699         struct hdac_softc *sc;
7700         struct hdac_codec *codec;
7701         struct hdac_devinfo *devinfo;
7702         int codec_index, fg_index, i;
7703
7704         HDA_BOOTHVERBOSE(
7705                 device_printf(dev, "Resume...\n");
7706         );
7707
7708         sc = device_get_softc(dev);
7709         hdac_lock(sc);
7710
7711         /* Quiesce everything */
7712         HDA_BOOTHVERBOSE(
7713                 device_printf(dev, "Reset controller...\n");
7714         );
7715         hdac_reset(sc, 1);
7716
7717         /* Initialize the CORB and RIRB */
7718         hdac_corb_init(sc);
7719         hdac_rirb_init(sc);
7720
7721         /* Start the corb and rirb engines */
7722         HDA_BOOTHVERBOSE(
7723                 device_printf(dev, "Starting CORB Engine...\n");
7724         );
7725         hdac_corb_start(sc);
7726         HDA_BOOTHVERBOSE(
7727                 device_printf(dev, "Starting RIRB Engine...\n");
7728         );
7729         hdac_rirb_start(sc);
7730
7731         HDA_BOOTHVERBOSE(
7732                 device_printf(dev,
7733                     "Enabling controller interrupt...\n");
7734         );
7735         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
7736             HDAC_GCTL_UNSOL);
7737         if (sc->polling == 0) {
7738                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
7739                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
7740         } else {
7741                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
7742         }
7743         DELAY(1000);
7744
7745         for (codec_index = 0; codec_index < HDAC_CODEC_MAX; codec_index++) {
7746                 codec = sc->codecs[codec_index];
7747                 if (codec == NULL)
7748                         continue;
7749                 for (fg_index = 0; fg_index < codec->num_fgs; fg_index++) {
7750                         devinfo = &codec->fgs[fg_index];
7751                         if (devinfo->node_type !=
7752                             HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
7753                                 HDA_BOOTHVERBOSE(
7754                                         device_printf(dev,
7755                                             "Power down unsupported non-audio FG"
7756                                             " cad=%d nid=%d to the D3 state...\n",
7757                                             codec->cad, devinfo->nid);
7758                                 );
7759                                 hdac_command(sc,
7760                                     HDA_CMD_SET_POWER_STATE(codec->cad,
7761                                     devinfo->nid, HDA_CMD_POWER_STATE_D3),
7762                                     codec->cad);
7763                                 continue;
7764                         }
7765
7766                         HDA_BOOTHVERBOSE(
7767                                 device_printf(dev,
7768                                     "Power up audio FG cad=%d nid=%d...\n",
7769                                     devinfo->codec->cad, devinfo->nid);
7770                         );
7771                         hdac_powerup(devinfo);
7772                         HDA_BOOTHVERBOSE(
7773                                 device_printf(dev, "AFG commit...\n");
7774                         );
7775                         hdac_audio_commit(devinfo);
7776                         HDA_BOOTHVERBOSE(
7777                                 device_printf(dev, "HP switch init...\n");
7778                         );
7779                         hdac_hp_switch_init(devinfo);
7780
7781                         hdac_unlock(sc);
7782                         for (i = 0; i < devinfo->function.audio.num_devs; i++) {
7783                                 struct hdac_pcm_devinfo *pdevinfo =
7784                                     &devinfo->function.audio.devs[i];
7785                                 HDA_BOOTHVERBOSE(
7786                                         device_printf(pdevinfo->dev,
7787                                             "OSS mixer reinitialization...\n");
7788                                 );
7789                                 if (mixer_reinit(pdevinfo->dev) == -1)
7790                                         device_printf(pdevinfo->dev,
7791                                             "unable to reinitialize the mixer\n");
7792                         }
7793                         hdac_lock(sc);
7794                 }
7795         }
7796
7797         HDA_BOOTHVERBOSE(
7798                 device_printf(dev, "Start streams...\n");
7799         );
7800         for (i = 0; i < sc->num_chans; i++) {
7801                 if (sc->chans[i].flags & HDAC_CHN_SUSPEND) {
7802                         sc->chans[i].flags &= ~HDAC_CHN_SUSPEND;
7803                         hdac_channel_start(sc, &sc->chans[i]);
7804                 }
7805         }
7806
7807         hdac_unlock(sc);
7808
7809         HDA_BOOTHVERBOSE(
7810                 device_printf(dev, "Resume done\n");
7811         );
7812
7813         return (0);
7814 }
7815 /****************************************************************************
7816  * int hdac_detach(device_t)
7817  *
7818  * Detach and free up resources utilized by the hdac device.
7819  ****************************************************************************/
7820 static int
7821 hdac_detach(device_t dev)
7822 {
7823         struct hdac_softc *sc;
7824         device_t *devlist;
7825         int i, devcount, error;
7826
7827         if ((error = device_get_children(dev, &devlist, &devcount)) != 0)
7828                 return (error);
7829         for (i = 0; i < devcount; i++) {
7830                 if ((error = device_delete_child(dev, devlist[i])) != 0) {
7831                         free(devlist, M_TEMP);
7832                         return (error);
7833                 }
7834         }
7835         free(devlist, M_TEMP);
7836
7837         sc = device_get_softc(dev);
7838         hdac_release_resources(sc);
7839
7840         return (0);
7841 }
7842
7843 static int
7844 hdac_print_child(device_t dev, device_t child)
7845 {
7846         struct hdac_pcm_devinfo *pdevinfo =
7847             (struct hdac_pcm_devinfo *)device_get_ivars(child);
7848         int retval;
7849
7850         retval = bus_print_child_header(dev, child);
7851         retval += printf(" at cad %d nid %d",
7852             pdevinfo->devinfo->codec->cad, pdevinfo->devinfo->nid);
7853         retval += bus_print_child_footer(dev, child);
7854
7855         return (retval);
7856 }
7857
7858 static device_method_t hdac_methods[] = {
7859         /* device interface */
7860         DEVMETHOD(device_probe,         hdac_probe),
7861         DEVMETHOD(device_attach,        hdac_attach),
7862         DEVMETHOD(device_detach,        hdac_detach),
7863         DEVMETHOD(device_suspend,       hdac_suspend),
7864         DEVMETHOD(device_resume,        hdac_resume),
7865         /* Bus interface */
7866         DEVMETHOD(bus_print_child,      hdac_print_child),
7867         { 0, 0 }
7868 };
7869
7870 static driver_t hdac_driver = {
7871         "hdac",
7872         hdac_methods,
7873         sizeof(struct hdac_softc),
7874 };
7875
7876 static devclass_t hdac_devclass;
7877
7878 DRIVER_MODULE(snd_hda, pci, hdac_driver, hdac_devclass, 0, 0);
7879 MODULE_DEPEND(snd_hda, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
7880 MODULE_VERSION(snd_hda, 1);
7881
7882 static int
7883 hdac_pcm_probe(device_t dev)
7884 {
7885         struct hdac_pcm_devinfo *pdevinfo =
7886             (struct hdac_pcm_devinfo *)device_get_ivars(dev);
7887         char buf[128];
7888
7889         snprintf(buf, sizeof(buf), "HDA %s PCM #%d %s",
7890             hdac_codec_name(pdevinfo->devinfo->codec),
7891             pdevinfo->index,
7892             pdevinfo->digital?"Digital":"Analog");
7893         device_set_desc_copy(dev, buf);
7894         return (0);
7895 }
7896
7897 static int
7898 hdac_pcm_attach(device_t dev)
7899 {
7900         struct hdac_pcm_devinfo *pdevinfo =
7901             (struct hdac_pcm_devinfo *)device_get_ivars(dev);
7902         struct hdac_softc *sc = pdevinfo->devinfo->codec->sc;
7903         char status[SND_STATUSLEN];
7904         int i;
7905
7906         pdevinfo->chan_size = pcm_getbuffersize(dev,
7907             HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX);
7908
7909         HDA_BOOTVERBOSE(
7910                 device_printf(dev, "+--------------------------------------+\n");
7911                 device_printf(dev, "| DUMPING PCM Playback/Record Channels |\n");
7912                 device_printf(dev, "+--------------------------------------+\n");
7913                 hdac_dump_pcmchannels(pdevinfo);
7914                 device_printf(dev, "\n");
7915                 device_printf(dev, "+-------------------------------+\n");
7916                 device_printf(dev, "| DUMPING Playback/Record Paths |\n");
7917                 device_printf(dev, "+-------------------------------+\n");
7918                 hdac_dump_dac(pdevinfo);
7919                 hdac_dump_adc(pdevinfo);
7920                 hdac_dump_mix(pdevinfo);
7921                 device_printf(dev, "\n");
7922                 device_printf(dev, "+-------------------------+\n");
7923                 device_printf(dev, "| DUMPING Volume Controls |\n");
7924                 device_printf(dev, "+-------------------------+\n");
7925                 hdac_dump_ctls(pdevinfo, "Master Volume", SOUND_MASK_VOLUME);
7926                 hdac_dump_ctls(pdevinfo, "PCM Volume", SOUND_MASK_PCM);
7927                 hdac_dump_ctls(pdevinfo, "CD Volume", SOUND_MASK_CD);
7928                 hdac_dump_ctls(pdevinfo, "Microphone Volume", SOUND_MASK_MIC);
7929                 hdac_dump_ctls(pdevinfo, "Microphone2 Volume", SOUND_MASK_MONITOR);
7930                 hdac_dump_ctls(pdevinfo, "Line-in Volume", SOUND_MASK_LINE);
7931                 hdac_dump_ctls(pdevinfo, "Speaker/Beep Volume", SOUND_MASK_SPEAKER);
7932                 hdac_dump_ctls(pdevinfo, "Recording Level", SOUND_MASK_RECLEV);
7933                 hdac_dump_ctls(pdevinfo, "Input Mix Level", SOUND_MASK_IMIX);
7934                 hdac_dump_ctls(pdevinfo, NULL, 0);
7935                 device_printf(dev, "\n");
7936         );
7937
7938         if (resource_int_value(device_get_name(dev),
7939             device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
7940                 i &= HDA_BLK_ALIGN;
7941                 if (i < HDA_BLK_MIN)
7942                         i = HDA_BLK_MIN;
7943                 pdevinfo->chan_blkcnt = pdevinfo->chan_size / i;
7944                 i = 0;
7945                 while (pdevinfo->chan_blkcnt >> i)
7946                         i++;
7947                 pdevinfo->chan_blkcnt = 1 << (i - 1);
7948                 if (pdevinfo->chan_blkcnt < HDA_BDL_MIN)
7949                         pdevinfo->chan_blkcnt = HDA_BDL_MIN;
7950                 else if (pdevinfo->chan_blkcnt > HDA_BDL_MAX)
7951                         pdevinfo->chan_blkcnt = HDA_BDL_MAX;
7952         } else
7953                 pdevinfo->chan_blkcnt = HDA_BDL_DEFAULT;
7954
7955         /*
7956          * We don't register interrupt handler with snd_setup_intr
7957          * in pcm device. Mark pcm device as MPSAFE manually.
7958          */
7959         pcm_setflags(dev, pcm_getflags(dev) | SD_F_MPSAFE);
7960
7961         HDA_BOOTHVERBOSE(
7962                 device_printf(dev, "OSS mixer initialization...\n");
7963         );
7964         if (mixer_init(dev, &hdac_audio_ctl_ossmixer_class, pdevinfo) != 0)
7965                 device_printf(dev, "Can't register mixer\n");
7966
7967         HDA_BOOTHVERBOSE(
7968                 device_printf(dev, "Registering PCM channels...\n");
7969         );
7970         if (pcm_register(dev, pdevinfo, (pdevinfo->play >= 0)?1:0,
7971             (pdevinfo->rec >= 0)?1:0) != 0)
7972                 device_printf(dev, "Can't register PCM\n");
7973
7974         pdevinfo->registered++;
7975
7976         if (pdevinfo->play >= 0)
7977                 pcm_addchan(dev, PCMDIR_PLAY, &hdac_channel_class, pdevinfo);
7978         if (pdevinfo->rec >= 0)
7979                 pcm_addchan(dev, PCMDIR_REC, &hdac_channel_class, pdevinfo);
7980
7981         snprintf(status, SND_STATUSLEN, "at cad %d nid %d on %s %s",
7982             pdevinfo->devinfo->codec->cad, pdevinfo->devinfo->nid,
7983             device_get_nameunit(sc->dev), PCM_KLDSTRING(snd_hda));
7984         pcm_setstatus(dev, status);
7985
7986         return (0);
7987 }
7988
7989 static int
7990 hdac_pcm_detach(device_t dev)
7991 {
7992         struct hdac_pcm_devinfo *pdevinfo =
7993             (struct hdac_pcm_devinfo *)device_get_ivars(dev);
7994         int err;
7995
7996         if (pdevinfo->registered > 0) {
7997                 err = pcm_unregister(dev);
7998                 if (err != 0)
7999                         return (err);
8000         }
8001
8002         return (0);
8003 }
8004
8005 static device_method_t hdac_pcm_methods[] = {
8006         /* device interface */
8007         DEVMETHOD(device_probe,         hdac_pcm_probe),
8008         DEVMETHOD(device_attach,        hdac_pcm_attach),
8009         DEVMETHOD(device_detach,        hdac_pcm_detach),
8010         { 0, 0 }
8011 };
8012
8013 static driver_t hdac_pcm_driver = {
8014         "pcm",
8015         hdac_pcm_methods,
8016         PCM_SOFTC_SIZE,
8017 };
8018
8019 DRIVER_MODULE(snd_hda_pcm, hdac, hdac_pcm_driver, pcm_devclass, 0, 0);
8020