sys/dev/sr/if_sr.c

   1 /*-
   2  * Copyright (c) 1996 - 2001 John Hay.
   3  * Copyright (c) 1996 SDL Communications, Inc.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  * 3. Neither the name of the author nor the names of any co-contributors
  15  *    may be used to endorse or promote products derived from this software
  16  *    without specific prior written permission.
  17  *
  18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  28  * SUCH DAMAGE.
  29  *
  30  */
  31
  32 #include <sys/cdefs.h>
  33 __FBSDID("$FreeBSD$");
  34
  35 /*
  36  * Programming assumptions and other issues.
  37  *
  38  * Only a 16K window will be used.
  39  *
  40  * The descriptors of a DMA channel will fit in a 16K memory window.
  41  *
  42  * The buffers of a transmit DMA channel will fit in a 16K memory window.
  43  *
  44  * When interface is going up, handshaking is set and it is only cleared
  45  * when the interface is down'ed.
  46  *
  47  * There should be a way to set/reset Raw HDLC/PPP, Loopback, DCE/DTE,
  48  * internal/external clock, etc.....
  49  *
  50  */
  51
  52 #include "opt_netgraph.h"
  53 #ifdef NETGRAPH
  54 #include <dev/sr/if_sr.h>
  55 #endif  /* NETGRAPH */
  56
  57 #include <sys/param.h>
  58 #include <sys/systm.h>
  59 #include <sys/kernel.h>
  60 #include <sys/module.h>
  61 #include <sys/malloc.h>
  62 #include <sys/mbuf.h>
  63 #include <sys/sockio.h>
  64 #include <sys/socket.h>
  65 #include <sys/bus.h>
  66 #include <machine/bus.h>
  67 #include <machine/resource.h>
  68 #include <sys/rman.h>
  69
  70 #include <net/if.h>
  71 #ifdef NETGRAPH
  72 #include <sys/syslog.h>
  73 #else /* NETGRAPH */
  74 #include <net/if_sppp.h>
  75 #include <net/if_types.h>
  76
  77 #include <net/bpf.h>
  78 #endif  /* NETGRAPH */
  79
  80 #include <machine/md_var.h>
  81
  82 #include <dev/ic/hd64570.h>
  83 #include <dev/sr/if_srregs.h>
  84
  85 #ifdef NETGRAPH
  86 #include <netgraph/ng_message.h>
  87 #include <netgraph/netgraph.h>
  88 #endif /* NETGRAPH */
  89 /* #define USE_MODEMCK */
  90
  91 #ifndef BUGGY
  92 #define BUGGY           0
  93 #endif
  94
  95 #ifndef NETGRAPH
  96 #define PPP_HEADER_LEN  4
  97 #endif /* NETGRAPH */
  98
  99 static int      next_sc_unit = 0;
 100 #ifndef NETGRAPH
 101 #ifdef USE_MODEMCK
 102 static int      sr_watcher = 0;
 103 #endif
 104 #endif /* NETGRAPH */
 105
 106 /*
 107  * Define the software interface for the card... There is one for
 108  * every channel (port).
 109  */
 110 struct sr_softc {
 111 #ifndef NETGRAPH
 112         struct  ifnet *ifp;     /* PPP service w/in system */
 113 #endif /* NETGRAPH */
 114         struct  sr_hardc *hc;   /* card-level information */
 115
 116         int     unit;           /* With regard to all sr devices */
 117         int     subunit;        /* With regard to this card */
 118
 119         struct  buf_block {
 120                 u_int   txdesc; /* DPRAM offset */
 121                 u_int   txstart;/* DPRAM offset */
 122                 u_int   txend;  /* DPRAM offset */
 123                 u_int   txtail; /* # of 1st free gran */
 124                 u_int   txmax;  /* # of free grans */
 125                 u_int   txeda;  /* err descr addr */
 126         } block[SR_TX_BLOCKS];
 127
 128         char    xmit_busy;      /* Transmitter is busy */
 129         char    txb_inuse;      /* # of tx grans in use */
 130         u_int   txb_new;        /* ndx to new buffer */
 131         u_int   txb_next_tx;    /* ndx to next gran rdy tx */
 132
 133         u_int   rxdesc;         /* DPRAM offset */
 134         u_int   rxstart;        /* DPRAM offset */
 135         u_int   rxend;          /* DPRAM offset */
 136         u_int   rxhind;         /* ndx to the hd of rx bufrs */
 137         u_int   rxmax;          /* # of avail grans */
 138
 139         u_int   clk_cfg;        /* Clock configuration */
 140
 141         int     scachan;        /* channel # on card */
 142 #ifdef NETGRAPH
 143         int     running;        /* something is attached so we are running */
 144         int     dcd;            /* do we have dcd? */
 145         /* ---netgraph bits --- */
 146         char            nodename[NG_NODESIZ]; /* store our node name */
 147         int             datahooks;      /* number of data hooks attached */
 148         node_p          node;           /* netgraph node */
 149         hook_p          hook;           /* data hook */
 150         hook_p          debug_hook;
 151         struct ifqueue  xmitq_hipri;    /* hi-priority transmit queue */
 152         struct ifqueue  xmitq;          /* transmit queue */
 153         int             flags;          /* state */
 154 #define SCF_RUNNING     0x01            /* board is active */
 155 #define SCF_OACTIVE     0x02            /* output is active */
 156         int             out_dog;        /* watchdog cycles output count-down */
 157         struct callout_handle handle;   /* timeout(9) handle */
 158         u_long          inbytes, outbytes;      /* stats */
 159         u_long          lastinbytes, lastoutbytes; /* a second ago */
 160         u_long          inrate, outrate;        /* highest rate seen */
 161         u_long          inlast;         /* last input N secs ago */
 162         u_long          out_deficit;    /* output since last input */
 163         u_long          oerrors, ierrors[6];
 164         u_long          opackets, ipackets;
 165 #endif /* NETGRAPH */
 166 };
 167 #define SC2IFP(sc)      sc->ifp
 168
 169 #ifdef NETGRAPH
 170 #define DOG_HOLDOFF     6       /* dog holds off for 6 secs */
 171 #define QUITE_A_WHILE   300     /* 5 MINUTES */
 172 #define LOTS_OF_PACKETS 100
 173 #endif /* NETGRAPH */
 174
 175 /*
 176  * Baud Rate table for Sync Mode.
 177  * Each entry consists of 3 elements:
 178  * Baud Rate (x100) , TMC, BR
 179  *
 180  * Baud Rate = FCLK / TMC / 2^BR
 181  * Baud table for Crystal freq. of 9.8304 Mhz
 182  */
 183 #ifdef N2_TEST_SPEED
 184 struct rate_line {
 185         int     target;         /* target rate/100 */
 186         int     tmc_reg;        /* TMC register value */
 187         int     br_reg;         /* BR (BaudRateClk) selector */
 188 } n2_rates[] = {
 189         /* Baudx100     TMC             BR */
 190         { 3,            128,            8 },
 191         { 6,            128,            7 },
 192         { 12,           128,            6 },
 193         { 24,           128,            5 },
 194         { 48,           128,            4 },
 195         { 96,           128,            3 },
 196         { 192,          128,            2 },
 197         { 384,          128,            1 },
 198         { 560,          88,             1 },
 199         { 640,          77,             1 },
 200         { 1280,         38,             1 },
 201         { 2560,         19,             1 },
 202         { 5120,         10,             1 },
 203         { 10000,        5,              1 },
 204         { 15000,        3,              1 },
 205         { 25000,        2,              1 },
 206         { 50000,        1,              1 },
 207         { 0,            0,              0 }
 208 };
 209
 210 int     sr_test_speed[] = {
 211         N2_TEST_SPEED,
 212         N2_TEST_SPEED
 213 };
 214
 215 int     etc0vals[] = {
 216         SR_MCR_ETC0,            /* ISA channel 0 */
 217         SR_MCR_ETC1,            /* ISA channel 1 */
 218         SR_FECR_ETC0,           /* PCI channel 0 */
 219         SR_FECR_ETC1            /* PCI channel 1 */
 220 };
 221 #endif
 222
 223 devclass_t sr_devclass;
 224 #ifndef NETGRAPH
 225 MODULE_DEPEND(if_sr, sppp, 1, 1, 1);
 226 #endif
 227
 228 static void     srintr(void *arg);
 229 static void     sr_xmit(struct sr_softc *sc);
 230 #ifndef NETGRAPH
 231 static void     srstart(struct ifnet *ifp);
 232 static int      srioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
 233 static void     srwatchdog(struct ifnet *ifp);
 234 #else
 235 static void     srstart(struct sr_softc *sc);
 236 static void     srwatchdog(struct sr_softc *sc);
 237 #endif /* NETGRAPH */
 238 static int      sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat);
 239 static void     sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len);
 240 static void     sr_eat_packet(struct sr_softc *sc, int single);
 241 static void     sr_get_packets(struct sr_softc *sc);
 242
 243 static void     sr_up(struct sr_softc *sc);
 244 static void     sr_down(struct sr_softc *sc);
 245 static void     src_init(struct sr_hardc *hc);
 246 static void     sr_init_sca(struct sr_hardc *hc);
 247 static void     sr_init_msci(struct sr_softc *sc);
 248 static void     sr_init_rx_dmac(struct sr_softc *sc);
 249 static void     sr_init_tx_dmac(struct sr_softc *sc);
 250 static void     sr_dmac_intr(struct sr_hardc *hc, u_char isr);
 251 static void     sr_msci_intr(struct sr_hardc *hc, u_char isr);
 252 static void     sr_timer_intr(struct sr_hardc *hc, u_char isr);
 253 #ifndef NETGRAPH
 254 #ifdef USE_MODEMCK
 255 static void     sr_modemck(void *x);
 256 #endif
 257 #else
 258 static void     sr_modemck(struct sr_softc *x);
 259 #endif /* NETGRAPH */
 260
 261 #ifdef NETGRAPH
 262 static  void    ngsr_watchdog_frame(void * arg);
 263
 264 static ng_constructor_t ngsr_constructor;
 265 static ng_rcvmsg_t      ngsr_rcvmsg;
 266 static ng_shutdown_t    ngsr_shutdown;
 267 static ng_newhook_t     ngsr_newhook;
 268 /*static ng_findhook_t  ngsr_findhook; */
 269 static ng_connect_t     ngsr_connect;
 270 static ng_rcvdata_t     ngsr_rcvdata;
 271 static ng_disconnect_t  ngsr_disconnect;
 272
 273 static struct ng_type typestruct = {
 274         .version =      NG_ABI_VERSION,
 275         .name =         NG_SR_NODE_TYPE,
 276         .constructor =  ngsr_constructor,
 277         .rcvmsg =       ngsr_rcvmsg,
 278         .shutdown =     ngsr_shutdown,
 279         .newhook =      ngsr_newhook,
 280         .connect =      ngsr_connect,
 281         .rcvdata =      ngsr_rcvdata,
 282         .disconnect =   ngsr_disconnect,
 283 };
 284 NETGRAPH_INIT_ORDERED(sync_sr, &typestruct, SI_SUB_DRIVERS, SI_ORDER_FIRST);
 285 #endif /* NETGRAPH */
 286
 287 /*
 288  * Register the ports on the adapter.
 289  * Fill in the info for each port.
 290 #ifndef NETGRAPH
 291  * Attach each port to sppp and bpf.
 292 #endif
 293  */
 294 int
 295 sr_attach(device_t device)
 296 {
 297         int intf_sw, pndx;
 298         u_int32_t flags;
 299         u_int fecr;
 300         struct sr_hardc *hc;
 301         struct sr_softc *sc;
 302 #ifndef NETGRAPH
 303         struct ifnet *ifp;
 304 #endif /* NETGRAPH */
 305         int unit;               /* index: channel w/in card */
 306
 307         hc = (struct sr_hardc *)device_get_softc(device);
 308         MALLOC(sc, struct sr_softc *,
 309                 hc->numports * sizeof(struct sr_softc),
 310                 M_DEVBUF, M_WAITOK | M_ZERO);
 311         if (sc == NULL)
 312                 goto errexit;
 313         hc->sc = sc;
 314
 315         /*
 316          * Get the TX clock direction and configuration. The default is a
 317          * single external clock which is used by RX and TX.
 318          */
 319         switch(hc->cardtype) {
 320         case SR_CRD_N2:
 321                 flags = device_get_flags(device);
 322 #ifdef N2_TEST_SPEED
 323                 if (sr_test_speed[0] > 0)
 324                         hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 325                 else
 326 #endif
 327                 if (flags & SR_FLAGS_0_CLK_MSK)
 328                         hc->sc[0].clk_cfg =
 329                             (flags & SR_FLAGS_0_CLK_MSK)
 330                             >> SR_FLAGS_CLK_SHFT;
 331
 332                 if (hc->numports == 2)
 333 #ifdef N2_TEST_SPEED
 334                         if (sr_test_speed[1] > 0)
 335                                 hc->sc[0].clk_cfg = SR_FLAGS_INT_CLK;
 336                         else
 337 #endif
 338                         if (flags & SR_FLAGS_1_CLK_MSK)
 339                                 hc->sc[1].clk_cfg = (flags & SR_FLAGS_1_CLK_MSK)
 340                                     >> (SR_FLAGS_CLK_SHFT +
 341                                     SR_FLAGS_CLK_CHAN_SHFT);
 342                 break;
 343         case SR_CRD_N2PCI:
 344                 fecr = sr_read_fecr(hc);
 345                 for (pndx = 0; pndx < hc->numports; pndx++, sc++) {
 346                         switch (pndx) {
 347                         case 1:
 348                                 intf_sw = fecr & SR_FECR_ID1 >> SR_FE_ID1_SHFT;
 349                                 break;
 350                         case 0:
 351                         default:
 352                                 intf_sw = fecr & SR_FECR_ID0 >> SR_FE_ID0_SHFT;
 353                         }
 354
 355 #ifdef N2_TEST_SPEED
 356                         if (sr_test_speed[pndx] > 0)
 357                                 sc->clk_cfg = SR_FLAGS_INT_CLK;
 358                         else
 359 #endif
 360                                 switch (intf_sw) {
 361                                 default:
 362                                 case SR_FE_ID_RS232:
 363                                 case SR_FE_ID_HSSI:
 364                                 case SR_FE_ID_RS422:
 365                                 case SR_FE_ID_TEST:
 366                                         break;
 367
 368                                 case SR_FE_ID_V35:
 369                                         sc->clk_cfg = SR_FLAGS_EXT_SEP_CLK;
 370                                         break;
 371
 372                                 case SR_FE_ID_X21:
 373                                         sc->clk_cfg = SR_FLAGS_EXT_CLK;
 374                                         break;
 375                                 }
 376                 }
 377                 sc = hc->sc;
 378                 break;
 379         }
 380
 381         /*
 382          * Report Card configuration information before we start configuring
 383          * each channel on the card...
 384          */
 385         printf("src%d: %uK RAM (%d mempages) @ %p-%p, %u ports.\n",
 386                hc->cunit, hc->memsize / 1024, hc->mempages,
 387                hc->mem_start, hc->mem_end, hc->numports);
 388
 389         src_init(hc);
 390         sr_init_sca(hc);
 391
 392         if (bus_setup_intr(device, hc->res_irq,
 393             INTR_TYPE_NET, NULL, srintr, hc, &hc->intr_cookie) != 0)
 394                 goto errexit;
 395
 396         /*
 397          * Now configure each port on the card.
 398          */
 399         for (unit = 0; unit < hc->numports; sc++, unit++) {
 400                 sc->hc = hc;
 401                 sc->subunit = unit;
 402                 sc->unit = next_sc_unit;
 403                 next_sc_unit++;
 404                 sc->scachan = unit % NCHAN;
 405
 406                 sr_init_rx_dmac(sc);
 407                 sr_init_tx_dmac(sc);
 408                 sr_init_msci(sc);
 409
 410                 printf("sr%d: Adapter %d, port %d.\n",
 411                        sc->unit, hc->cunit, sc->subunit);
 412
 413 #ifndef NETGRAPH
 414                 ifp = SC2IFP(sc) = if_alloc(IFT_PPP);
 415                 if (ifp == NULL) {
 416                         goto errexit;
 417                 }
 418                 ifp->if_softc = sc;
 419                 if_initname(ifp, device_get_name(device),
 420                     device_get_unit(device));
 421                 ifp->if_mtu = PP_MTU;
 422                 ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST |
 423                     IFF_NEEDSGIANT;
 424                 ifp->if_ioctl = srioctl;
 425                 ifp->if_start = srstart;
 426                 ifp->if_watchdog = srwatchdog;
 427
 428                 IFP2SP(sc->ifp)->pp_flags = PP_KEEPALIVE;
 429                 sppp_attach(sc->ifp);
 430                 if_attach(ifp);
 431
 432                 bpfattach(ifp, DLT_PPP, PPP_HEADER_LEN);
 433 #else   /* NETGRAPH */
 434                 if (ng_make_node_common(&typestruct, &sc->node) != 0)
 435                         goto errexit;
 436                 sprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
 437                 if (ng_name_node(sc->node, sc->nodename)) {
 438                         NG_NODE_UNREF(sc->node); /* make it go away again */
 439                         goto errexit;
 440                 }
 441                 NG_NODE_SET_PRIVATE(sc->node, sc);
 442                 callout_handle_init(&sc->handle);
 443                 sc->xmitq.ifq_maxlen = IFQ_MAXLEN;
 444                 sc->xmitq_hipri.ifq_maxlen = IFQ_MAXLEN;
 445                 mtx_init(&sc->xmitq.ifq_mtx, "sr_xmitq", NULL, MTX_DEF);
 446                 mtx_init(&sc->xmitq_hipri.ifq_mtx, "sr_xmitq_hipri", NULL,
 447                     MTX_DEF);
 448                 sc->running = 0;
 449 #endif  /* NETGRAPH */
 450         }
 451
 452         if (hc->mempages)
 453                 SRC_SET_OFF(hc);
 454
 455         return (0);
 456
 457 errexit:
 458         sr_deallocate_resources(device);
 459         return (ENXIO);
 460 }
 461
 462 int
 463 sr_detach(device_t device)
 464 {
 465         struct sr_hardc *hc = device_get_softc(device);
 466
 467         if (hc->intr_cookie != NULL) {
 468                 if (bus_teardown_intr(device,
 469                         hc->res_irq, hc->intr_cookie) != 0) {
 470                                 printf("intr teardown failed.. continuing\n");
 471                 }
 472                 hc->intr_cookie = NULL;
 473         }
 474
 475         /* XXX Stop the DMA. */
 476
 477         /*
 478          * deallocate any system resources we may have
 479          * allocated on behalf of this driver.
 480          */
 481         FREE(hc->sc, M_DEVBUF);
 482         hc->sc = NULL;
 483         hc->mem_start = NULL;
 484         return (sr_deallocate_resources(device));
 485 }
 486
 487 int
 488 sr_allocate_ioport(device_t device, int rid, u_long size)
 489 {
 490         struct sr_hardc *hc = device_get_softc(device);
 491
 492         hc->rid_ioport = rid;
 493         hc->res_ioport = bus_alloc_resource(device, SYS_RES_IOPORT,
 494                         &hc->rid_ioport, 0ul, ~0ul, size, RF_ACTIVE);
 495         if (hc->res_ioport == NULL) {
 496                 goto errexit;
 497         }
 498         hc->bt_ioport = rman_get_bustag(hc->res_ioport);
 499         hc->bh_ioport = rman_get_bushandle(hc->res_ioport);
 500
 501         return (0);
 502
 503 errexit:
 504         sr_deallocate_resources(device);
 505         return (ENXIO);
 506 }
 507
 508 int
 509 sr_allocate_irq(device_t device, int rid, u_long size)
 510 {
 511         struct sr_hardc *hc = device_get_softc(device);
 512
 513         hc->rid_irq = rid;
 514         hc->res_irq = bus_alloc_resource_any(device, SYS_RES_IRQ,
 515                         &hc->rid_irq, RF_SHAREABLE|RF_ACTIVE);
 516         if (hc->res_irq == NULL) {
 517                 goto errexit;
 518         }
 519         return (0);
 520
 521 errexit:
 522         sr_deallocate_resources(device);
 523         return (ENXIO);
 524 }
 525
 526 int
 527 sr_allocate_memory(device_t device, int rid, u_long size)
 528 {
 529         struct sr_hardc *hc = device_get_softc(device);
 530
 531         hc->rid_memory = rid;
 532         hc->res_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 533                         &hc->rid_memory, 0ul, ~0ul, size, RF_ACTIVE);
 534         if (hc->res_memory == NULL) {
 535                 goto errexit;
 536         }
 537         hc->bt_memory = rman_get_bustag(hc->res_memory);
 538         hc->bh_memory = rman_get_bushandle(hc->res_memory);
 539
 540         return (0);
 541
 542 errexit:
 543         sr_deallocate_resources(device);
 544         return (ENXIO);
 545 }
 546
 547 int
 548 sr_allocate_plx_memory(device_t device, int rid, u_long size)
 549 {
 550         struct sr_hardc *hc = device_get_softc(device);
 551
 552         hc->rid_plx_memory = rid;
 553         hc->res_plx_memory = bus_alloc_resource(device, SYS_RES_MEMORY,
 554                         &hc->rid_plx_memory, 0ul, ~0ul, size, RF_ACTIVE);
 555         if (hc->res_plx_memory == NULL) {
 556                 goto errexit;
 557         }
 558         return (0);
 559
 560 errexit:
 561         sr_deallocate_resources(device);
 562         return (ENXIO);
 563 }
 564
 565 int
 566 sr_deallocate_resources(device_t device)
 567 {
 568         struct sr_hardc *hc = device_get_softc(device);
 569
 570         if (hc->res_irq != 0) {
 571                 bus_release_resource(device, SYS_RES_IRQ,
 572                         hc->rid_irq, hc->res_irq);
 573                 hc->res_irq = 0;
 574         }
 575         if (hc->res_ioport != 0) {
 576                 bus_release_resource(device, SYS_RES_IOPORT,
 577                         hc->rid_ioport, hc->res_ioport);
 578                 hc->res_ioport = 0;
 579         }
 580         if (hc->res_memory != 0) {
 581                 bus_release_resource(device, SYS_RES_MEMORY,
 582                         hc->rid_memory, hc->res_memory);
 583                 hc->res_memory = 0;
 584         }
 585         if (hc->res_plx_memory != 0) {
 586                 bus_release_resource(device, SYS_RES_MEMORY,
 587                         hc->rid_plx_memory, hc->res_plx_memory);
 588                 hc->res_plx_memory = 0;
 589         }
 590         return (0);
 591 }
 592
 593 /*
 594  * N2 Interrupt Service Routine
 595  *
 596  * First figure out which SCA gave the interrupt.
 597  * Process it.
 598  * See if there is other interrupts pending.
 599  * Repeat until there no interrupts remain.
 600  */
 601 static void
 602 srintr(void *arg)
 603 {
 604         struct sr_hardc *hc = (struct sr_hardc *)arg;
 605         sca_regs *sca = hc->sca;        /* MSCI register tree */
 606         u_char  isr0, isr1, isr2;       /* interrupt statii captured */
 607
 608 #if BUGGY > 1
 609         printf("sr: srintr_hc(hc=%08x)\n", hc);
 610 #endif
 611
 612         /*
 613          * Since multiple interfaces may share this interrupt, we must loop
 614          * until no interrupts are still pending service.
 615          */
 616         while (1) {
 617                 /*
 618                  * Read all three interrupt status registers from the N2
 619                  * card...
 620                  */
 621                 isr0 = SRC_GET8(hc, sca->isr0);
 622                 isr1 = SRC_GET8(hc, sca->isr1);
 623                 isr2 = SRC_GET8(hc, sca->isr2);
 624
 625                 /*
 626                  * If all three registers returned 0, we've finished
 627                  * processing interrupts from this device, so we can quit
 628                  * this loop...
 629                  */
 630                 if ((isr0 | isr1 | isr2) == 0)
 631                         break;
 632
 633 #if BUGGY > 2
 634                 printf("src%d: srintr_hc isr0 %x, isr1 %x, isr2 %x\n",
 635 #ifndef NETGRAPH
 636                         unit, isr0, isr1, isr2);
 637 #else
 638                         hc->cunit, isr0, isr1, isr2);
 639 #endif /* NETGRAPH */
 640 #endif
 641
 642                 /*
 643                  * Now we can dispatch the interrupts. Since we don't expect
 644                  * either MSCI or timer interrupts, we'll test for DMA
 645                  * interrupts first...
 646                  */
 647                 if (isr1)       /* DMA-initiated interrupt */
 648                         sr_dmac_intr(hc, isr1);
 649
 650                 if (isr0)       /* serial part IRQ? */
 651                         sr_msci_intr(hc, isr0);
 652
 653                 if (isr2)       /* timer-initiated interrupt */
 654                         sr_timer_intr(hc, isr2);
 655         }
 656 }
 657
 658 /*
 659  * This will only start the transmitter. It is assumed that the data
 660  * is already there.
 661  * It is normally called from srstart() or sr_dmac_intr().
 662  */
 663 static void
 664 sr_xmit(struct sr_softc *sc)
 665 {
 666         u_short cda_value;      /* starting descriptor */
 667         u_short eda_value;      /* ending descriptor */
 668         struct sr_hardc *hc;
 669 #ifndef NETGRAPH
 670         struct ifnet *ifp;      /* O/S Network Services */
 671 #endif /* NETGRAPH */
 672         dmac_channel *dmac;     /* DMA channel registers */
 673
 674 #if BUGGY > 0
 675         printf("sr: sr_xmit( sc=%08x)\n", sc);
 676 #endif
 677
 678         hc = sc->hc;
 679 #ifndef NETGRAPH
 680         ifp = SC2IFP(sc);
 681 #endif /* NETGRAPH */
 682         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
 683
 684         /*
 685          * Get the starting and ending addresses of the chain to be
 686          * transmitted and pass these on to the DMA engine on-chip.
 687          */
 688         cda_value = sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart;
 689         cda_value &= 0x00ffff;
 690         eda_value = sc->block[sc->txb_next_tx].txeda + hc->mem_pstart;
 691         eda_value &= 0x00ffff;
 692
 693         SRC_PUT16(hc, dmac->cda, cda_value);
 694         SRC_PUT16(hc, dmac->eda, eda_value);
 695
 696         /*
 697          * Now we'll let the DMA status register know about this change
 698          */
 699         SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);
 700
 701         sc->xmit_busy = 1;      /* mark transmitter busy */
 702
 703 #if BUGGY > 2
 704         printf("sr%d: XMIT  cda=%04x, eda=%4x, rcda=%08lx\n",
 705                sc->unit, cda_value, eda_value,
 706                sc->block[sc->txb_next_tx].txdesc + hc->mem_pstart);
 707 #endif
 708
 709         sc->txb_next_tx++;      /* update next transmit seq# */
 710
 711         if (sc->txb_next_tx == SR_TX_BLOCKS)    /* handle wrap... */
 712                 sc->txb_next_tx = 0;
 713
 714 #ifndef NETGRAPH
 715         /*
 716          * Finally, we'll set a timout (which will start srwatchdog())
 717          * within the O/S network services layer...
 718          */
 719         ifp->if_timer = 2;      /* Value in seconds. */
 720 #else
 721         /*
 722          * Don't time out for a while.
 723          */
 724         sc->out_dog = DOG_HOLDOFF;      /* give ourself some breathing space*/
 725 #endif /* NETGRAPH */
 726 }
 727
 728 /*
 729  * This function will be called from the upper level when a user add a
 730  * packet to be send, and from the interrupt handler after a finished
 731  * transmit.
 732  *
 733  * NOTE: it should run at spl_imp().
 734  *
 735  * This function only place the data in the oncard buffers. It does not
 736  * start the transmition. sr_xmit() does that.
 737  *
 738  * Transmitter idle state is indicated by the IFF_DRV_OACTIVE flag.
 739  * The function that clears that should ensure that the transmitter
 740  * and its DMA is in a "good" idle state.
 741  */
 742 #ifndef NETGRAPH
 743 static void
 744 srstart(struct ifnet *ifp)
 745 {
 746         struct sr_softc *sc;    /* channel control structure */
 747 #else
 748 static void
 749 srstart(struct sr_softc *sc)
 750 {
 751 #endif /* NETGRAPH */
 752         struct sr_hardc *hc;    /* card control/config block */
 753         int len;                /* total length of a packet */
 754         int pkts;               /* packets placed in DPRAM */
 755         int tlen;               /* working length of pkt */
 756         u_int i;
 757         struct mbuf *mtx;       /* message buffer from O/S */
 758         u_char *txdata;         /* buffer address in DPRAM */
 759         sca_descriptor *txdesc; /* working descriptor pointr */
 760         struct buf_block *blkp;
 761
 762 #ifndef NETGRAPH
 763 #if BUGGY > 0
 764         printf("sr: srstart( ifp=%08x)\n", ifp);
 765 #endif
 766         sc = ifp->if_softc;
 767         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
 768                 return;
 769 #endif /* NETGRAPH */
 770         hc = sc->hc;
 771         /*
 772          * It is OK to set the memory window outside the loop because all tx
 773          * buffers and descriptors are assumed to be in the same 16K window.
 774          */
 775         if (hc->mempages) {
 776                 SRC_SET_ON(hc);
 777                 SRC_SET_MEM(hc, sc->block[0].txdesc);
 778         }
 779
 780         /*
 781          * Loop to place packets into DPRAM.
 782          *
 783          * We stay in this loop until there is nothing in
 784          * the TX queue left or the tx buffers are full.
 785          */
 786 top_srstart:
 787
 788         /*
 789          * See if we have space for more packets.
 790          */
 791         if (sc->txb_inuse == SR_TX_BLOCKS) {    /* out of space? */
 792 #ifndef NETGRAPH
 793                 ifp->if_drv_flags |= IFF_DRV_OACTIVE;   /* yes, mark active */
 794 #else
 795                 /*ifp->if_drv_flags |= IFF_DRV_OACTIVE;*/       /* yes, mark active */
 796 #endif /* NETGRAPH */
 797
 798                 if (hc->mempages)
 799                         SRC_SET_OFF(hc);
 800
 801 #if BUGGY > 9
 802                 printf("sr%d.srstart: sc->txb_inuse=%d; DPRAM full...\n",
 803                        sc->unit, sc->txb_inuse);
 804 #endif
 805                 return;
 806         }
 807         /*
 808          * OK, the card can take more traffic.  Let's see if there's any
 809          * pending from the system...
 810          *
 811          * NOTE:
 812          * The architecture of the networking interface doesn't
 813          * actually call us like 'write()', providing an address.  We get
 814          * started, a lot like a disk strategy routine, and we actually call
 815          * back out to the system to get traffic to send...
 816          *
 817          * NOTE:
 818          * If we were gonna run through another layer, we would use a
 819          * dispatch table to select the service we're getting a packet
 820          * from...
 821          */
 822 #ifndef NETGRAPH
 823         mtx = sppp_dequeue(ifp);
 824 #else /* NETGRAPH */
 825         IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 826         if (mtx == NULL) {
 827                 IF_DEQUEUE(&sc->xmitq, mtx);
 828         }
 829 #endif /* NETGRAPH */
 830         if (!mtx) {
 831                 if (hc->mempages)
 832                         SRC_SET_OFF(hc);
 833                 return;
 834         }
 835         /*
 836          * OK, we got a packet from the network services of the O/S. Now we
 837          * can move it into the DPRAM (under control of the descriptors) and
 838          * fire it off...
 839          */
 840         pkts = 0;
 841         i = 0;                  /* counts # of granules used */
 842
 843         blkp = &sc->block[sc->txb_new]; /* address of free granule */
 844         txdesc = (sca_descriptor *)
 845             (hc->mem_start + (blkp->txdesc & hc->winmsk));
 846
 847         txdata = (u_char *)(hc->mem_start
 848                             + (blkp->txstart & hc->winmsk));
 849
 850         /*
 851          * Now we'll try to install as many packets as possible into the
 852          * card's DP RAM buffers.
 853          */
 854         for (;;) {              /* perform actual copy of packet */
 855                 len = mtx->m_pkthdr.len;        /* length of message */
 856
 857 #if BUGGY > 1
 858                 printf("sr%d.srstart: mbuf @ %08lx, %d bytes\n",
 859                            sc->unit, mtx, len);
 860 #endif
 861
 862 #ifndef NETGRAPH
 863                 BPF_MTAP(ifp, mtx);
 864 #else   /* NETGRAPH */
 865                 sc->outbytes += len;
 866 #endif  /* NETGRAPH */
 867
 868                 /*
 869                  * We can perform a straight copy because the tranmit
 870                  * buffers won't wrap.
 871                  */
 872                 m_copydata(mtx, 0, len, txdata);
 873
 874                 /*
 875                  * Now we know how big the message is gonna be.  We must now
 876                  * construct the descriptors to drive this message out...
 877                  */
 878                 tlen = len;
 879                 while (tlen > SR_BUF_SIZ) {     /* loop for full granules */
 880                         txdesc->stat = 0;       /* reset bits */
 881                         txdesc->len = SR_BUF_SIZ;       /* size of granule */
 882                         tlen -= SR_BUF_SIZ;
 883
 884                         txdesc++;       /* move to next dscr */
 885                         txdata += SR_BUF_SIZ;   /* adjust data addr */
 886                         i++;
 887                 }
 888
 889                 /*
 890                  * This section handles the setting of the final piece of a
 891                  * message.
 892                  */
 893                 txdesc->stat = SCA_DESC_EOM;
 894                 txdesc->len = tlen;
 895                 pkts++;
 896
 897                 /*
 898                  * prepare for subsequent packets (if any)
 899                  */
 900                 txdesc++;
 901                 txdata += SR_BUF_SIZ;   /* next mem granule */
 902                 i++;            /* count of granules */
 903
 904                 /*
 905                  * OK, we've now placed the message into the DPRAM where it
 906                  * can be transmitted.  We'll now release the message memory
 907                  * and update the statistics...
 908                  */
 909                 m_freem(mtx);
 910 #ifndef NETGRAPH
 911                 ++SC2IFP(sc)->if_opackets;
 912 #else   /* NETGRAPH */
 913                 sc->opackets++;
 914 #endif /* NETGRAPH */
 915
 916                 /*
 917                  * Check if we have space for another packet. XXX This is
 918                  * hardcoded.  A packet can't be larger than 3 buffers (3 x
 919                  * 512).
 920                  */
 921                 if ((i + 3) >= blkp->txmax) {   /* enough remains? */
 922 #if BUGGY > 9
 923                         printf("sr%d.srstart: i=%d (%d pkts); card full.\n",
 924                                sc->unit, i, pkts);
 925 #endif
 926                         break;
 927                 }
 928                 /*
 929                  * We'll pull the next message to be sent (if any)
 930                  */
 931 #ifndef NETGRAPH
 932                 mtx = sppp_dequeue(ifp);
 933 #else /* NETGRAPH */
 934                 IF_DEQUEUE(&sc->xmitq_hipri, mtx);
 935                 if (mtx == NULL) {
 936                         IF_DEQUEUE(&sc->xmitq, mtx);
 937                 }
 938 #endif /* NETGRAPH */
 939                 if (!mtx) {     /* no message?  We're done! */
 940 #if BUGGY > 9
 941                         printf("sr%d.srstart: pending=0, pkts=%d\n",
 942                                sc->unit, pkts);
 943 #endif
 944                         break;
 945                 }
 946         }
 947
 948         blkp->txtail = i;       /* record next free granule */
 949
 950         /*
 951          * Mark the last descriptor, so that the SCA know where to stop.
 952          */
 953         txdesc--;               /* back up to last descriptor in list */
 954         txdesc->stat |= SCA_DESC_EOT;   /* mark as end of list */
 955
 956         /*
 957          * Now we'll reset the transmit granule's descriptor address so we
 958          * can record this in the structure and fire it off w/ the DMA
 959          * processor of the serial chip...
 960          */
 961         txdesc = (sca_descriptor *)(uintptr_t)blkp->txdesc;
 962         blkp->txeda = (u_short)((uintptr_t)&txdesc[i]);
 963
 964         sc->txb_inuse++;        /* update inuse status */
 965         sc->txb_new++;          /* new traffic wuz added */
 966
 967         if (sc->txb_new == SR_TX_BLOCKS)
 968                 sc->txb_new = 0;
 969
 970         /*
 971          * If the tranmitter wasn't marked as "busy" we will force it to be
 972          * started...
 973          */
 974         if (sc->xmit_busy == 0) {
 975                 sr_xmit(sc);
 976 #if BUGGY > 9
 977                 printf("sr%d.srstart: called sr_xmit()\n", sc->unit);
 978 #endif
 979         }
 980         goto top_srstart;
 981 }
 982
 983 #ifndef NETGRAPH
 984 /*
 985  * Handle ioctl's at the device level, though we *will* call up
 986  * a layer...
 987  */
 988 #if BUGGY > 2
 989 static int bug_splats[] = {0, 0, 0, 0, 0, 0, 0, 0};
 990 #endif
 991
 992 static int
 993 srioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
 994 {
 995         int s, error, was_up, should_be_up;
 996         struct sr_softc *sc = ifp->if_softc;
 997
 998 #if BUGGY > 0
 999         if_printf(ifp, "srioctl(ifp=%08x, cmd=%08x, data=%08x)\n",
1000                ifp, cmd, data);
1001 #endif
1002
1003         was_up = ifp->if_drv_flags & IFF_DRV_RUNNING;
1004
1005         error = sppp_ioctl(ifp, cmd, data);
1006
1007 #if BUGGY > 1
1008         if_printf(ifp, "ioctl: ifsppp.pp_flags = %08x, if_flags %08x.\n",
1009               ((struct sppp *)ifp)->pp_flags, ifp->if_flags);
1010 #endif
1011
1012         if (error)
1013                 return error;
1014
1015         if ((cmd != SIOCSIFFLAGS) && (cmd != SIOCSIFADDR)) {
1016 #if BUGGY > 2
1017                 if (bug_splats[sc->unit]++ < 2) {
1018                         printf("sr(%d).if_addrlist = %08x\n",
1019                                sc->unit, ifp->if_addrlist);
1020                         printf("sr(%d).if_bpf = %08x\n",
1021                                sc->unit, ifp->if_bpf);
1022                         printf("sr(%d).if_init = %08x\n",
1023                                sc->unit, ifp->if_init);
1024                         printf("sr(%d).if_output = %08x\n",
1025                                sc->unit, ifp->if_output);
1026                         printf("sr(%d).if_start = %08x\n",
1027                                sc->unit, ifp->if_start);
1028                         printf("sr(%d).if_done = %08x\n",
1029                                sc->unit, ifp->if_done);
1030                         printf("sr(%d).if_ioctl = %08x\n",
1031                                sc->unit, ifp->if_ioctl);
1032                         printf("sr(%d).if_reset = %08x\n",
1033                                sc->unit, ifp->if_reset);
1034                         printf("sr(%d).if_watchdog = %08x\n",
1035                                sc->unit, ifp->if_watchdog);
1036                 }
1037 #endif
1038                 return 0;
1039         }
1040
1041         s = splimp();
1042         should_be_up = ifp->if_drv_flags & IFF_DRV_RUNNING;
1043
1044         if (!was_up && should_be_up) {
1045                 /*
1046                  * Interface should be up -- start it.
1047                  */
1048                 sr_up(sc);
1049                 srstart(ifp);
1050
1051                 /*
1052                  * XXX Clear the IFF_UP flag so that the link will only go
1053                  * up after sppp lcp and ipcp negotiation.
1054                  */
1055                 /* ifp->if_flags &= ~IFF_UP; */
1056         } else if (was_up && !should_be_up) {
1057                 /*
1058                  * Interface should be down -- stop it.
1059                  */
1060                 sr_down(sc);
1061                 sppp_flush(ifp);
1062         }
1063         splx(s);
1064         return 0;
1065 }
1066 #endif /* NETGRAPH */
1067
1068 /*
1069  * This is to catch lost tx interrupts.
1070  */
1071 static void
1072 #ifndef NETGRAPH
1073 srwatchdog(struct ifnet *ifp)
1074 #else
1075 srwatchdog(struct sr_softc *sc)
1076 #endif /* NETGRAPH */
1077 {
1078         int     got_st0, got_st1, got_st3, got_dsr;
1079 #ifndef NETGRAPH
1080         struct sr_softc *sc = ifp->if_softc;
1081 #endif /* NETGRAPH */
1082         struct sr_hardc *hc = sc->hc;
1083         msci_channel *msci = &hc->sca->msci[sc->scachan];
1084         dmac_channel *dmac = &sc->hc->sca->dmac[sc->scachan];
1085
1086 #if BUGGY > 0
1087 #ifndef NETGRAPH
1088         printf("srwatchdog(unit=%d)\n", unit);
1089 #else
1090         printf("srwatchdog(unit=%d)\n", sc->unit);
1091 #endif /* NETGRAPH */
1092 #endif
1093
1094 #ifndef NETGRAPH
1095         if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1096                 return;
1097
1098         ifp->if_oerrors++;      /* update output error count */
1099 #else   /* NETGRAPH */
1100         sc->oerrors++;  /* update output error count */
1101 #endif /* NETGRAPH */
1102
1103         got_st0 = SRC_GET8(hc, msci->st0);
1104         got_st1 = SRC_GET8(hc, msci->st1);
1105         got_st3 = SRC_GET8(hc, msci->st3);
1106         got_dsr = SRC_GET8(hc, dmac->dsr);
1107
1108 #ifndef NETGRAPH
1109 #if     0
1110         if (ifp->if_flags & IFF_DEBUG)
1111 #endif
1112                 printf("sr%d: transmit failed, "
1113 #else   /* NETGRAPH */
1114         printf("sr%d: transmit failed, "
1115 #endif /* NETGRAPH */
1116                        "ST0 %02x, ST1 %02x, ST3 %02x, DSR %02x.\n",
1117                        sc->unit,
1118                        got_st0, got_st1, got_st3, got_dsr);
1119
1120         if (SRC_GET8(hc, msci->st1) & SCA_ST1_UDRN) {
1121                 SRC_PUT8(hc, msci->cmd, SCA_CMD_TXABORT);
1122                 SRC_PUT8(hc, msci->cmd, SCA_CMD_TXENABLE);
1123                 SRC_PUT8(hc, msci->st1, SCA_ST1_UDRN);
1124         }
1125         sc->xmit_busy = 0;
1126 #ifndef NETGRAPH
1127         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1128 #else
1129         /*ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; */
1130 #endif /* NETGRAPH */
1131
1132         if (sc->txb_inuse && --sc->txb_inuse)
1133                 sr_xmit(sc);
1134
1135 #ifndef NETGRAPH
1136         srstart(ifp);   /* restart transmitter */
1137 #else
1138         srstart(sc);    /* restart transmitter */
1139 #endif /* NETGRAPH */
1140 }
1141
1142 static void
1143 sr_up(struct sr_softc *sc)
1144 {
1145         struct sr_hardc *hc = sc->hc;
1146         sca_regs *sca = hc->sca;
1147         msci_channel *msci = &sca->msci[sc->scachan];
1148
1149 #if BUGGY > 0
1150         printf("sr_up(sc=%08x)\n", sc);
1151 #endif
1152
1153         /*
1154          * Enable transmitter and receiver. Raise DTR and RTS. Enable
1155          * interrupts.
1156          *
1157          * XXX What about using AUTO mode in msci->md0 ???
1158          */
1159         SRC_PUT8(hc, msci->ctl, SRC_GET8(hc, msci->ctl) & ~SCA_CTL_RTS);
1160
1161         if (sc->scachan == 0)
1162                 switch (hc->cardtype) {
1163                 case SR_CRD_N2:
1164                         sr_outb(hc, SR_MCR,
1165                             (sr_inb(hc, SR_MCR) & ~SR_MCR_DTR0));
1166                         break;
1167                 case SR_CRD_N2PCI:
1168                         sr_write_fecr(hc, sr_read_fecr(hc) & ~SR_FECR_DTR0);
1169                         break;
1170                 }
1171         else
1172                 switch (hc->cardtype) {
1173                 case SR_CRD_N2:
1174                         sr_outb(hc, SR_MCR,
1175                             (sr_inb(hc, SR_MCR) & ~SR_MCR_DTR1));
1176                         break;
1177                 case SR_CRD_N2PCI:
1178                         sr_write_fecr(hc, sr_read_fecr(hc) & ~SR_FECR_DTR1);
1179                         break;
1180                 }
1181
1182         if (sc->scachan == 0) {
1183                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) | 0x000F);
1184                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) | 0x000F);
1185         } else {
1186                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) | 0x00F0);
1187                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) | 0x00F0);
1188         }
1189
1190         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXENABLE);
1191         sr_inb(hc, 0);  /* XXX slow it down a bit. */
1192         SRC_PUT8(hc, msci->cmd, SCA_CMD_TXENABLE);
1193
1194 #ifndef NETGRAPH
1195 #ifdef USE_MODEMCK
1196         if (sr_watcher == 0)
1197                 sr_modemck(NULL);
1198 #endif
1199 #else   /* NETGRAPH */
1200         untimeout(ngsr_watchdog_frame, sc, sc->handle);
1201         sc->handle = timeout(ngsr_watchdog_frame, sc, hz);
1202         sc->running = 1;
1203 #endif /* NETGRAPH */
1204 }
1205
1206 static void
1207 sr_down(struct sr_softc *sc)
1208 {
1209         struct sr_hardc *hc = sc->hc;
1210         sca_regs *sca = hc->sca;
1211         msci_channel *msci = &sca->msci[sc->scachan];
1212
1213 #if BUGGY > 0
1214         printf("sr_down(sc=%08x)\n", sc);
1215 #endif
1216 #ifdef NETGRAPH
1217         untimeout(ngsr_watchdog_frame, sc, sc->handle);
1218         sc->running = 0;
1219 #endif /* NETGRAPH */
1220
1221         /*
1222          * Disable transmitter and receiver. Lower DTR and RTS. Disable
1223          * interrupts.
1224          */
1225         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXDISABLE);
1226         sr_inb(hc, 0);  /* XXX slow it down a bit. */
1227         SRC_PUT8(hc, msci->cmd, SCA_CMD_TXDISABLE);
1228
1229         SRC_PUT8(hc, msci->ctl, SRC_GET8(hc, msci->ctl) | SCA_CTL_RTS);
1230
1231         if (sc->scachan == 0)
1232                 switch (hc->cardtype) {
1233                 case SR_CRD_N2:
1234                         sr_outb(hc, SR_MCR, sr_inb(hc, SR_MCR) | SR_MCR_DTR0);
1235                         break;
1236                 case SR_CRD_N2PCI:
1237                         sr_write_fecr(hc, sr_read_fecr(hc) | SR_FECR_DTR0);
1238                         break;
1239                 }
1240         else
1241                 switch (hc->cardtype) {
1242                 case SR_CRD_N2:
1243                         sr_outb(hc, SR_MCR, sr_inb(hc, SR_MCR) | SR_MCR_DTR1);
1244                         break;
1245                 case SR_CRD_N2PCI:
1246                         sr_write_fecr(hc, sr_read_fecr(hc) | SR_FECR_DTR1);
1247                         break;
1248                 }
1249
1250         if (sc->scachan == 0) {
1251                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) & ~0x0F);
1252                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) & ~0x0F);
1253         } else {
1254                 SRC_PUT8(hc, sca->ier0, SRC_GET8(hc, sca->ier0) & ~0xF0);
1255                 SRC_PUT8(hc, sca->ier1, SRC_GET8(hc, sca->ier1) & ~0xF0);
1256         }
1257 }
1258
1259 /*
1260  * Initialize the card, allocate memory for the sr_softc structures
1261  * and fill in the pointers.
1262  */
1263 static void
1264 src_init(struct sr_hardc *hc)
1265 {
1266         struct sr_softc *sc = hc->sc;
1267         int x;
1268         u_int chanmem;
1269         u_int bufmem;
1270         u_int next;
1271         u_int descneeded;
1272
1273 #if BUGGY > 0
1274         printf("src_init(hc=%08x)\n", hc);
1275 #endif
1276
1277         chanmem = hc->memsize / hc->numports;
1278         next = 0;
1279
1280         for (x = 0; x < hc->numports; x++, sc++) {
1281                 int blk;
1282
1283                 for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1284                         sc->block[blk].txdesc = next;
1285                         bufmem = (16 * 1024) / SR_TX_BLOCKS;
1286                         descneeded = bufmem / SR_BUF_SIZ;
1287
1288                         sc->block[blk].txstart = sc->block[blk].txdesc
1289                             + ((((descneeded * sizeof(sca_descriptor))
1290                                  / SR_BUF_SIZ) + 1)
1291                                * SR_BUF_SIZ);
1292
1293                         sc->block[blk].txend = next + bufmem;
1294                         sc->block[blk].txmax =
1295                             (sc->block[blk].txend - sc->block[blk].txstart)
1296                             / SR_BUF_SIZ;
1297                         next += bufmem;
1298
1299 #if BUGGY > 2
1300                         printf("sr%d: blk %d: txdesc %08x, txstart %08x\n",
1301                                sc->unit, blk,
1302                                sc->block[blk].txdesc, sc->block[blk].txstart);
1303 #endif
1304                 }
1305
1306                 sc->rxdesc = next;
1307                 bufmem = chanmem - (bufmem * SR_TX_BLOCKS);
1308                 descneeded = bufmem / SR_BUF_SIZ;
1309                 sc->rxstart = sc->rxdesc +
1310                     ((((descneeded * sizeof(sca_descriptor)) /
1311                        SR_BUF_SIZ) + 1) * SR_BUF_SIZ);
1312                 sc->rxend = next + bufmem;
1313                 sc->rxmax = (sc->rxend - sc->rxstart) / SR_BUF_SIZ;
1314                 next += bufmem;
1315         }
1316 }
1317
1318 /*
1319  * The things done here are channel independent.
1320  *
1321  * Configure the sca waitstates.
1322  * Configure the global interrupt registers.
1323  * Enable master dma enable.
1324  */
1325 static void
1326 sr_init_sca(struct sr_hardc *hc)
1327 {
1328         sca_regs *sca = hc->sca;
1329
1330 #if BUGGY > 0
1331         printf("sr_init_sca(hc=%08x)\n", hc);
1332 #endif
1333
1334         /*
1335          * Do the wait registers. Set everything to 0 wait states.
1336          */
1337         SRC_PUT8(hc, sca->pabr0, 0);
1338         SRC_PUT8(hc, sca->pabr1, 0);
1339         SRC_PUT8(hc, sca->wcrl, 0);
1340         SRC_PUT8(hc, sca->wcrm, 0);
1341         SRC_PUT8(hc, sca->wcrh, 0);
1342
1343         /*
1344          * Configure the interrupt registers. Most are cleared until the
1345          * interface is configured.
1346          */
1347         SRC_PUT8(hc, sca->ier0, 0x00);          /* MSCI interrupts. */
1348         SRC_PUT8(hc, sca->ier1, 0x00);          /* DMAC interrupts */
1349         SRC_PUT8(hc, sca->ier2, 0x00);          /* TIMER interrupts. */
1350         SRC_PUT8(hc, sca->itcr, 0x00);          /* Use ivr and no intr ack */
1351         SRC_PUT8(hc, sca->ivr, 0x40);           /* Interrupt vector. */
1352         SRC_PUT8(hc, sca->imvr, 0x40);
1353
1354         /*
1355          * Configure the timers. XXX Later
1356          */
1357
1358         /*
1359          * Set the DMA channel priority to rotate between all four channels.
1360          *
1361          * Enable all dma channels.
1362          */
1363         SRC_PUT8(hc, sca->pcr, SCA_PCR_PR2);
1364         SRC_PUT8(hc, sca->dmer, SCA_DMER_EN);
1365 }
1366
1367 /*
1368  * Configure the msci
1369  *
1370  * NOTE: The serial port configuration is hardcoded at the moment.
1371  */
1372 static void
1373 sr_init_msci(struct sr_softc *sc)
1374 {
1375         int portndx;            /* on-board port number */
1376         u_int mcr_v;            /* contents of modem control */
1377         struct sr_hardc *hc = sc->hc;
1378         msci_channel *msci = &hc->sca->msci[sc->scachan];
1379 #ifdef N2_TEST_SPEED
1380         int br_v;               /* contents for BR divisor */
1381         int etcndx;             /* index into ETC table */
1382         int fifo_v, gotspeed;   /* final tabled speed found */
1383         int tmc_v;              /* timer control register */
1384         int wanted;             /* speed (bitrate) wanted... */
1385         struct rate_line *rtp;
1386 #endif
1387
1388         portndx = sc->scachan;
1389
1390 #if BUGGY > 0
1391         printf("sr: sr_init_msci( sc=%08x)\n", sc);
1392 #endif
1393
1394         SRC_PUT8(hc, msci->cmd, SCA_CMD_RESET);
1395         SRC_PUT8(hc, msci->md0, SCA_MD0_CRC_1 | SCA_MD0_CRC_CCITT |
1396             SCA_MD0_CRC_ENABLE | SCA_MD0_MODE_HDLC);
1397         SRC_PUT8(hc, msci->md1, SCA_MD1_NOADDRCHK);
1398         SRC_PUT8(hc, msci->md2, SCA_MD2_DUPLEX | SCA_MD2_NRZ);
1399
1400         /*
1401          * According to the manual I should give a reset after changing the
1402          * mode registers.
1403          */
1404         SRC_PUT8(hc, msci->cmd, SCA_CMD_RXRESET);
1405         SRC_PUT8(hc, msci->ctl, SCA_CTL_IDLPAT | SCA_CTL_UDRNC | SCA_CTL_RTS);
1406
1407         /*
1408          * XXX Later we will have to support different clock settings.
1409          */
1410         switch (sc->clk_cfg) {
1411         default:
1412 #if BUGGY > 0
1413                 printf("sr%: clk_cfg=%08x, selected default clock.\n",
1414                        portndx, sc->clk_cfg);
1415 #endif
1416                 /* FALLTHROUGH */
1417         case SR_FLAGS_EXT_CLK:
1418                 /*
1419                  * For now all interfaces are programmed to use the RX clock
1420                  * for the TX clock.
1421                  */
1422
1423 #if BUGGY > 0
1424                 printf("sr%d: External Clock Selected.\n", portndx);
1425 #endif
1426
1427                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1428                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_RX | SCA_TXS_DIV1);
1429                 break;
1430
1431         case SR_FLAGS_EXT_SEP_CLK:
1432 #if BUGGY > 0
1433                 printf("sr%d: Split Clocking Selected.\n", portndx);
1434 #endif
1435
1436                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_RXC0 | SCA_RXS_DIV1);
1437                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_TXC | SCA_TXS_DIV1);
1438                 break;
1439
1440         case SR_FLAGS_INT_CLK:
1441 #if BUGGY > 0
1442                 printf("sr%d: Internal Clocking selected.\n", portndx);
1443 #endif
1444
1445                 /*
1446                  * XXX I do need some code to set the baud rate here!
1447                  */
1448 #ifdef N2_TEST_SPEED
1449                 switch (hc->cardtype) {
1450                 case SR_CRD_N2PCI:
1451                         mcr_v = sr_read_fecr(hc);
1452                         etcndx = 2;
1453                         break;
1454                 case SR_CRD_N2:
1455                 default:
1456                         mcr_v = sr_inb(hc, SR_MCR);
1457                         etcndx = 0;
1458                 }
1459
1460                 fifo_v = 0x10;  /* stolen from Linux version */
1461
1462                 /*
1463                  * search for appropriate speed in table, don't calc it:
1464                  */
1465                 wanted = sr_test_speed[portndx];
1466                 rtp = &n2_rates[0];     /* point to first table item */
1467
1468                 while ((rtp->target > 0)        /* search table for speed */
1469                        &&(rtp->target != wanted))
1470                         rtp++;
1471
1472                 /*
1473                  * We've searched the table for a matching speed.  If we've
1474                  * found the correct rate line, we'll get the pre-calc'd
1475                  * values for the TMC and baud rate divisor for subsequent
1476                  * use...
1477                  */
1478                 if (rtp->target > 0) {  /* use table-provided values */
1479                         gotspeed = wanted;
1480                         tmc_v = rtp->tmc_reg;
1481                         br_v = rtp->br_reg;
1482                 } else {        /* otherwise assume 1MBit comm rate */
1483                         gotspeed = 10000;
1484                         tmc_v = 5;
1485                         br_v = 1;
1486                 }
1487
1488                 /*
1489                  * Now we mask in the enable clock output for the MCR:
1490                  */
1491                 mcr_v |= etc0vals[etcndx + portndx];
1492
1493                 /*
1494                  * Now we'll program the registers with these speed- related
1495                  * contents...
1496                  */
1497                 SRC_PUT8(hc, msci->tmc, tmc_v);
1498                 SRC_PUT8(hc, msci->trc0, fifo_v);
1499                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_INT + br_v);
1500                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_INT + br_v);
1501
1502                 switch (hc->cardtype) {
1503                 case SR_CRD_N2PCI:
1504                         sr_write_fecr(hc, mcr_v);
1505                         break;
1506                 case SR_CRD_N2:
1507                 default:
1508                         sr_outb(hc, SR_MCR, mcr_v);
1509                 }
1510
1511 #if BUGGY > 0
1512                 if (wanted != gotspeed)
1513                         printf("sr%d: Speed wanted=%d, found=%d\n",
1514                                wanted, gotspeed);
1515
1516                 printf("sr%d: Internal Clock %dx100 BPS, tmc=%d, div=%d\n",
1517                        portndx, gotspeed, tmc_v, br_v);
1518 #endif
1519 #else
1520                 SRC_PUT8(hc, msci->rxs, SCA_RXS_CLK_INT | SCA_RXS_DIV1);
1521                 SRC_PUT8(hc, msci->txs, SCA_TXS_CLK_INT | SCA_TXS_DIV1);
1522
1523                 SRC_PUT8(hc, msci->tmc, 5);
1524
1525                 if (portndx == 0)
1526                         switch (hc->cardtype) {
1527                         case SR_CRD_N2PCI:
1528                                 sr_write_fecr(hc,
1529                                     sr_read_fecr(hc) | SR_FECR_ETC0);
1530                                 break;
1531                         case SR_CRD_N2:
1532                         default:
1533                                 mcr_v = sr_inb(hc, SR_MCR);
1534                                 mcr_v |= SR_MCR_ETC0;
1535                                 sr_outb(hc, SR_MCR, mcr_v);
1536                         }
1537                 else
1538                         switch (hc->cardtype) {
1539                         case SR_CRD_N2:
1540                                 mcr_v = sr_inb(hc, SR_MCR);
1541                                 mcr_v |= SR_MCR_ETC1;
1542                                 sr_outb(hc, SR_MCR, mcr_v);
1543                                 break;
1544                         case SR_CRD_N2PCI:
1545                                 sr_write_fecr(hc,
1546                                     sr_read_fecr(hc) | SR_FECR_ETC1);
1547                                 break;
1548                         }
1549 #endif
1550         }
1551
1552         /*
1553          * XXX Disable all interrupts for now. I think if you are using the
1554          * dmac you don't use these interrupts.
1555          */
1556         SRC_PUT8(hc, msci->ie0, 0);
1557         SRC_PUT8(hc, msci->ie1, 0x0C);
1558         SRC_PUT8(hc, msci->ie2, 0);
1559         SRC_PUT8(hc, msci->fie, 0);
1560
1561         SRC_PUT8(hc, msci->sa0, 0);
1562         SRC_PUT8(hc, msci->sa1, 0);
1563
1564         SRC_PUT8(hc, msci->idl, 0x7E);  /* set flags value */
1565
1566         SRC_PUT8(hc, msci->rrc, 0x0E);
1567         SRC_PUT8(hc, msci->trc0, 0x10);
1568         SRC_PUT8(hc, msci->trc1, 0x1F);
1569 }
1570
1571 /*
1572  * Configure the rx dma controller.
1573  */
1574 static void
1575 sr_init_rx_dmac(struct sr_softc *sc)
1576 {
1577         struct sr_hardc *hc;
1578         dmac_channel *dmac;
1579         sca_descriptor *rxd;
1580         u_int cda_v, sarb_v, rxbuf, rxda, rxda_d;
1581
1582 #if BUGGY > 0
1583         printf("sr_init_rx_dmac(sc=%08x)\n", sc);
1584 #endif
1585
1586         hc = sc->hc;
1587         dmac = &hc->sca->dmac[DMAC_RXCH(sc->scachan)];
1588
1589         if (hc->mempages)
1590                 SRC_SET_MEM(hc, sc->rxdesc);
1591
1592         /*
1593          * This phase initializes the contents of the descriptor table
1594          * needed to construct a circular buffer...
1595          */
1596         rxd = (sca_descriptor *)(hc->mem_start + (sc->rxdesc & hc->winmsk));
1597         rxda_d = (uintptr_t) hc->mem_start - (sc->rxdesc & ~hc->winmsk);
1598
1599         for (rxbuf = sc->rxstart;
1600              rxbuf < sc->rxend;
1601              rxbuf += SR_BUF_SIZ, rxd++) {
1602                 /*
1603                  * construct the circular chain...
1604                  */
1605                 rxda = (uintptr_t) &rxd[1] - rxda_d + hc->mem_pstart;
1606                 rxd->cp = (u_short)(rxda & 0xffff);
1607
1608                 /*
1609                  * set the on-card buffer address...
1610                  */
1611                 rxd->bp = (u_short)((rxbuf + hc->mem_pstart) & 0xffff);
1612                 rxd->bpb = (u_char)(((rxbuf + hc->mem_pstart) >> 16) & 0xff);
1613
1614                 rxd->len = 0;   /* bytes resident w/in granule */
1615                 rxd->stat = 0xff;       /* The sca write here when finished */
1616         }
1617
1618         /*
1619          * heal the chain so that the last entry points to the first...
1620          */
1621         rxd--;
1622         rxd->cp = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1623
1624         /*
1625          * reset the reception handler's index...
1626          */
1627         sc->rxhind = 0;
1628
1629         /*
1630          * We'll now configure the receiver's DMA logic...
1631          */
1632         SRC_PUT8(hc, dmac->dsr, 0);     /* Disable DMA transfer */
1633         SRC_PUT8(hc, dmac->dcr, SCA_DCR_ABRT);
1634
1635         /* XXX maybe also SCA_DMR_CNTE */
1636         SRC_PUT8(hc, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1637         SRC_PUT16(hc, dmac->bfl, SR_BUF_SIZ);
1638
1639         cda_v = (u_short)((sc->rxdesc + hc->mem_pstart) & 0xffff);
1640         sarb_v = (u_char)(((sc->rxdesc + hc->mem_pstart) >> 16) & 0xff);
1641
1642         SRC_PUT16(hc, dmac->cda, cda_v);
1643         SRC_PUT8(hc, dmac->sarb, sarb_v);
1644
1645         rxd = (sca_descriptor *)(uintptr_t)sc->rxstart;
1646
1647         SRC_PUT16(hc, dmac->eda,
1648             (u_short)((uintptr_t)&rxd[sc->rxmax - 1] & 0xffff));
1649
1650         SRC_PUT8(hc, dmac->dir, 0xF0);
1651
1652         SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);    /* Enable DMA */
1653 }
1654
1655 /*
1656  * Configure the TX DMA descriptors.
1657  * Initialize the needed values and chain the descriptors.
1658  */
1659 static void
1660 sr_init_tx_dmac(struct sr_softc *sc)
1661 {
1662         int blk;
1663         u_int txbuf, txda, txda_d;
1664         struct sr_hardc *hc;
1665         sca_descriptor *txd;
1666         dmac_channel *dmac;
1667         struct buf_block *blkp;
1668         u_int x;
1669         u_int sarb_v;
1670
1671 #if BUGGY > 0
1672         printf("sr_init_tx_dmac(sc=%08x)\n", sc);
1673 #endif
1674
1675         hc = sc->hc;
1676         dmac = &hc->sca->dmac[DMAC_TXCH(sc->scachan)];
1677
1678         if (hc->mempages)
1679                 SRC_SET_MEM(hc, sc->block[0].txdesc);
1680
1681         /*
1682          * Initialize the array of descriptors for transmission
1683          */
1684         for (blk = 0; blk < SR_TX_BLOCKS; blk++) {
1685                 blkp = &sc->block[blk];
1686                 txd = (sca_descriptor *)(hc->mem_start
1687                                          + (blkp->txdesc & hc->winmsk));
1688                 txda_d = (uintptr_t) hc->mem_start
1689                     - (blkp->txdesc & ~hc->winmsk);
1690
1691                 x = 0;
1692                 txbuf = blkp->txstart;
1693                 for (; txbuf < blkp->txend; txbuf += SR_BUF_SIZ, txd++) {
1694                         txda = (uintptr_t) &txd[1] - txda_d + hc->mem_pstart;
1695                         txd->cp = (u_short)(txda & 0xffff);
1696
1697                         txd->bp = (u_short)((txbuf + hc->mem_pstart)
1698                                             & 0xffff);
1699                         txd->bpb = (u_char)(((txbuf + hc->mem_pstart) >> 16)
1700                                             & 0xff);
1701                         txd->len = 0;
1702                         txd->stat = 0;
1703                         x++;
1704                 }
1705
1706                 txd--;
1707                 txd->cp = (u_short)((blkp->txdesc + hc->mem_pstart)
1708                                     & 0xffff);
1709
1710                 blkp->txtail = (uintptr_t)txd - (uintptr_t)hc->mem_start;
1711         }
1712
1713         SRC_PUT8(hc, dmac->dsr, 0);     /* Disable DMA */
1714         SRC_PUT8(hc, dmac->dcr, SCA_DCR_ABRT);
1715         SRC_PUT8(hc, dmac->dmr, SCA_DMR_TMOD | SCA_DMR_NF);
1716         SRC_PUT8(hc, dmac->dir, SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF);
1717
1718         sarb_v = (sc->block[0].txdesc + hc->mem_pstart) >> 16;
1719         sarb_v &= 0x00ff;
1720
1721         SRC_PUT8(hc, dmac->sarb, (u_char) sarb_v);
1722 }
1723
1724 /*
1725  * Look through the descriptors to see if there is a complete packet
1726  * available. Stop if we get to where the sca is busy.
1727  *
1728  * Return the length and status of the packet.
1729  * Return nonzero if there is a packet available.
1730  *
1731  * NOTE:
1732  * It seems that we get the interrupt a bit early. The updateing of
1733  * descriptor values is not always completed when this is called.
1734  */
1735 static int
1736 sr_packet_avail(struct sr_softc *sc, int *len, u_char *rxstat)
1737 {
1738         int granules;   /* count of granules in pkt */
1739         int wki, wko;
1740         struct sr_hardc *hc;
1741         sca_descriptor *rxdesc; /* current descriptor */
1742         sca_descriptor *endp;   /* ending descriptor */
1743         sca_descriptor *cda;    /* starting descriptor */
1744
1745         hc = sc->hc;            /* get card's information */
1746
1747         /*
1748          * set up starting descriptor by pulling that info from the DMA half
1749          * of the HD chip...
1750          */
1751         wki = DMAC_RXCH(sc->scachan);
1752         wko = SRC_GET16(hc, hc->sca->dmac[wki].cda);
1753
1754         cda = (sca_descriptor *)(hc->mem_start + (wko & hc->winmsk));
1755
1756 #if BUGGY > 1
1757         printf("sr_packet_avail(): wki=%d, wko=%04x, cda=%08x\n",
1758                wki, wko, cda);
1759 #endif
1760
1761         /*
1762          * open the appropriate memory window and set our expectations...
1763          */
1764         if (hc->mempages) {
1765                 SRC_SET_MEM(hc, sc->rxdesc);
1766                 SRC_SET_ON(hc);
1767         }
1768         rxdesc = (sca_descriptor *)
1769             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1770         endp = rxdesc;
1771         rxdesc = &rxdesc[sc->rxhind];
1772         endp = &endp[sc->rxmax];
1773
1774         *len = 0;               /* reset result total length */
1775         granules = 0;           /* reset count of granules */
1776
1777         /*
1778          * This loop will scan descriptors, but it *will* puke up if we wrap
1779          * around to our starting point...
1780          */
1781         while (rxdesc != cda) {
1782                 *len += rxdesc->len;    /* increment result length */
1783                 granules++;
1784
1785                 /*
1786                  * If we hit a valid packet's completion we'll know we've
1787                  * got a live one, and that we can deliver the packet.
1788                  * Since we're only allowed to report a packet available,
1789                  * somebody else does that...
1790                  */
1791                 if (rxdesc->stat & SCA_DESC_EOM) {      /* End Of Message */
1792                         *rxstat = rxdesc->stat; /* return closing */
1793 #if BUGGY > 0
1794                         printf("sr%d: PKT AVAIL len %d, %x, bufs %u.\n",
1795                                sc->unit, *len, *rxstat, granules);
1796 #endif
1797                         return 1;       /* indicate success */
1798                 }
1799                 /*
1800                  * OK, this packet take up multiple granules.  Move on to
1801                  * the next descriptor so we can consider it...
1802                  */
1803                 rxdesc++;
1804
1805                 if (rxdesc == endp)     /* recognize & act on wrap point */
1806                         rxdesc = (sca_descriptor *)
1807                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1808         }
1809
1810         /*
1811          * Nothing found in the DPRAM.  Let the caller know...
1812          */
1813         *len = 0;
1814         *rxstat = 0;
1815
1816         return 0;
1817 }
1818
1819 /*
1820  * Copy a packet from the on card memory into a provided mbuf.
1821  * Take into account that buffers wrap and that a packet may
1822  * be larger than a buffer.
1823  */
1824 static void
1825 sr_copy_rxbuf(struct mbuf *m, struct sr_softc *sc, int len)
1826 {
1827         struct sr_hardc *hc;
1828         sca_descriptor *rxdesc;
1829         u_int rxdata;
1830         u_int rxmax;
1831         u_int off = 0;
1832         u_int tlen;
1833
1834 #if BUGGY > 0
1835         printf("sr_copy_rxbuf(m=%08x,sc=%08x,len=%d)\n",
1836                m, sc, len);
1837 #endif
1838
1839         hc = sc->hc;
1840
1841         rxdata = sc->rxstart + (sc->rxhind * SR_BUF_SIZ);
1842         rxmax = sc->rxstart + (sc->rxmax * SR_BUF_SIZ);
1843
1844         rxdesc = (sca_descriptor *)
1845             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1846         rxdesc = &rxdesc[sc->rxhind];
1847
1848         /*
1849          * Using the count of bytes in the received packet, we decrement it
1850          * for each granule (controller by an SCA descriptor) to control the
1851          * looping...
1852          */
1853         while (len) {
1854                 /*
1855                  * tlen gets the length of *this* granule... ...which is
1856                  * then copied to the target buffer.
1857                  */
1858                 tlen = (len < SR_BUF_SIZ) ? len : SR_BUF_SIZ;
1859
1860                 if (hc->mempages)
1861                         SRC_SET_MEM(hc, rxdata);
1862
1863                 bcopy(hc->mem_start + (rxdata & hc->winmsk),
1864                       mtod(m, caddr_t) +off,
1865                       tlen);
1866
1867                 off += tlen;
1868                 len -= tlen;
1869
1870                 /*
1871                  * now, return to the descriptor's window in DPRAM and reset
1872                  * the descriptor we've just suctioned...
1873                  */
1874                 if (hc->mempages)
1875                         SRC_SET_MEM(hc, sc->rxdesc);
1876
1877                 rxdesc->len = 0;
1878                 rxdesc->stat = 0xff;
1879
1880                 /*
1881                  * Move on to the next granule.  If we've any remaining
1882                  * bytes to process we'll just continue in our loop...
1883                  */
1884                 rxdata += SR_BUF_SIZ;
1885                 rxdesc++;
1886
1887                 if (rxdata == rxmax) {  /* handle the wrap point */
1888                         rxdata = sc->rxstart;
1889                         rxdesc = (sca_descriptor *)
1890                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1891                 }
1892         }
1893 }
1894
1895 /*
1896  * If single is set, just eat a packet. Otherwise eat everything up to
1897  * where cda points. Update pointers to point to the next packet.
1898  *
1899  * This handles "flushing" of a packet as received...
1900  *
1901  * If the "single" parameter is zero, all pending reeceive traffic will
1902  * be flushed out of existence.  A non-zero value will only drop the
1903  * *next* (currently) pending packet...
1904  */
1905 static void
1906 sr_eat_packet(struct sr_softc *sc, int single)
1907 {
1908         struct sr_hardc *hc;
1909         sca_descriptor *rxdesc; /* current descriptor being eval'd */
1910         sca_descriptor *endp;   /* last descriptor in chain */
1911         sca_descriptor *cda;    /* current start point */
1912         u_int loopcnt = 0;      /* count of packets flushed ??? */
1913         u_char stat;            /* captured status byte from descr */
1914
1915         hc = sc->hc;
1916         cda = (sca_descriptor *)(hc->mem_start + (SRC_GET16(hc,
1917             hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda) & hc->winmsk));
1918
1919         /*
1920          * loop until desc->stat == (0xff || EOM) Clear the status and
1921          * length in the descriptor. Increment the descriptor.
1922          */
1923         if (hc->mempages)
1924                 SRC_SET_MEM(hc, sc->rxdesc);
1925
1926         rxdesc = (sca_descriptor *)
1927             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1928         endp = rxdesc;
1929         rxdesc = &rxdesc[sc->rxhind];
1930         endp = &endp[sc->rxmax];
1931
1932         /*
1933          * allow loop, but abort it if we wrap completely...
1934          */
1935         while (rxdesc != cda) {
1936                 loopcnt++;
1937
1938                 if (loopcnt > sc->rxmax) {
1939                         printf("sr%d: eat pkt %d loop, cda %p, "
1940                                "rxdesc %p, stat %x.\n",
1941                                sc->unit, loopcnt, cda, rxdesc,
1942                                rxdesc->stat);
1943                         break;
1944                 }
1945                 stat = rxdesc->stat;
1946
1947                 rxdesc->len = 0;
1948                 rxdesc->stat = 0xff;
1949
1950                 rxdesc++;
1951                 sc->rxhind++;
1952
1953                 if (rxdesc == endp) {
1954                         rxdesc = (sca_descriptor *)
1955                             (hc->mem_start + (sc->rxdesc & hc->winmsk));
1956                         sc->rxhind = 0;
1957                 }
1958                 if (single && (stat == SCA_DESC_EOM))
1959                         break;
1960         }
1961
1962         /*
1963          * Update the eda to the previous descriptor.
1964          */
1965         rxdesc = (sca_descriptor *)(uintptr_t)sc->rxdesc;
1966         rxdesc = &rxdesc[(sc->rxhind + sc->rxmax - 2) % sc->rxmax];
1967
1968         SRC_PUT16(hc, hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
1969             (u_short)(((uintptr_t)rxdesc + hc->mem_pstart) & 0xffff));
1970 }
1971
1972 /*
1973  * While there is packets available in the rx buffer, read them out
1974  * into mbufs and ship them off.
1975  */
1976 static void
1977 sr_get_packets(struct sr_softc *sc)
1978 {
1979         u_char rxstat;          /* acquired status byte */
1980         int i;
1981         int pkts;               /* count of packets found */
1982         int rxndx;              /* rcv buffer index */
1983         int tries;              /* settling time counter */
1984         u_int len;              /* length of pending packet */
1985         struct sr_hardc *hc;    /* card-level information */
1986         sca_descriptor *rxdesc; /* descriptor in memory */
1987 #ifndef NETGRAPH
1988         struct ifnet *ifp;      /* network intf ctl table */
1989 #else
1990         int error;
1991 #endif /* NETGRAPH */
1992         struct mbuf *m = NULL;  /* message buffer */
1993
1994 #if BUGGY > 0
1995         printf("sr_get_packets(sc=%08x)\n", sc);
1996 #endif
1997
1998         hc = sc->hc;
1999 #ifndef NETGRAPH
2000         ifp = SC2IFP(sc);
2001 #endif /* NETGRAPH */
2002
2003         if (hc->mempages) {
2004                 SRC_SET_MEM(hc, sc->rxdesc);
2005                 SRC_SET_ON(hc); /* enable shared memory */
2006         }
2007         pkts = 0;               /* reset count of found packets */
2008
2009         /*
2010          * for each complete packet in the receiving pool, process each
2011          * packet...
2012          */
2013         while (sr_packet_avail(sc, &len, &rxstat)) {    /* packet pending? */
2014                 /*
2015                  * I have seen situations where we got the interrupt but the
2016                  * status value wasn't deposited.  This code should allow
2017                  * the status byte's value to settle...
2018                  */
2019
2020                 tries = 5;
2021
2022                 while ((rxstat == 0x00ff)
2023                        && --tries)
2024                         sr_packet_avail(sc, &len, &rxstat);
2025
2026 #if BUGGY > 1
2027                 printf("sr_packet_avail() returned len=%d, rxstat=%02ux\n",
2028                        len, rxstat);
2029 #endif
2030
2031                 pkts++;
2032 #ifdef NETGRAPH
2033                 sc->inbytes += len;
2034                 sc->inlast = 0;
2035 #endif /* NETGRAPH */
2036
2037                 /*
2038                  * OK, we've settled the incoming message status. We can now
2039                  * process it...
2040                  */
2041                 if (((rxstat & SCA_DESC_ERRORS) == 0) && (len < MCLBYTES)) {
2042 #if BUGGY > 1
2043                         printf("sr%d: sr_get_packet() rxstat=%02x, len=%d\n",
2044                                sc->unit, rxstat, len);
2045 #endif
2046
2047                         MGETHDR(m, M_DONTWAIT, MT_DATA);
2048                         if (m == NULL) {
2049                                 /*
2050                                  * eat (flush) packet if get mbuf fail!!
2051                                  */
2052                                 sr_eat_packet(sc, 1);
2053                                 continue;
2054                         }
2055                         /*
2056                          * construct control information for pass-off
2057                          */
2058 #ifndef NETGRAPH
2059                         m->m_pkthdr.rcvif = ifp;
2060 #else
2061                         m->m_pkthdr.rcvif = NULL;
2062 #endif /* NETGRAPH */
2063                         m->m_pkthdr.len = m->m_len = len;
2064                         if (len > MHLEN) {
2065                                 MCLGET(m, M_DONTWAIT);
2066                                 if ((m->m_flags & M_EXT) == 0) {
2067                                         /*
2068                                          * We couldn't get a big enough
2069                                          * message packet, so we'll send the
2070                                          * packet to /dev/null...
2071                                          */
2072                                         m_freem(m);
2073                                         sr_eat_packet(sc, 1);
2074                                         continue;
2075                                 }
2076                         }
2077                         /*
2078                          * OK, we've got a good message buffer.  Now we can
2079                          * copy the received message into it
2080                          */
2081                         sr_copy_rxbuf(m, sc, len);      /* copy from DPRAM */
2082
2083 #ifndef NETGRAPH
2084                         BPF_MTAP(ifp, m);
2085
2086 #if BUGGY > 3
2087                         {
2088                                 u_char *bp;
2089
2090                                 bp = (u_char *)m;
2091                                 printf("sr%d: rcvd=%02x%02x%02x%02x%02x%02x\n",
2092                                        sc->unit,
2093                                        bp[0], bp[1], bp[2],
2094                                        bp[4], bp[5], bp[6]);
2095                         }
2096 #endif
2097                         sppp_input(ifp, m);
2098                         ifp->if_ipackets++;
2099
2100 #else   /* NETGRAPH */
2101 #if BUGGY > 3
2102                         {
2103                                 u_char *bp;
2104
2105                                 bp = mtod(m,u_char *);
2106                                 printf("sr%d: rd=%02x:%02x:%02x:%02x:%02x:%02x",
2107                                        sc->unit,
2108                                        bp[0], bp[1], bp[2],
2109                                        bp[4], bp[5], bp[6]);
2110                                 printf(":%02x:%02x:%02x:%02x:%02x:%02x\n",
2111                                        bp[6], bp[7], bp[8],
2112                                        bp[9], bp[10], bp[11]);
2113                         }
2114 #endif
2115                         NG_SEND_DATA_ONLY(error, sc->hook, m);
2116                         sc->ipackets++;
2117 #endif /* NETGRAPH */
2118                         /*
2119                          * Update the eda to the previous descriptor.
2120                          */
2121                         i = (len + SR_BUF_SIZ - 1) / SR_BUF_SIZ;
2122                         sc->rxhind = (sc->rxhind + i) % sc->rxmax;
2123
2124                         rxdesc = (sca_descriptor *)(uintptr_t)sc->rxdesc;
2125                         rxndx = (sc->rxhind + sc->rxmax - 2) % sc->rxmax;
2126                         rxdesc = &rxdesc[rxndx];
2127
2128                         SRC_PUT16(hc, hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda,
2129                             (u_short)(((uintptr_t)rxdesc + hc->mem_pstart)
2130                             & 0xffff));
2131
2132                 } else {
2133                         int got_st3, got_cda, got_eda;
2134                         int tries = 5;
2135
2136                         while ((rxstat == 0xff) && --tries)
2137                                 sr_packet_avail(sc, &len, &rxstat);
2138
2139                         /*
2140                          * It look like we get an interrupt early
2141                          * sometimes and then the status is not
2142                          * filled in yet.
2143                          */
2144                         if (tries && (tries != 5))
2145                                 continue;
2146
2147                         /*
2148                          * This chunk of code handles the error packets.
2149                          * We'll log them for posterity...
2150                          */
2151                         sr_eat_packet(sc, 1);
2152
2153 #ifndef NETGRAPH
2154                         ifp->if_ierrors++;
2155 #else
2156                         sc->ierrors[0]++;
2157 #endif /* NETGRAPH */
2158
2159                         got_st3 = SRC_GET8(hc,
2160                                   hc->sca->msci[sc->scachan].st3);
2161                         got_cda = SRC_GET16(hc,
2162                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].cda);
2163                         got_eda = SRC_GET16(hc,
2164                                   hc->sca->dmac[DMAC_RXCH(sc->scachan)].eda);
2165
2166 #if BUGGY > 0
2167                         printf("sr%d: Receive error chan %d, "
2168                                "stat %02x, msci st3 %02x,"
2169                                "rxhind %d, cda %04x, eda %04x.\n",
2170                                sc->unit, sc->scachan, rxstat,
2171                                got_st3, sc->rxhind, got_cda, got_eda);
2172 #endif
2173                 }
2174         }
2175
2176 #if BUGGY > 0
2177         printf("sr%d: sr_get_packets() found %d packet(s)\n",
2178                sc->unit, pkts);
2179 #endif
2180
2181         if (hc->mempages)
2182                 SRC_SET_OFF(hc);
2183 }
2184
2185 /*
2186  * All DMA interrupts come here.
2187  *
2188  * Each channel has two interrupts.
2189  * Interrupt A for errors and Interrupt B for normal stuff like end
2190  * of transmit or receive dmas.
2191  */
2192 static void
2193 sr_dmac_intr(struct sr_hardc *hc, u_char isr1)
2194 {
2195         u_char dsr;             /* contents of DMA Stat Reg */
2196         u_char dotxstart;       /* enables for tranmit part */
2197         int mch;                /* channel being processed */
2198         struct sr_softc *sc;    /* channel's softc structure */
2199         sca_regs *sca = hc->sca;
2200         dmac_channel *dmac;     /* dma structure of chip */
2201
2202 #if BUGGY > 0
2203         printf("sr_dmac_intr(hc=%08x,isr1=%04x)\n", hc, isr1);
2204 #endif
2205
2206         mch = 0;                /* assume chan0 on card */
2207         dotxstart = isr1;       /* copy for xmitter starts */
2208
2209         /*
2210          * Shortcut if there is no interrupts for dma channel 0 or 1.
2211          * Skip processing for channel 0 if no incoming hit
2212          */
2213         if ((isr1 & 0x0F) == 0) {
2214                 mch = 1;
2215                 isr1 >>= 4;
2216         }
2217         do {
2218                 sc = &hc->sc[mch];
2219
2220                 /*
2221                  * Transmit channel - DMA Status Register Evaluation
2222                  */
2223                 if (isr1 & 0x0C) {
2224                         dmac = &sca->dmac[DMAC_TXCH(mch)];
2225
2226                         /*
2227                          * get the DMA Status Register contents and write
2228                          * back to reset interrupt...
2229                          */
2230                         dsr = SRC_GET8(hc, dmac->dsr);
2231                         SRC_PUT8(hc, dmac->dsr, dsr);
2232
2233                         /*
2234                          * Check for (& process) a Counter overflow
2235                          */
2236                         if (dsr & SCA_DSR_COF) {
2237                                 printf("sr%d: TX DMA Counter overflow, "
2238                                        "txpacket no %lu.\n",
2239 #ifndef NETGRAPH
2240                                        sc->unit, SC2IFP(sc)->if_opackets);
2241                                 SC2IFP(sc)->if_oerrors++;
2242 #else
2243                                        sc->unit, sc->opackets);
2244                                 sc->oerrors++;
2245 #endif /* NETGRAPH */
2246                         }
2247                         /*
2248                          * Check for (& process) a Buffer overflow
2249                          */
2250                         if (dsr & SCA_DSR_BOF) {
2251                                 printf("sr%d: TX DMA Buffer overflow, "
2252                                        "txpacket no %lu, dsr %02x, "
2253                                        "cda %04x, eda %04x.\n",
2254 #ifndef NETGRAPH
2255                                        sc->unit, SC2IFP(sc)->if_opackets,
2256 #else
2257                                        sc->unit, sc->opackets,
2258 #endif /* NETGRAPH */
2259                                        dsr,
2260                                        SRC_GET16(hc, dmac->cda),
2261                                        SRC_GET16(hc, dmac->eda));
2262 #ifndef NETGRAPH
2263                                 SC2IFP(sc)->if_oerrors++;
2264 #else
2265                                 sc->oerrors++;
2266 #endif /* NETGRAPH */
2267                         }
2268                         /*
2269                          * Check for (& process) an End of Transfer (OK)
2270                          */
2271                         if (dsr & SCA_DSR_EOT) {
2272                                 /*
2273                                  * This should be the most common case.
2274                                  *
2275                                  * Clear the IFF_DRV_OACTIVE flag.
2276                                  *
2277                                  * Call srstart to start a new transmit if
2278                                  * there is data to transmit.
2279                                  */
2280 #if BUGGY > 0
2281                                 printf("sr%d: TX Completed OK\n", sc->unit);
2282 #endif
2283                                 sc->xmit_busy = 0;
2284 #ifndef NETGRAPH
2285                                 SC2IFP(sc)->if_drv_flags &= ~IFF_DRV_OACTIVE;
2286                                 SC2IFP(sc)->if_timer = 0;
2287 #else
2288                                 /* XXX may need to mark tx inactive? */
2289                                 sc->out_deficit++;
2290                                 sc->out_dog = DOG_HOLDOFF;
2291 #endif /* NETGRAPH */
2292
2293                                 if (sc->txb_inuse && --sc->txb_inuse)
2294                                         sr_xmit(sc);
2295                         }
2296                 }
2297                 /*
2298                  * Receive channel processing of DMA Status Register
2299                  */
2300                 if (isr1 & 0x03) {
2301                         dmac = &sca->dmac[DMAC_RXCH(mch)];
2302
2303                         dsr = SRC_GET8(hc, dmac->dsr);
2304                         SRC_PUT8(hc, dmac->dsr, dsr);
2305
2306                         /*
2307                          * End of frame processing (MSG OK?)
2308                          */
2309                         if (dsr & SCA_DSR_EOM) {
2310 #if BUGGY > 0
2311                                 int tt, ind;
2312
2313 #ifndef NETGRAPH
2314                                 tt = SC2IFP(sc)->if_ipackets;
2315 #else   /* NETGRAPH */
2316                                 tt = sc->ipackets;
2317 #endif /* NETGRAPH */
2318                                 ind = sc->rxhind;
2319 #endif
2320
2321                                 sr_get_packets(sc);
2322 #if BUGGY > 0
2323 #ifndef NETGRAPH
2324                                 if (tt == SC2IFP(sc)->if_ipackets)
2325 #else   /* NETGRAPH */
2326                                 if (tt == sc->ipackets)
2327 #endif /* NETGRAPH */
2328                                 {
2329                                         sca_descriptor *rxdesc;
2330                                         int i;
2331
2332                                         printf("SR: RXINTR isr1 %x, dsr %x, "
2333                                                "no data %d pkts, orxind %d.\n",
2334                                                dotxstart, dsr, tt, ind);
2335                                         printf("SR: rxdesc %x, rxstart %x, "
2336                                                "rxend %x, rxhind %d, "
2337                                                "rxmax %d.\n",
2338                                                sc->rxdesc, sc->rxstart,
2339                                                sc->rxend, sc->rxhind,
2340                                                sc->rxmax);
2341                                         printf("SR: cda %x, eda %x.\n",
2342                                             SRC_GET16(hc, dmac->cda),
2343                                             SRC_GET16(hc, dmac->eda));
2344
2345                                         if (hc->mempages) {
2346                                                 SRC_SET_ON(hc);
2347                                                 SRC_SET_MEM(hc, sc->rxdesc);
2348                                         }
2349                                         rxdesc = (sca_descriptor *)
2350                                                  (hc->mem_start +
2351                                                   (sc->rxdesc & hc->winmsk));
2352                                         rxdesc = &rxdesc[sc->rxhind];
2353
2354                                         for (i = 0; i < 3; i++, rxdesc++)
2355                                                 printf("SR: rxdesc->stat %x, "
2356                                                        "len %d.\n",
2357                                                        rxdesc->stat,
2358                                                        rxdesc->len);
2359
2360                                         if (hc->mempages)
2361                                                 SRC_SET_OFF(hc);
2362                                 }
2363 #endif /* BUGGY */
2364                         }
2365                         /*
2366                          * Check for Counter overflow
2367                          */
2368                         if (dsr & SCA_DSR_COF) {
2369                                 printf("sr%d: RX DMA Counter overflow, "
2370                                        "rxpkts %lu.\n",
2371 #ifndef NETGRAPH
2372                                        sc->unit, SC2IFP(sc)->if_ipackets);
2373                                 SC2IFP(sc)->if_ierrors++;
2374 #else   /* NETGRAPH */
2375                                        sc->unit, sc->ipackets);
2376                                 sc->ierrors[1]++;
2377 #endif /* NETGRAPH */
2378                         }
2379                         /*
2380                          * Check for Buffer overflow
2381                          */
2382                         if (dsr & SCA_DSR_BOF) {
2383                                 printf("sr%d: RX DMA Buffer overflow, "
2384                                        "rxpkts %lu, rxind %d, "
2385                                        "cda %x, eda %x, dsr %x.\n",
2386 #ifndef NETGRAPH
2387                                        sc->unit, SC2IFP(sc)->if_ipackets,
2388 #else   /* NETGRAPH */
2389                                        sc->unit, sc->ipackets,
2390 #endif /* NETGRAPH */
2391                                        sc->rxhind,
2392                                        SRC_GET16(hc, dmac->cda),
2393                                        SRC_GET16(hc, dmac->eda),
2394                                        dsr);
2395
2396                                 /*
2397                                  * Make sure we eat as many as possible.
2398                                  * Then get the system running again.
2399                                  */
2400                                 if (hc->mempages)
2401                                         SRC_SET_ON(hc);
2402
2403                                 sr_eat_packet(sc, 0);
2404 #ifndef NETGRAPH
2405                                 SC2IFP(sc)->if_ierrors++;
2406 #else   /* NETGRAPH */
2407                                 sc->ierrors[2]++;
2408 #endif /* NETGRAPH */
2409
2410                                 SRC_PUT8(hc, sca->msci[mch].cmd,
2411                                     SCA_CMD_RXMSGREJ);
2412
2413                                 SRC_PUT8(hc, dmac->dsr, SCA_DSR_DE);
2414
2415 #if BUGGY > 0
2416                                 printf("sr%d: RX DMA Buffer overflow, "
2417                                        "rxpkts %lu, rxind %d, "
2418                                        "cda %x, eda %x, dsr %x. After\n",
2419                                        sc->unit,
2420 #ifndef NETGRAPH
2421                                        sc->ipackets,
2422 #else   /* NETGRAPH */
2423                                        SC2IFP(sc)->if_ipackets,
2424 #endif /* NETGRAPH */
2425                                        sc->rxhind,
2426                                        SRC_GET16(hc, dmac->cda),
2427                                        SRC_GET16(hc, dmac->eda),
2428                                        SRC_GET8(hc, dmac->dsr));
2429 #endif
2430
2431                                 if (hc->mempages)
2432                                         SRC_SET_OFF(hc);
2433                         }
2434                         /*
2435                          * End of Transfer
2436                          */
2437                         if (dsr & SCA_DSR_EOT) {
2438                                 /*
2439                                  * If this happen, it means that we are
2440                                  * receiving faster than what the processor
2441                                  * can handle.
2442                                  *
2443                                  * XXX We should enable the dma again.
2444                                  */
2445                                 printf("sr%d: RX End of xfer, rxpkts %lu.\n",
2446                                        sc->unit,
2447 #ifndef NETGRAPH
2448                                        SC2IFP(sc)->if_ipackets);
2449                                 SC2IFP(sc)->if_ierrors++;
2450 #else
2451                                        sc->ipackets);
2452                                 sc->ierrors[3]++;
2453 #endif /* NETGRAPH */
2454                         }
2455                 }
2456                 isr1 >>= 4;     /* process next half of ISR */
2457                 mch++;          /* and move to next channel */
2458         } while ((mch < NCHAN) && isr1);        /* loop for each chn */
2459
2460         /*
2461          * Now that we have done all the urgent things, see if we can fill
2462          * the transmit buffers.
2463          */
2464         for (mch = 0; mch < NCHAN; mch++) {
2465                 if (dotxstart & 0x0C) { /* TX initiation enabled? */
2466                         sc = &hc->sc[mch];
2467 #ifndef NETGRAPH
2468                         srstart(SC2IFP(sc));
2469 #else
2470                         srstart(sc);
2471 #endif /* NETGRAPH */
2472                 }
2473                 dotxstart >>= 4;/* shift for next channel */
2474         }
2475 }
2476 #ifndef NETGRAPH
2477 #ifdef USE_MODEMCK
2478 /*
2479  * Perform timeout on an FR channel
2480  *
2481  * Establish a periodic check of open N2 ports;  If
2482  * a port is open/active, its DCD state is checked
2483  * and a loss of DCD is recognized (and eventually
2484  * processed).
2485  */
2486 static void
2487 sr_modemck(void *arg)
2488 {
2489         u_int s;
2490         int card;               /* card index in table */
2491         int cards;              /* card list index */
2492         int mch;                /* channel on card */
2493         u_char dcd_v;           /* Data Carrier Detect */
2494         u_char got_st0;         /* contents of ST0 */
2495         u_char got_st1;         /* contents of ST1 */
2496         u_char got_st2;         /* contents of ST2 */
2497         u_char got_st3;         /* contents of ST3 */
2498         struct sr_hardc *hc;    /* card's configuration */
2499         struct sr_hardc *Card[16];/* up to 16 cards in system */
2500         struct sr_softc *sc;    /* channel's softc structure */
2501         struct ifnet *ifp;      /* interface control table */
2502         msci_channel *msci;     /* regs specific to channel */
2503
2504         s = splimp();
2505
2506 #if     0
2507         if (sr_opens == 0) {    /* count of "up" channels */
2508                 sr_watcher = 0; /* indicate no watcher */
2509                 splx(s);
2510                 return;
2511         }
2512 #endif
2513
2514         sr_watcher = 1;         /* mark that we're online */
2515
2516         /*
2517          * Now we'll need a list of cards to process.  Since we can handle
2518          * both ISA and PCI cards (and I didn't think of making this logic
2519          * global YET) we'll generate a single table of card table
2520          * addresses.
2521          */
2522         cards = 0;
2523
2524         for (card = 0; card < NSR; card++) {
2525                 hc = &sr_hardc[card];
2526
2527                 if (hc->sc == (void *)0)
2528                         continue;
2529
2530                 Card[cards++] = hc;
2531         }
2532
2533         hc = sr_hardc_pci;
2534
2535         while (hc) {
2536                 Card[cards++] = hc;
2537                 hc = hc->next;
2538         }
2539
2540         /*
2541          * OK, we've got work we can do.  Let's do it... (Please note that
2542          * this code _only_ deals w/ ISA cards)
2543          */
2544         for (card = 0; card < cards; card++) {
2545                 hc = Card[card];/* get card table */
2546
2547                 for (mch = 0; mch < hc->numports; mch++) {
2548                         sc = &hc->sc[mch];
2549
2550                         ifp = SC2IFP(sc);
2551
2552                         /*
2553                          * if this channel isn't "up", skip it
2554                          */
2555                         if ((ifp->if_flags & IFF_UP) == 0)
2556                                 continue;
2557
2558                         /*
2559                          * OK, now we can go looking at this channel's
2560                          * actual register contents...
2561                          */
2562                         msci = &hc->sca->msci[sc->scachan];
2563
2564                         /*
2565                          * OK, now we'll look into the actual status of this
2566                          * channel...
2567                          *
2568                          * I suck in more registers than strictly needed
2569                          */
2570                         got_st0 = SRC_GET8(hc, msci->st0);
2571                         got_st1 = SRC_GET8(hc, msci->st1);
2572                         got_st2 = SRC_GET8(hc, msci->st2);
2573                         got_st3 = SRC_GET8(hc, msci->st3);
2574
2575                         /*
2576                          * We want to see if the DCD signal is up (DCD is
2577                          * true if zero)
2578                          */
2579                         dcd_v = (got_st3 & SCA_ST3_DCD) == 0;
2580
2581                         if (dcd_v == 0)
2582                                 printf("sr%d: DCD lost\n", sc->unit);
2583                 }
2584         }
2585
2586         /*
2587          * OK, now set up for the next modem signal checking pass...
2588          */
2589         timeout(sr_modemck, NULL, hz);
2590
2591         splx(s);
2592 }
2593 #endif
2594 #else   /* NETGRAPH */
2595 /*
2596  * If a port is open/active, it's DCD state is checked
2597  * and a loss of DCD is recognized (and eventually processed?).
2598  */
2599 static void
2600 sr_modemck(struct sr_softc *sc )
2601 {
2602         u_int s;
2603         u_char got_st3;                 /* contents of ST3 */
2604         struct sr_hardc *hc = sc->hc;   /* card's configuration */
2605         msci_channel *msci;             /* regs specific to channel */
2606
2607         s = splimp();
2608
2609
2610         if (sc->running == 0)
2611                 return;
2612         /*
2613          * OK, now we can go looking at this channel's register contents...
2614          */
2615         msci = &hc->sca->msci[sc->scachan];
2616         got_st3 = SRC_GET8(hc, msci->st3);
2617
2618         /*
2619          * We want to see if the DCD signal is up (DCD is true if zero)
2620          */
2621         sc->dcd = (got_st3 & SCA_ST3_DCD) == 0;
2622         splx(s);
2623 }
2624
2625 #endif  /* NETGRAPH */
2626 static void
2627 sr_msci_intr(struct sr_hardc *hc, u_char isr0)
2628 {
2629         printf("src%d: SRINTR: MSCI\n", hc->cunit);
2630 }
2631
2632 static void
2633 sr_timer_intr(struct sr_hardc *hc, u_char isr2)
2634 {
2635         printf("src%d: SRINTR: TIMER\n", hc->cunit);
2636 }
2637
2638 #ifdef  NETGRAPH
2639 /*****************************************
2640  * Device timeout/watchdog routine.
2641  * called once per second.
2642  * checks to see that if activity was expected, that it hapenned.
2643  * At present we only look to see if expected output was completed.
2644  */
2645 static void
2646 ngsr_watchdog_frame(void * arg)
2647 {
2648         struct sr_softc * sc = arg;
2649         int s;
2650         int     speed;
2651
2652         if (sc->running == 0)
2653                 return; /* if we are not running let timeouts die */
2654         /*
2655          * calculate the apparent throughputs
2656          *  XXX a real hack
2657          */
2658         s = splimp();
2659         speed = sc->inbytes - sc->lastinbytes;
2660         sc->lastinbytes = sc->inbytes;
2661         if ( sc->inrate < speed )
2662                 sc->inrate = speed;
2663         speed = sc->outbytes - sc->lastoutbytes;
2664         sc->lastoutbytes = sc->outbytes;
2665         if ( sc->outrate < speed )
2666                 sc->outrate = speed;
2667         sc->inlast++;
2668         splx(s);
2669
2670         if ((sc->inlast > QUITE_A_WHILE)
2671         && (sc->out_deficit > LOTS_OF_PACKETS)) {
2672                 log(LOG_ERR, "sr%d: No response from remote end\n", sc->unit);
2673                 s = splimp();
2674                 sr_down(sc);
2675                 sr_up(sc);
2676                 sc->inlast = sc->out_deficit = 0;
2677                 splx(s);
2678         } else if ( sc->xmit_busy ) { /* no TX -> no TX timeouts */
2679                 if (sc->out_dog == 0) {
2680                         log(LOG_ERR, "sr%d: Transmit failure.. no clock?\n",
2681                                         sc->unit);
2682                         s = splimp();
2683                         srwatchdog(sc);
2684 #if 0
2685                         sr_down(sc);
2686                         sr_up(sc);
2687 #endif
2688                         splx(s);
2689                         sc->inlast = sc->out_deficit = 0;
2690                 } else {
2691                         sc->out_dog--;
2692                 }
2693         }
2694         sr_modemck(sc);         /* update the DCD status */
2695         sc->handle = timeout(ngsr_watchdog_frame, sc, hz);
2696 }
2697
2698 /***********************************************************************
2699  * This section contains the methods for the Netgraph interface
2700  ***********************************************************************/
2701 /*
2702  * It is not possible or allowable to create a node of this type.
2703  * If the hardware exists, it will already have created it.
2704  */
2705 static  int
2706 ngsr_constructor(node_p node)
2707 {
2708         return (EINVAL);
2709 }
2710
2711 /*
2712  * give our ok for a hook to be added...
2713  * If we are not running this should kick the device into life.
2714  * The hook's private info points to our stash of info about that
2715  * channel.
2716  */
2717 static int
2718 ngsr_newhook(node_p node, hook_p hook, const char *name)
2719 {
2720         struct sr_softc *       sc = NG_NODE_PRIVATE(node);
2721
2722         /*
2723          * check if it's our friend the debug hook
2724          */
2725         if (strcmp(name, NG_SR_HOOK_DEBUG) == 0) {
2726                 NG_HOOK_SET_PRIVATE(hook, NULL); /* paranoid */
2727                 sc->debug_hook = hook;
2728                 return (0);
2729         }
2730
2731         /*
2732          * Check for raw mode hook.
2733          */
2734         if (strcmp(name, NG_SR_HOOK_RAW) != 0) {
2735                 return (EINVAL);
2736         }
2737         NG_HOOK_SET_PRIVATE(hook, sc);
2738         sc->hook = hook;
2739         sc->datahooks++;
2740         sr_up(sc);
2741         return (0);
2742 }
2743
2744 /*
2745  * incoming messages.
2746  * Just respond to the generic TEXT_STATUS message
2747  */
2748 static  int
2749 ngsr_rcvmsg(node_p node, item_p item, hook_p lasthook)
2750 {
2751         struct sr_softc *       sc;
2752         struct ng_mesg *resp = NULL;
2753         int error = 0;
2754         struct ng_mesg *msg;
2755
2756         NGI_GET_MSG(item,msg);
2757         sc = NG_NODE_PRIVATE(node);
2758         switch (msg->header.typecookie) {
2759         case    NG_SR_COOKIE:
2760                 error = EINVAL;
2761                 break;
2762         case    NGM_GENERIC_COOKIE:
2763                 switch(msg->header.cmd) {
2764                 case NGM_TEXT_STATUS: {
2765                         char        *arg;
2766                         int pos = 0;
2767
2768                         int resplen = sizeof(struct ng_mesg) + 512;
2769                         NG_MKRESPONSE(resp, msg, resplen, M_NOWAIT);
2770                         if (resp == NULL) {
2771                                 error = ENOMEM;
2772                                 break;
2773                         }
2774                         arg = (resp)->data;
2775                         pos = sprintf(arg, "%ld bytes in, %ld bytes out\n"
2776                             "highest rate seen: %ld B/S in, %ld B/S out\n",
2777                         sc->inbytes, sc->outbytes,
2778                         sc->inrate, sc->outrate);
2779                         pos += sprintf(arg + pos,
2780                                 "%ld output errors\n",
2781                                 sc->oerrors);
2782                         pos += sprintf(arg + pos,
2783                                 "ierrors = %ld, %ld, %ld, %ld, %ld, %ld\n",
2784                                 sc->ierrors[0],
2785                                 sc->ierrors[1],
2786                                 sc->ierrors[2],
2787                                 sc->ierrors[3],
2788                                 sc->ierrors[4],
2789                                 sc->ierrors[5]);
2790
2791                         resp->header.arglen = pos + 1;
2792                         break;
2793                       }
2794                 default:
2795                         error = EINVAL;
2796                         break;
2797                 }
2798                 break;
2799         default:
2800                 error = EINVAL;
2801                 break;
2802         }
2803         /* Take care of synchronous response, if any */
2804         NG_RESPOND_MSG(error, node, item, resp);
2805         NG_FREE_MSG(msg);
2806         return (error);
2807 }
2808
2809 /*
2810  * get data from another node and transmit it to the correct channel
2811  */
2812 static  int
2813 ngsr_rcvdata(hook_p hook, item_p item)
2814 {
2815         int s;
2816         int error = 0;
2817         struct sr_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
2818         struct ifqueue  *xmitq_p;
2819         struct mbuf *m;
2820         struct ng_tag_prio *ptag;
2821
2822         NGI_GET_M(item, m);
2823         NG_FREE_ITEM(item);
2824         /*
2825          * data doesn't come in from just anywhere (e.g control hook)
2826          */
2827         if ( NG_HOOK_PRIVATE(hook) == NULL) {
2828                 error = ENETDOWN;
2829                 goto bad;
2830         }
2831
2832         /*
2833          * Now queue the data for when it can be sent
2834          */
2835         if ((ptag = (struct ng_tag_prio *)m_tag_locate(m, NGM_GENERIC_COOKIE,
2836             NG_TAG_PRIO, NULL)) != NULL && (ptag->priority > NG_PRIO_CUTOFF) )
2837                 xmitq_p = (&sc->xmitq_hipri);
2838         else
2839                 xmitq_p = (&sc->xmitq);
2840
2841         s = splimp();
2842         IF_LOCK(xmitq_p);
2843         if (_IF_QFULL(xmitq_p)) {
2844                 _IF_DROP(xmitq_p);
2845                 IF_UNLOCK(xmitq_p);
2846                 splx(s);
2847                 error = ENOBUFS;
2848                 goto bad;
2849         }
2850         _IF_ENQUEUE(xmitq_p, m);
2851         IF_UNLOCK(xmitq_p);
2852         srstart(sc);
2853         splx(s);
2854         return (0);
2855
2856 bad:
2857         /*
2858          * It was an error case.
2859          * check if we need to free the mbuf, and then return the error
2860          */
2861         NG_FREE_M(m);
2862         return (error);
2863 }
2864
2865 /*
2866  * do local shutdown processing..
2867  * this node will refuse to go away, unless the hardware says to..
2868  * don't unref the node, or remove our name. just clear our links up.
2869  */
2870 static  int
2871 ngsr_shutdown(node_p node)
2872 {
2873         struct sr_softc * sc = NG_NODE_PRIVATE(node);
2874
2875         sr_down(sc);
2876         NG_NODE_UNREF(node);
2877 /* XXX should drain queues! */
2878         if (ng_make_node_common(&typestruct, &sc->node) != 0)
2879                 return (0);
2880         sprintf(sc->nodename, "%s%d", NG_SR_NODE_TYPE, sc->unit);
2881         if (ng_name_node(sc->node, sc->nodename)) {
2882                 printf("node naming failed\n");
2883                 sc->node = NULL;
2884                 NG_NODE_UNREF(sc->node); /* drop it again */
2885                 return (0);
2886         }
2887         NG_NODE_SET_PRIVATE(sc->node, sc);
2888         callout_handle_init(&sc->handle); /* should kill timeout */
2889         sc->running = 0;
2890         return (0);
2891 }
2892
2893 /* already linked */
2894 static  int
2895 ngsr_connect(hook_p hook)
2896 {
2897         /* probably not at splnet, force outward queueing */
2898         NG_HOOK_FORCE_QUEUE(NG_HOOK_PEER(hook));
2899         /* be really amiable and just say "YUP that's OK by me! " */
2900         return (0);
2901 }
2902
2903 /*
2904  * notify on hook disconnection (destruction)
2905  *
2906  * Invalidate the private data associated with this dlci.
2907  * For this type, removal of the last link resets tries to destroy the node.
2908  * As the device still exists, the shutdown method will not actually
2909  * destroy the node, but reset the device and leave it 'fresh' :)
2910  *
2911  * The node removal code will remove all references except that owned by the
2912  * driver.
2913  */
2914 static  int
2915 ngsr_disconnect(hook_p hook)
2916 {
2917         struct sr_softc * sc = NG_NODE_PRIVATE(NG_HOOK_NODE(hook));
2918         int     s;
2919         /*
2920          * If it's the data hook, then free resources etc.
2921          */
2922         if (NG_HOOK_PRIVATE(hook)) {
2923                 s = splimp();
2924                 sc->datahooks--;
2925                 if (sc->datahooks == 0)
2926                         sr_down(sc);
2927                 splx(s);
2928         } else {
2929                 sc->debug_hook = NULL;
2930         }
2931         return (0);
2932 }
2933 #endif /* NETGRAPH */
2934
2935 /*
2936  ********************************* END ************************************
2937  */