2 * Copyright (c) 1996 - 2001 John Hay.
3 * Copyright (c) 1996 SDL Communications, Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. Neither the name of the author nor the names of any co-contributors
15 * may be used to endorse or promote products derived from this software
16 * without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/malloc.h>
38 #include <sys/module.h>
40 #include <machine/bus.h>
41 #include <machine/resource.h>
44 #include <dev/pci/pcivar.h>
45 #include <machine/md_var.h>
47 #include <dev/ic/hd64570.h>
48 #include <dev/sr/if_srregs.h>
54 static int sr_pci_probe(device_t);
55 static int sr_pci_attach(device_t);
57 static device_method_t sr_pci_methods[] = {
58 /* Device interface */
59 DEVMETHOD(device_probe, sr_pci_probe),
60 DEVMETHOD(device_attach, sr_pci_attach),
61 DEVMETHOD(device_detach, sr_detach),
65 static driver_t sr_pci_driver = {
68 sizeof(struct sr_hardc),
71 DRIVER_MODULE(sr, pci, sr_pci_driver, sr_devclass, 0, 0);
72 MODULE_DEPEND(sr, pci, 1, 1, 1);
74 static u_int src_get8_mem(struct sr_hardc *hc, u_int off);
75 static u_int src_get16_mem(struct sr_hardc *hc, u_int off);
76 static void src_put8_mem(struct sr_hardc *hc, u_int off, u_int val);
77 static void src_put16_mem(struct sr_hardc *hc, u_int off, u_int val);
80 sr_pci_probe(device_t device)
82 u_int32_t type = pci_get_devid(device);
86 device_set_desc(device, "RISCom/N2pci");
87 return (BUS_PROBE_DEFAULT);
92 * XXX This can probably be removed sometime.
94 device_set_desc(device, "RISCom/N2pci (old id)");
95 return (BUS_PROBE_DEFAULT);
104 sr_pci_attach(device_t device)
109 bus_space_tag_t bt_plx;
110 bus_space_handle_t bh_plx;
112 hc = (struct sr_hardc *)device_get_softc(device);
113 bzero(hc, sizeof(struct sr_hardc));
115 if (sr_allocate_plx_memory(device, 0x10, 1))
117 bt_plx = rman_get_bustag(hc->res_plx_memory);
118 bh_plx = rman_get_bushandle(hc->res_plx_memory);
120 if (sr_allocate_memory(device, 0x18, 1))
123 if (sr_allocate_irq(device, 0, 1))
126 hc->cunit = device_get_unit(device);
129 * Configure the PLX. This is magic. I'm doing it just like I'm told
133 * 0x00 - Map Range - Mem-mapped to locate anywhere
134 * 0x04 - Re-Map - PCI address decode enable
135 * 0x18 - Bus Region - 32-bit bus, ready enable
136 * 0x1c - Master Range - include all 16 MB
137 * 0x20 - Master RAM - Map SCA Base at 0
138 * 0x28 - Master Remap - direct master memory enable
139 * 0x68 - Interrupt - Enable interrupt (0 to disable)
141 * Note: This is "cargo cult" stuff. - jrc
143 bus_space_write_4(bt_plx, bh_plx, 0x00, 0xfffff000);
144 bus_space_write_4(bt_plx, bh_plx, 0x04, 0x00000001);
145 bus_space_write_4(bt_plx, bh_plx, 0x18, 0x40030043);
146 bus_space_write_4(bt_plx, bh_plx, 0x1c, 0xff000000);
147 bus_space_write_4(bt_plx, bh_plx, 0x20, 0x00000000);
148 bus_space_write_4(bt_plx, bh_plx, 0x28, 0x000000e9);
149 bus_space_write_4(bt_plx, bh_plx, 0x68, 0x00010900);
152 * Get info from card.
154 * Only look for the second port if the first exists. Too many things
155 * will break if we have only a second port.
157 fecr = sr_read_fecr(hc);
160 if (((fecr & SR_FECR_ID0) >> SR_FE_ID0_SHFT) != SR_FE_ID_NONE) {
162 if (((fecr & SR_FECR_ID1) >> SR_FE_ID1_SHFT) != SR_FE_ID_NONE)
168 hc->numports = numports;
169 hc->cardtype = SR_CRD_N2PCI;
171 hc->src_put8 = src_put8_mem;
172 hc->src_put16 = src_put16_mem;
173 hc->src_get8 = src_get8_mem;
174 hc->src_get16 = src_get16_mem;
177 * Malloc area for tx and rx buffers. For now allocate SRC_WIN_SIZ
178 * (16k) for each buffer.
180 * Allocate the block below 16M because the N2pci card can only access
181 * 16M memory at a time.
183 * (We could actually allocate a contiguous block above the 16MB limit,
184 * but this would complicate card programming more than we want to
187 hc->memsize = 2 * hc->numports * SRC_WIN_SIZ;
188 hc->mem_start = contigmalloc(hc->memsize,
196 if (hc->mem_start == NULL) {
197 printf("src%d: pci: failed to allocate buffer space.\n",
201 hc->winmsk = 0xffffffff;
202 hc->mem_end = (caddr_t)((u_int)hc->mem_start + hc->memsize);
203 hc->mem_pstart = kvtop(hc->mem_start);
204 bzero(hc->mem_start, hc->memsize);
207 SR_FECR_DTR0 | SR_FECR_DTR1 | SR_FECR_TE0 | SR_FECR_TE1);
209 if (sr_attach(device))
214 sr_deallocate_resources(device);
219 * I/O for PCI N2 card(s)
221 #define SRC_PCI_SCA_REG(y) ((y & 2) ? ((y & 0xfd) + 0x100) : y)
224 src_get8_mem(struct sr_hardc *hc, u_int off)
226 return bus_space_read_1(hc->bt_memory, hc->bh_memory,
227 SRC_PCI_SCA_REG(off));
231 src_get16_mem(struct sr_hardc *hc, u_int off)
233 return bus_space_read_2(hc->bt_memory, hc->bh_memory,
234 SRC_PCI_SCA_REG(off));
238 src_put8_mem(struct sr_hardc *hc, u_int off, u_int val)
240 bus_space_write_1(hc->bt_memory, hc->bh_memory,
241 SRC_PCI_SCA_REG(off), val);
245 src_put16_mem(struct sr_hardc *hc, u_int off, u_int val)
247 bus_space_write_2(hc->bt_memory, hc->bh_memory,
248 SRC_PCI_SCA_REG(off), val);