sys/dev/usb/ehci_pci.c

   1 /*-
   2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
   3  * All rights reserved.
   4  *
   5  * This code is derived from software contributed to The NetBSD Foundation
   6  * by Lennart Augustsson (augustss@carlstedt.se) at
   7  * Carlstedt Research & Technology.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *        This product includes software developed by the NetBSD
  20  *        Foundation, Inc. and its contributors.
  21  * 4. Neither the name of The NetBSD Foundation nor the names of its
  22  *    contributors may be used to endorse or promote products derived
  23  *    from this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #include <sys/cdefs.h>
  39 __FBSDID("$FreeBSD$");
  40
  41 /*
  42  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  43  *
  44  * The EHCI 1.0 spec can be found at
  45  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  46  * and the USB 2.0 spec at
  47  * http://www.usb.org/developers/docs/usb_20.zip
  48  */
  49
  50 /* The low level controller code for EHCI has been split into
  51  * PCI probes and EHCI specific code. This was done to facilitate the
  52  * sharing of code between *BSD's
  53  */
  54
  55 #include "opt_bus.h"
  56
  57 #include <sys/param.h>
  58 #include <sys/systm.h>
  59 #include <sys/kernel.h>
  60 #include <sys/module.h>
  61 #include <sys/lock.h>
  62 #include <sys/mutex.h>
  63 #include <sys/bus.h>
  64 #include <sys/queue.h>
  65 #include <sys/lockmgr.h>
  66 #include <machine/bus.h>
  67 #include <sys/rman.h>
  68 #include <machine/resource.h>
  69
  70 #include <dev/pci/pcivar.h>
  71 #include <dev/pci/pcireg.h>
  72
  73 #include <dev/usb/usb.h>
  74 #include <dev/usb/usbdi.h>
  75 #include <dev/usb/usbdivar.h>
  76 #include <dev/usb/usb_mem.h>
  77
  78 #include <dev/usb/ehcireg.h>
  79 #include <dev/usb/ehcivar.h>
  80
  81 #define PCI_EHCI_VENDORID_ACERLABS      0x10b9
  82 #define PCI_EHCI_VENDORID_AMD           0x1022
  83 #define PCI_EHCI_VENDORID_APPLE         0x106b
  84 #define PCI_EHCI_VENDORID_ATI           0x1002
  85 #define PCI_EHCI_VENDORID_CMDTECH       0x1095
  86 #define PCI_EHCI_VENDORID_INTEL         0x8086
  87 #define PCI_EHCI_VENDORID_NEC           0x1033
  88 #define PCI_EHCI_VENDORID_OPTI          0x1045
  89 #define PCI_EHCI_VENDORID_PHILIPS       0x1131
  90 #define PCI_EHCI_VENDORID_SIS           0x1039
  91 #define PCI_EHCI_VENDORID_NVIDIA        0x12D2
  92 #define PCI_EHCI_VENDORID_NVIDIA2       0x10DE
  93 #define PCI_EHCI_VENDORID_VIA           0x1106
  94
  95 /* AcerLabs/ALi */
  96 #define PCI_EHCI_DEVICEID_M5239         0x523910b9
  97 static const char *ehci_device_m5239 = "ALi M5239 USB 2.0 controller";
  98
  99 /* AMD */
 100 #define PCI_EHCI_DEVICEID_8111          0x10227463
 101 static const char *ehci_device_8111 = "AMD 8111 USB 2.0 controller";
 102 #define PCI_EHCI_DEVICEID_CS5536        0x20951022
 103 static const char *ehci_device_cs5536 = "AMD CS5536 (Geode) USB 2.0 controller";
 104
 105 /* ATI */
 106 #define PCI_EHCI_DEVICEID_SB200         0x43451002
 107 static const char *ehci_device_sb200 = "ATI SB200 USB 2.0 controller";
 108 #define PCI_EHCI_DEVICEID_SB400         0x43731002
 109 static const char *ehci_device_sb400 = "ATI SB400 USB 2.0 controller";
 110
 111 /* Intel */
 112 #define PCI_EHCI_DEVICEID_6300          0x25ad8086
 113 static const char *ehci_device_6300 = "Intel 6300ESB USB 2.0 controller";
 114 #define PCI_EHCI_DEVICEID_ICH4          0x24cd8086
 115 static const char *ehci_device_ich4 = "Intel 82801DB/L/M (ICH4) USB 2.0 controller";
 116 #define PCI_EHCI_DEVICEID_ICH5          0x24dd8086
 117 static const char *ehci_device_ich5 = "Intel 82801EB/R (ICH5) USB 2.0 controller";
 118 #define PCI_EHCI_DEVICEID_ICH6          0x265c8086
 119 static const char *ehci_device_ich6 = "Intel 82801FB (ICH6) USB 2.0 controller";
 120 #define PCI_EHCI_DEVICEID_ICH7          0x27cc8086
 121 static const char *ehci_device_ich7 = "Intel 82801GB/R (ICH7) USB 2.0 controller";
 122 #define PCI_EHCI_DEVICEID_ICH8_A        0x28368086
 123 static const char *ehci_device_ich8_a = "Intel 82801H (ICH8) USB 2.0 controller USB2-A";
 124 #define PCI_EHCI_DEVICEID_ICH8_B        0x283a8086
 125 static const char *ehci_device_ich8_b = "Intel 82801H (ICH8) USB 2.0 controller USB2-B";
 126 #define PCI_EHCI_DEVICEID_63XX          0x268c8086
 127 static const char *ehci_device_63XX = "Intel 63XXESB USB 2.0 controller";
 128
 129 /* NEC */
 130 #define PCI_EHCI_DEVICEID_NEC           0x00e01033
 131 static const char *ehci_device_nec = "NEC uPD 720100 USB 2.0 controller";
 132
 133 /* NVIDIA */
 134 #define PCI_EHCI_DEVICEID_NF2           0x006810de
 135 static const char *ehci_device_nf2 = "NVIDIA nForce2 USB 2.0 controller";
 136 #define PCI_EHCI_DEVICEID_NF2_400       0x008810de
 137 static const char *ehci_device_nf2_400 = "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
 138 #define PCI_EHCI_DEVICEID_NF3           0x00d810de
 139 static const char *ehci_device_nf3 = "NVIDIA nForce3 USB 2.0 controller";
 140 #define PCI_EHCI_DEVICEID_NF3_250       0x00e810de
 141 static const char *ehci_device_nf3_250 = "NVIDIA nForce3 250 USB 2.0 controller";
 142 #define PCI_EHCI_DEVICEID_NF4           0x005b10de
 143 static const char *ehci_device_nf4 = "NVIDIA nForce4 USB 2.0 controller";
 144
 145 /* Philips */
 146 #define PCI_EHCI_DEVICEID_ISP156X       0x15621131
 147 static const char *ehci_device_isp156x = "Philips ISP156x USB 2.0 controller";
 148
 149 #define PCI_EHCI_DEVICEID_VIA           0x31041106
 150 static const char *ehci_device_via = "VIA VT6202 USB 2.0 controller";
 151
 152 static const char *ehci_device_generic = "EHCI (generic) USB 2.0 controller";
 153
 154 #define PCI_EHCI_BASE_REG       0x10
 155
 156 #ifdef USB_DEBUG
 157 #define EHCI_DEBUG USB_DEBUG
 158 #define DPRINTF(x)      do { if (ehcidebug) printf x; } while (0)
 159 extern int ehcidebug;
 160 #else
 161 #define DPRINTF(x)
 162 #endif
 163
 164 static device_attach_t ehci_pci_attach;
 165 static device_detach_t ehci_pci_detach;
 166 static device_shutdown_t ehci_pci_shutdown;
 167 static device_suspend_t ehci_pci_suspend;
 168 static device_resume_t ehci_pci_resume;
 169 static void ehci_pci_givecontroller(device_t self);
 170 static void ehci_pci_takecontroller(device_t self);
 171
 172 static int
 173 ehci_pci_suspend(device_t self)
 174 {
 175         ehci_softc_t *sc = device_get_softc(self);
 176         int err;
 177
 178         err = bus_generic_suspend(self);
 179         if (err)
 180                 return (err);
 181         ehci_power(PWR_SUSPEND, sc);
 182
 183         return 0;
 184 }
 185
 186 static int
 187 ehci_pci_resume(device_t self)
 188 {
 189         ehci_softc_t *sc = device_get_softc(self);
 190
 191         ehci_pci_takecontroller(self);
 192         ehci_power(PWR_RESUME, sc);
 193         bus_generic_resume(self);
 194
 195         return 0;
 196 }
 197
 198 static int
 199 ehci_pci_shutdown(device_t self)
 200 {
 201         ehci_softc_t *sc = device_get_softc(self);
 202         int err;
 203
 204         err = bus_generic_shutdown(self);
 205         if (err)
 206                 return (err);
 207         ehci_shutdown(sc);
 208         ehci_pci_givecontroller(self);
 209
 210         return 0;
 211 }
 212
 213 static const char *
 214 ehci_pci_match(device_t self)
 215 {
 216         u_int32_t device_id = pci_get_devid(self);
 217
 218         switch (device_id) {
 219         case PCI_EHCI_DEVICEID_M5239:
 220                 return (ehci_device_m5239);
 221         case PCI_EHCI_DEVICEID_8111:
 222                 return (ehci_device_8111);
 223         case PCI_EHCI_DEVICEID_CS5536:
 224                 return (ehci_device_cs5536);
 225         case PCI_EHCI_DEVICEID_SB200:
 226                 return (ehci_device_sb200);
 227         case PCI_EHCI_DEVICEID_SB400:
 228                 return (ehci_device_sb400);
 229         case PCI_EHCI_DEVICEID_6300:
 230                 return (ehci_device_6300);
 231         case PCI_EHCI_DEVICEID_63XX:
 232                 return (ehci_device_63XX);
 233         case PCI_EHCI_DEVICEID_ICH4:
 234                 return (ehci_device_ich4);
 235         case PCI_EHCI_DEVICEID_ICH5:
 236                 return (ehci_device_ich5);
 237         case PCI_EHCI_DEVICEID_ICH6:
 238                 return (ehci_device_ich6);
 239         case PCI_EHCI_DEVICEID_ICH7:
 240                 return (ehci_device_ich7);
 241         case PCI_EHCI_DEVICEID_ICH8_A:
 242                 return (ehci_device_ich8_a);
 243         case PCI_EHCI_DEVICEID_ICH8_B:
 244                 return (ehci_device_ich8_b);
 245         case PCI_EHCI_DEVICEID_NEC:
 246                 return (ehci_device_nec);
 247         case PCI_EHCI_DEVICEID_NF2:
 248                 return (ehci_device_nf2);
 249         case PCI_EHCI_DEVICEID_NF2_400:
 250                 return (ehci_device_nf2_400);
 251         case PCI_EHCI_DEVICEID_NF3:
 252                 return (ehci_device_nf3);
 253         case PCI_EHCI_DEVICEID_NF3_250:
 254                 return (ehci_device_nf3_250);
 255         case PCI_EHCI_DEVICEID_NF4:
 256                 return (ehci_device_nf4);
 257         case PCI_EHCI_DEVICEID_ISP156X:
 258                 return (ehci_device_isp156x);
 259         case PCI_EHCI_DEVICEID_VIA:
 260                 return (ehci_device_via);
 261         default:
 262                 if (pci_get_class(self) == PCIC_SERIALBUS
 263                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
 264                     && pci_get_progif(self) == PCI_INTERFACE_EHCI) {
 265                         return (ehci_device_generic);
 266                 }
 267         }
 268
 269         return NULL;            /* dunno */
 270 }
 271
 272 static int
 273 ehci_pci_probe(device_t self)
 274 {
 275         const char *desc = ehci_pci_match(self);
 276
 277         if (desc) {
 278                 device_set_desc(self, desc);
 279                 return BUS_PROBE_DEFAULT;
 280         } else {
 281                 return ENXIO;
 282         }
 283 }
 284
 285 static int
 286 ehci_pci_attach(device_t self)
 287 {
 288         ehci_softc_t *sc = device_get_softc(self);
 289         devclass_t dc;
 290         device_t parent;
 291         device_t *neighbors;
 292         device_t *nbus;
 293         struct usbd_bus *bsc;
 294         int err;
 295         int rid;
 296         int ncomp;
 297         int count, buscount;
 298         int slot, function;
 299         int res;
 300         int i;
 301
 302         switch(pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
 303         case PCI_USBREV_PRE_1_0:
 304         case PCI_USBREV_1_0:
 305         case PCI_USBREV_1_1:
 306                 device_printf(self, "pre-2.0 USB rev\n");
 307                 if (pci_get_devid(self) == PCI_EHCI_DEVICEID_CS5536) {
 308                         sc->sc_bus.usbrev = USBREV_2_0;
 309                         device_printf(self, "Quirk for CS5536 USB 2.0 enabled\n");
 310                         break;
 311                 }
 312                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
 313                 return ENXIO;
 314         case PCI_USBREV_2_0:
 315                 sc->sc_bus.usbrev = USBREV_2_0;
 316                 break;
 317         default:
 318                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
 319                 break;
 320         }
 321
 322         pci_enable_busmaster(self);
 323
 324         rid = PCI_CBMEM;
 325         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
 326             RF_ACTIVE);
 327         if (!sc->io_res) {
 328                 device_printf(self, "Could not map memory\n");
 329                 return ENXIO;
 330         }
 331         sc->iot = rman_get_bustag(sc->io_res);
 332         sc->ioh = rman_get_bushandle(sc->io_res);
 333
 334         rid = 0;
 335         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
 336             RF_SHAREABLE | RF_ACTIVE);
 337         if (sc->irq_res == NULL) {
 338                 device_printf(self, "Could not allocate irq\n");
 339                 ehci_pci_detach(self);
 340                 return ENXIO;
 341         }
 342         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
 343         if (!sc->sc_bus.bdev) {
 344                 device_printf(self, "Could not add USB device\n");
 345                 ehci_pci_detach(self);
 346                 return ENOMEM;
 347         }
 348         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
 349
 350         /* ehci_pci_match will never return NULL if ehci_pci_probe succeeded */
 351         device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
 352         switch (pci_get_vendor(self)) {
 353         case PCI_EHCI_VENDORID_ACERLABS:
 354                 sprintf(sc->sc_vendor, "AcerLabs");
 355                 break;
 356         case PCI_EHCI_VENDORID_AMD:
 357                 sprintf(sc->sc_vendor, "AMD");
 358                 break;
 359         case PCI_EHCI_VENDORID_APPLE:
 360                 sprintf(sc->sc_vendor, "Apple");
 361                 break;
 362         case PCI_EHCI_VENDORID_ATI:
 363                 sprintf(sc->sc_vendor, "ATI");
 364                 break;
 365         case PCI_EHCI_VENDORID_CMDTECH:
 366                 sprintf(sc->sc_vendor, "CMDTECH");
 367                 break;
 368         case PCI_EHCI_VENDORID_INTEL:
 369                 sprintf(sc->sc_vendor, "Intel");
 370                 break;
 371         case PCI_EHCI_VENDORID_NEC:
 372                 sprintf(sc->sc_vendor, "NEC");
 373                 break;
 374         case PCI_EHCI_VENDORID_OPTI:
 375                 sprintf(sc->sc_vendor, "OPTi");
 376                 break;
 377         case PCI_EHCI_VENDORID_SIS:
 378                 sprintf(sc->sc_vendor, "SiS");
 379                 break;
 380         case PCI_EHCI_VENDORID_NVIDIA:
 381         case PCI_EHCI_VENDORID_NVIDIA2:
 382                 sprintf(sc->sc_vendor, "nVidia");
 383                 break;
 384         case PCI_EHCI_VENDORID_VIA:
 385                 sprintf(sc->sc_vendor, "VIA");
 386                 break;
 387         default:
 388                 if (bootverbose)
 389                         device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
 390                             pci_get_devid(self));
 391                 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
 392         }
 393
 394         err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO,
 395             NULL, (driver_intr_t *)ehci_intr, sc, &sc->ih);
 396         if (err) {
 397                 device_printf(self, "Could not setup irq, %d\n", err);
 398                 sc->ih = NULL;
 399                 ehci_pci_detach(self);
 400                 return ENXIO;
 401         }
 402
 403         /* Enable workaround for dropped interrupts as required */
 404         switch (pci_get_vendor(self)) {
 405         case PCI_EHCI_VENDORID_ATI:
 406         case PCI_EHCI_VENDORID_VIA:
 407                 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
 408                 if (bootverbose)
 409                         device_printf(self,
 410                             "Dropped interrupts workaround enabled\n");
 411                 break;
 412         default:
 413                 break;
 414         }
 415
 416         /*
 417          * Find companion controllers.  According to the spec they always
 418          * have lower function numbers so they should be enumerated already.
 419          */
 420         parent = device_get_parent(self);
 421         res = device_get_children(parent, &neighbors, &count);
 422         if (res != 0) {
 423                 device_printf(self, "Error finding companion busses\n");
 424                 ehci_pci_detach(self);
 425                 return ENXIO;
 426         }
 427         ncomp = 0;
 428         dc = devclass_find("usb");
 429         slot = pci_get_slot(self);
 430         function = pci_get_function(self);
 431         for (i = 0; i < count; i++) {
 432                 if (pci_get_slot(neighbors[i]) == slot && \
 433                         pci_get_function(neighbors[i]) < function) {
 434                         res = device_get_children(neighbors[i],
 435                                 &nbus, &buscount);
 436                         if (res != 0)
 437                                 continue;
 438                         if (buscount != 1) {
 439                                 free(nbus, M_TEMP);
 440                                 continue;
 441                         }
 442                         if (device_get_devclass(nbus[0]) != dc) {
 443                                 free(nbus, M_TEMP);
 444                                 continue;
 445                         }
 446                         bsc = device_get_softc(nbus[0]);
 447                         free(nbus, M_TEMP);
 448                         DPRINTF(("ehci_pci_attach: companion %s\n",
 449                             device_get_nameunit(bsc->bdev)));
 450                         sc->sc_comps[ncomp++] = bsc;
 451                         if (ncomp >= EHCI_COMPANION_MAX)
 452                                 break;
 453                 }
 454         }
 455         sc->sc_ncomp = ncomp;
 456
 457         /* Allocate a parent dma tag for DMA maps */
 458         err = bus_dma_tag_create(bus_get_dma_tag(self), 1, 0,
 459             BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
 460             BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
 461             NULL, NULL, &sc->sc_bus.parent_dmatag);
 462         if (err) {
 463                 device_printf(self, "Could not allocate parent DMA tag (%d)\n",
 464                     err);
 465                 ehci_pci_detach(self);
 466                 return ENXIO;
 467         }
 468
 469         /* Allocate a dma tag for transfer buffers */
 470         err = bus_dma_tag_create(sc->sc_bus.parent_dmatag, 1, 0,
 471             BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
 472             BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
 473             busdma_lock_mutex, &Giant, &sc->sc_bus.buffer_dmatag);
 474         if (err) {
 475                 device_printf(self, "Could not allocate buffer DMA tag (%d)\n",
 476                     err);
 477                 ehci_pci_detach(self);
 478                 return ENXIO;
 479         }
 480
 481         ehci_pci_takecontroller(self);
 482         err = ehci_init(sc);
 483         if (!err) {
 484                 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
 485                 err = device_probe_and_attach(sc->sc_bus.bdev);
 486         }
 487
 488         if (err) {
 489                 device_printf(self, "USB init failed err=%d\n", err);
 490                 ehci_pci_detach(self);
 491                 return EIO;
 492         }
 493         return 0;
 494 }
 495
 496 static int
 497 ehci_pci_detach(device_t self)
 498 {
 499         ehci_softc_t *sc = device_get_softc(self);
 500
 501         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
 502                 ehci_detach(sc, 0);
 503                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
 504         }
 505
 506         /*
 507          * disable interrupts that might have been switched on in ehci_init
 508          */
 509         if (sc->iot && sc->ioh)
 510                 bus_space_write_4(sc->iot, sc->ioh, EHCI_USBINTR, 0);
 511         if (sc->sc_bus.parent_dmatag != NULL)
 512                 bus_dma_tag_destroy(sc->sc_bus.parent_dmatag);
 513         if (sc->sc_bus.buffer_dmatag != NULL)
 514                 bus_dma_tag_destroy(sc->sc_bus.buffer_dmatag);
 515
 516         if (sc->irq_res && sc->ih) {
 517                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
 518
 519                 if (err)
 520                         /* XXX or should we panic? */
 521                         device_printf(self, "Could not tear down irq, %d\n",
 522                             err);
 523                 sc->ih = NULL;
 524         }
 525         if (sc->sc_bus.bdev) {
 526                 device_delete_child(self, sc->sc_bus.bdev);
 527                 sc->sc_bus.bdev = NULL;
 528         }
 529         if (sc->irq_res) {
 530                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
 531                 sc->irq_res = NULL;
 532         }
 533         if (sc->io_res) {
 534                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
 535                 sc->io_res = NULL;
 536                 sc->iot = 0;
 537                 sc->ioh = 0;
 538         }
 539         return 0;
 540 }
 541
 542 static void
 543 ehci_pci_takecontroller(device_t self)
 544 {
 545         ehci_softc_t *sc = device_get_softc(self);
 546         u_int32_t cparams, eec;
 547         uint8_t bios_sem;
 548         int eecp, i;
 549
 550         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 551
 552         /* Synchronise with the BIOS if it owns the controller. */
 553         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
 554             eecp = EHCI_EECP_NEXT(eec)) {
 555                 eec = pci_read_config(self, eecp, 4);
 556                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
 557                         continue;
 558                 bios_sem = pci_read_config(self, eecp + EHCI_LEGSUP_BIOS_SEM,
 559                     1);
 560                 if (bios_sem) {
 561                         pci_write_config(self, eecp + EHCI_LEGSUP_OS_SEM, 1, 1);
 562                         printf("%s: waiting for BIOS to give up control\n",
 563                             device_get_nameunit(sc->sc_bus.bdev));
 564                         for (i = 0; i < 5000; i++) {
 565                                 bios_sem = pci_read_config(self, eecp +
 566                                     EHCI_LEGSUP_BIOS_SEM, 1);
 567                                 if (bios_sem == 0)
 568                                         break;
 569                                 DELAY(1000);
 570                         }
 571                         if (bios_sem)
 572                                 printf("%s: timed out waiting for BIOS\n",
 573                                     device_get_nameunit(sc->sc_bus.bdev));
 574                 }
 575         }
 576 }
 577
 578 static void
 579 ehci_pci_givecontroller(device_t self)
 580 {
 581 #if 0
 582         ehci_softc_t *sc = device_get_softc(self);
 583         u_int32_t cparams, eec;
 584         int eecp;
 585
 586         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 587         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
 588             eecp = EHCI_EECP_NEXT(eec)) {
 589                 eec = pci_read_config(self, eecp, 4);
 590                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
 591                         continue;
 592                 pci_write_config(self, eecp + EHCI_LEGSUP_OS_SEM, 0, 1);
 593         }
 594 #endif
 595 }
 596
 597 static device_method_t ehci_methods[] = {
 598         /* Device interface */
 599         DEVMETHOD(device_probe, ehci_pci_probe),
 600         DEVMETHOD(device_attach, ehci_pci_attach),
 601         DEVMETHOD(device_detach, ehci_pci_detach),
 602         DEVMETHOD(device_suspend, ehci_pci_suspend),
 603         DEVMETHOD(device_resume, ehci_pci_resume),
 604         DEVMETHOD(device_shutdown, ehci_pci_shutdown),
 605
 606         /* Bus interface */
 607         DEVMETHOD(bus_print_child, bus_generic_print_child),
 608
 609         {0, 0}
 610 };
 611
 612 static driver_t ehci_driver = {
 613         "ehci",
 614         ehci_methods,
 615         sizeof(ehci_softc_t),
 616 };
 617
 618 static devclass_t ehci_devclass;
 619
 620 DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0);
 621 DRIVER_MODULE(ehci, cardbus, ehci_driver, ehci_devclass, 0, 0);