sys/dev/usb/ohci_pci.c

   1 /*-
   2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
   3  * All rights reserved.
   4  *
   5  * This code is derived from software contributed to The NetBSD Foundation
   6  * by Lennart Augustsson (augustss@carlstedt.se) at
   7  * Carlstedt Research & Technology.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *        This product includes software developed by the NetBSD
  20  *        Foundation, Inc. and its contributors.
  21  * 4. Neither the name of The NetBSD Foundation nor the names of its
  22  *    contributors may be used to endorse or promote products derived
  23  *    from this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  */
  37
  38 #include <sys/cdefs.h>
  39 __FBSDID("$FreeBSD$");
  40
  41 /*
  42  * USB Open Host Controller driver.
  43  *
  44  * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
  45  */
  46
  47 /* The low level controller code for OHCI has been split into
  48  * PCI probes and OHCI specific code. This was done to facilitate the
  49  * sharing of code between *BSD's
  50  */
  51
  52 #include "opt_bus.h"
  53
  54 #include <sys/param.h>
  55 #include <sys/systm.h>
  56 #include <sys/kernel.h>
  57 #include <sys/module.h>
  58 #include <sys/lock.h>
  59 #include <sys/mutex.h>
  60 #include <sys/bus.h>
  61 #include <sys/queue.h>
  62 #include <machine/bus.h>
  63 #include <sys/rman.h>
  64 #include <machine/resource.h>
  65
  66 #include <dev/pci/pcivar.h>
  67 #include <dev/pci/pcireg.h>
  68
  69 #include <dev/usb/usb.h>
  70 #include <dev/usb/usbdi.h>
  71 #include <dev/usb/usbdivar.h>
  72 #include <dev/usb/usb_mem.h>
  73
  74 #include <dev/usb/ohcireg.h>
  75 #include <dev/usb/ohcivar.h>
  76
  77 #define PCI_OHCI_VENDORID_ACERLABS      0x10b9
  78 #define PCI_OHCI_VENDORID_AMD           0x1022
  79 #define PCI_OHCI_VENDORID_APPLE         0x106b
  80 #define PCI_OHCI_VENDORID_ATI           0x1002
  81 #define PCI_OHCI_VENDORID_CMDTECH       0x1095
  82 #define PCI_OHCI_VENDORID_NEC           0x1033
  83 #define PCI_OHCI_VENDORID_NVIDIA        0x12D2
  84 #define PCI_OHCI_VENDORID_NVIDIA2       0x10DE
  85 #define PCI_OHCI_VENDORID_OPTI          0x1045
  86 #define PCI_OHCI_VENDORID_SIS           0x1039
  87 #define PCI_OHCI_VENDORID_SUN           0x108e
  88
  89 #define PCI_OHCI_DEVICEID_ALADDIN_V     0x523710b9
  90 static const char *ohci_device_aladdin_v = "AcerLabs M5237 (Aladdin-V) USB controller";
  91
  92 #define PCI_OHCI_DEVICEID_AMD756        0x740c1022
  93 static const char *ohci_device_amd756 = "AMD-756 USB Controller";
  94
  95 #define PCI_OHCI_DEVICEID_AMD766        0x74141022
  96 static const char *ohci_device_amd766 = "AMD-766 USB Controller";
  97
  98 #define PCI_OHCI_DEVICEID_SB400_1       0x43741002
  99 #define PCI_OHCI_DEVICEID_SB400_2       0x43751002
 100 static const char *ohci_device_sb400 = "ATI SB400 USB Controller";
 101
 102 #define PCI_OHCI_DEVICEID_FIRELINK      0xc8611045
 103 static const char *ohci_device_firelink = "OPTi 82C861 (FireLink) USB controller";
 104
 105 #define PCI_OHCI_DEVICEID_NEC           0x00351033
 106 static const char *ohci_device_nec = "NEC uPD 9210 USB controller";
 107
 108 #define PCI_OHCI_DEVICEID_NFORCE3       0x00d710de
 109 static const char *ohci_device_nforce3 = "nVidia nForce3 USB Controller";
 110
 111 #define PCI_OHCI_DEVICEID_USB0670       0x06701095
 112 static const char *ohci_device_usb0670 = "CMD Tech 670 (USB0670) USB controller";
 113
 114 #define PCI_OHCI_DEVICEID_USB0673       0x06731095
 115 static const char *ohci_device_usb0673 = "CMD Tech 673 (USB0673) USB controller";
 116
 117 #define PCI_OHCI_DEVICEID_SIS5571       0x70011039
 118 static const char *ohci_device_sis5571 = "SiS 5571 USB controller";
 119
 120 #define PCI_OHCI_DEVICEID_KEYLARGO      0x0019106b
 121 static const char *ohci_device_keylargo = "Apple KeyLargo USB controller";
 122
 123 #define PCI_OHCI_DEVICEID_PCIO2USB      0x1103108e
 124 static const char *ohci_device_pcio2usb = "Sun PCIO-2 USB controller";
 125
 126 static const char *ohci_device_generic = "OHCI (generic) USB controller";
 127
 128 #define PCI_OHCI_BASE_REG       0x10
 129
 130
 131 static device_attach_t ohci_pci_attach;
 132 static device_detach_t ohci_pci_detach;
 133 static device_suspend_t ohci_pci_suspend;
 134 static device_resume_t ohci_pci_resume;
 135
 136 static int
 137 ohci_pci_suspend(device_t self)
 138 {
 139         ohci_softc_t *sc = device_get_softc(self);
 140         int err;
 141
 142         err = bus_generic_suspend(self);
 143         if (err)
 144                 return err;
 145         ohci_power(PWR_SUSPEND, sc);
 146
 147         return 0;
 148 }
 149
 150 static int
 151 ohci_pci_resume(device_t self)
 152 {
 153         ohci_softc_t *sc = device_get_softc(self);
 154
 155         ohci_power(PWR_RESUME, sc);
 156         bus_generic_resume(self);
 157
 158         return 0;
 159 }
 160
 161 static const char *
 162 ohci_pci_match(device_t self)
 163 {
 164         u_int32_t device_id = pci_get_devid(self);
 165
 166         switch (device_id) {
 167         case PCI_OHCI_DEVICEID_ALADDIN_V:
 168                 return (ohci_device_aladdin_v);
 169         case PCI_OHCI_DEVICEID_AMD756:
 170                 return (ohci_device_amd756);
 171         case PCI_OHCI_DEVICEID_AMD766:
 172                 return (ohci_device_amd766);
 173         case PCI_OHCI_DEVICEID_SB400_1:
 174         case PCI_OHCI_DEVICEID_SB400_2:
 175                 return (ohci_device_sb400);
 176         case PCI_OHCI_DEVICEID_USB0670:
 177                 return (ohci_device_usb0670);
 178         case PCI_OHCI_DEVICEID_USB0673:
 179                 return (ohci_device_usb0673);
 180         case PCI_OHCI_DEVICEID_FIRELINK:
 181                 return (ohci_device_firelink);
 182         case PCI_OHCI_DEVICEID_NEC:
 183                 return (ohci_device_nec);
 184         case PCI_OHCI_DEVICEID_NFORCE3:
 185                 return (ohci_device_nforce3);
 186         case PCI_OHCI_DEVICEID_SIS5571:
 187                 return (ohci_device_sis5571);
 188         case PCI_OHCI_DEVICEID_KEYLARGO:
 189                 return (ohci_device_keylargo);
 190         case PCI_OHCI_DEVICEID_PCIO2USB:
 191                 return (ohci_device_pcio2usb);
 192         default:
 193                 if (pci_get_class(self) == PCIC_SERIALBUS
 194                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
 195                     && pci_get_progif(self) == PCI_INTERFACE_OHCI) {
 196                         return (ohci_device_generic);
 197                 }
 198         }
 199
 200         return NULL;            /* dunno */
 201 }
 202
 203 static int
 204 ohci_pci_probe(device_t self)
 205 {
 206         const char *desc = ohci_pci_match(self);
 207
 208         if (desc) {
 209                 device_set_desc(self, desc);
 210                 return BUS_PROBE_DEFAULT;
 211         } else {
 212                 return ENXIO;
 213         }
 214 }
 215
 216 static int
 217 ohci_pci_attach(device_t self)
 218 {
 219         ohci_softc_t *sc = device_get_softc(self);
 220         int err;
 221         int rid;
 222
 223         /* XXX where does it say so in the spec? */
 224         sc->sc_bus.usbrev = USBREV_1_0;
 225
 226         pci_enable_busmaster(self);
 227
 228         /*
 229          * Some Sun PCIO-2 USB controllers have their intpin register
 230          * bogusly set to 0, although it should be 4. Correct that.
 231          */
 232         if (pci_get_devid(self) == PCI_OHCI_DEVICEID_PCIO2USB &&
 233             pci_get_intpin(self) == 0)
 234                 pci_set_intpin(self, 4);
 235
 236         rid = PCI_CBMEM;
 237         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
 238             RF_ACTIVE);
 239         if (!sc->io_res) {
 240                 device_printf(self, "Could not map memory\n");
 241                 return ENXIO;
 242         }
 243         sc->iot = rman_get_bustag(sc->io_res);
 244         sc->ioh = rman_get_bushandle(sc->io_res);
 245
 246         rid = 0;
 247         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
 248             RF_SHAREABLE | RF_ACTIVE);
 249         if (sc->irq_res == NULL) {
 250                 device_printf(self, "Could not allocate irq\n");
 251                 ohci_pci_detach(self);
 252                 return ENXIO;
 253         }
 254         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
 255         if (!sc->sc_bus.bdev) {
 256                 device_printf(self, "Could not add USB device\n");
 257                 ohci_pci_detach(self);
 258                 return ENOMEM;
 259         }
 260         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
 261
 262         /* ohci_pci_match will never return NULL if ohci_pci_probe succeeded */
 263         device_set_desc(sc->sc_bus.bdev, ohci_pci_match(self));
 264         switch (pci_get_vendor(self)) {
 265         case PCI_OHCI_VENDORID_ACERLABS:
 266                 sprintf(sc->sc_vendor, "AcerLabs");
 267                 break;
 268         case PCI_OHCI_VENDORID_AMD:
 269                 sprintf(sc->sc_vendor, "AMD");
 270                 break;
 271         case PCI_OHCI_VENDORID_APPLE:
 272                 sprintf(sc->sc_vendor, "Apple");
 273                 break;
 274         case PCI_OHCI_VENDORID_ATI:
 275                 sprintf(sc->sc_vendor, "ATI");
 276                 break;
 277         case PCI_OHCI_VENDORID_CMDTECH:
 278                 sprintf(sc->sc_vendor, "CMDTECH");
 279                 break;
 280         case PCI_OHCI_VENDORID_NEC:
 281                 sprintf(sc->sc_vendor, "NEC");
 282                 break;
 283         case PCI_OHCI_VENDORID_NVIDIA:
 284         case PCI_OHCI_VENDORID_NVIDIA2:
 285                 sprintf(sc->sc_vendor, "nVidia");
 286                 break;
 287         case PCI_OHCI_VENDORID_OPTI:
 288                 sprintf(sc->sc_vendor, "OPTi");
 289                 break;
 290         case PCI_OHCI_VENDORID_SIS:
 291                 sprintf(sc->sc_vendor, "SiS");
 292                 break;
 293         default:
 294                 if (bootverbose)
 295                         device_printf(self, "(New OHCI DeviceId=0x%08x)\n",
 296                             pci_get_devid(self));
 297                 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
 298         }
 299
 300         err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO, NULL, ohci_intr,
 301                              sc, &sc->ih);
 302         if (err) {
 303                 device_printf(self, "Could not setup irq, %d\n", err);
 304                 sc->ih = NULL;
 305                 ohci_pci_detach(self);
 306                 return ENXIO;
 307         }
 308
 309         /* Allocate a parent dma tag for DMA maps */
 310         err = bus_dma_tag_create(bus_get_dma_tag(self), 1, 0,
 311             BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
 312             BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
 313             NULL, NULL, &sc->sc_bus.parent_dmatag);
 314         if (err) {
 315                 device_printf(self, "Could not allocate parent DMA tag (%d)\n",
 316                     err);
 317                 ohci_pci_detach(self);
 318                 return ENXIO;
 319         }
 320         /* Allocate a dma tag for transfer buffers */
 321         err = bus_dma_tag_create(sc->sc_bus.parent_dmatag, 1, 0,
 322             BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
 323             BUS_SPACE_MAXSIZE_32BIT, USB_DMA_NSEG, BUS_SPACE_MAXSIZE_32BIT, 0,
 324             busdma_lock_mutex, &Giant, &sc->sc_bus.buffer_dmatag);
 325         if (err) {
 326                 device_printf(self, "Could not allocate transfer tag (%d)\n",
 327                     err);
 328                 ohci_pci_detach(self);
 329                 return ENXIO;
 330         }
 331
 332         err = ohci_init(sc);
 333         if (!err) {
 334                 sc->sc_flags |= OHCI_SCFLG_DONEINIT;
 335                 err = device_probe_and_attach(sc->sc_bus.bdev);
 336         }
 337
 338         if (err) {
 339                 device_printf(self, "USB init failed\n");
 340                 ohci_pci_detach(self);
 341                 return EIO;
 342         }
 343         return 0;
 344 }
 345
 346 static int
 347 ohci_pci_detach(device_t self)
 348 {
 349         ohci_softc_t *sc = device_get_softc(self);
 350
 351         if (sc->sc_flags & OHCI_SCFLG_DONEINIT) {
 352                 ohci_detach(sc, 0);
 353                 sc->sc_flags &= ~OHCI_SCFLG_DONEINIT;
 354         }
 355
 356         if (sc->sc_bus.parent_dmatag != NULL)
 357                 bus_dma_tag_destroy(sc->sc_bus.parent_dmatag);
 358         if (sc->sc_bus.buffer_dmatag != NULL)
 359                 bus_dma_tag_destroy(sc->sc_bus.buffer_dmatag);
 360
 361         if (sc->irq_res && sc->ih) {
 362                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
 363
 364                 if (err)
 365                         /* XXX or should we panic? */
 366                         device_printf(self, "Could not tear down irq, %d\n",
 367                             err);
 368                 sc->ih = NULL;
 369         }
 370         if (sc->sc_bus.bdev) {
 371                 device_delete_child(self, sc->sc_bus.bdev);
 372                 sc->sc_bus.bdev = NULL;
 373         }
 374         if (sc->irq_res) {
 375                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
 376                 sc->irq_res = NULL;
 377         }
 378         if (sc->io_res) {
 379                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM,
 380                     sc->io_res);
 381                 sc->io_res = NULL;
 382                 sc->iot = 0;
 383                 sc->ioh = 0;
 384         }
 385         return 0;
 386 }
 387
 388 static device_method_t ohci_methods[] = {
 389         /* Device interface */
 390         DEVMETHOD(device_probe, ohci_pci_probe),
 391         DEVMETHOD(device_attach, ohci_pci_attach),
 392         DEVMETHOD(device_detach, ohci_pci_detach),
 393         DEVMETHOD(device_suspend, ohci_pci_suspend),
 394         DEVMETHOD(device_resume, ohci_pci_resume),
 395         DEVMETHOD(device_shutdown, bus_generic_shutdown),
 396
 397         /* Bus interface */
 398         DEVMETHOD(bus_print_child, bus_generic_print_child),
 399
 400         {0, 0}
 401 };
 402
 403 static driver_t ohci_driver = {
 404         "ohci",
 405         ohci_methods,
 406         sizeof(ohci_softc_t),
 407 };
 408
 409 static devclass_t ohci_devclass;
 410
 411 DRIVER_MODULE(ohci, pci, ohci_driver, ohci_devclass, 0, 0);
 412 DRIVER_MODULE(ohci, cardbus, ohci_driver, ohci_devclass, 0, 0);