2 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
7 * NASA Ames Research Center.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
39 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
40 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
42 * Redistribution and use in source and binary forms, with or without
43 * modification, are permitted provided that the following conditions
45 * 1. Redistributions of source code must retain the above copyright
46 * notice, this list of conditions and the following disclaimer.
47 * 2. Redistributions in binary form must reproduce the above copyright
48 * notice, this list of conditions and the following disclaimer in the
49 * documentation and/or other materials provided with the distribution.
50 * 3. All advertising materials mentioning features or use of this software
51 * must display the following acknowledgement:
52 * This product includes software developed by Christopher G. Demetriou
53 * for the NetBSD Project.
54 * 4. The name of the author may not be used to endorse or promote products
55 * derived from this software without specific prior written permission
57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68 * $NetBSD: bus.h,v 1.9.4.1 2000/06/30 16:27:30 simonb Exp $
72 #ifndef _MACPPC_BUS_H_
73 #define _MACPPC_BUS_H_
75 #include <machine/_bus.h>
76 #include <machine/pio.h>
78 #define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
79 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
80 #define BUS_SPACE_MAXSIZE 0xFFFFFFFF
81 #define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
82 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
83 #define BUS_SPACE_MAXADDR 0xFFFFFFFF
85 #define BUS_SPACE_UNRESTRICTED (~0)
88 * Values for the macppc bus space tag, not to be used directly by MI code.
91 #define __BUS_SPACE_HAS_STREAM_METHODS 1
94 * Define the PPC tag values
96 #define PPC_BUS_SPACE_MEM 1 /* space is mem space */
97 #define PPC_BUS_SPACE_IO 2 /* space is io space */
99 static __inline void *
100 __ppc_ba(bus_space_tag_t tag __unused, bus_space_handle_t handle,
103 return ((void *)(handle + offset));
107 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
108 * bus_size_t size, int flags, bus_space_handle_t *bshp));
110 * Map a region of bus space.
114 bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr,
115 bus_size_t size __unused, int flags __unused,
116 bus_space_handle_t *bshp)
124 * int bus_space_unmap(bus_space_tag_t t,
125 * bus_space_handle_t bsh, bus_size_t size));
127 * Unmap a region of bus space.
131 bus_space_unmap(bus_space_tag_t t __unused, bus_space_handle_t bsh __unused,
132 bus_size_t size __unused)
137 * int bus_space_subregion(bus_space_tag_t t,
138 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
139 * bus_space_handle_t *nbshp));
141 * Get a new handle for a subregion of an already-mapped area of bus space.
145 bus_space_subregion(bus_space_tag_t t __unused, bus_space_handle_t bsh,
146 bus_size_t offset, bus_size_t size __unused, bus_space_handle_t *nbshp)
148 *nbshp = bsh + offset;
153 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
154 * bus_addr_t rend, bus_size_t size, bus_size_t align,
155 * bus_size_t boundary, int flags, bus_addr_t *addrp,
156 * bus_space_handle_t *bshp));
158 * Allocate a region of bus space.
162 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) !!! unimplemented !!!
166 * int bus_space_free(bus_space_tag_t t,
167 * bus_space_handle_t bsh, bus_size_t size));
169 * Free a region of bus space.
172 #define bus_space_free(t, h, s) !!! unimplemented !!!
176 * u_intN_t bus_space_read_N(bus_space_tag_t tag,
177 * bus_space_handle_t bsh, bus_size_t offset));
179 * Read a 1, 2, 4, or 8 byte quantity from bus space
180 * described by tag/handle/offset.
183 static __inline u_int8_t
184 bus_space_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
186 return (in8(__ppc_ba(t, h, o)));
189 static __inline u_int16_t
190 bus_space_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
192 return (in16rb(__ppc_ba(t, h, o)));
195 static __inline u_int32_t
196 bus_space_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
198 return (in32rb(__ppc_ba(t, h, o)));
201 #if 0 /* Cause a link error for bus_space_read_8 */
202 #define bus_space_read_8(t, h, o) !!! unimplemented !!!
205 static __inline u_int8_t
206 bus_space_read_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
208 return (in8(__ppc_ba(t, h, o)));
211 static __inline u_int16_t
212 bus_space_read_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
214 return (in16(__ppc_ba(t, h, o)));
217 static __inline u_int32_t
218 bus_space_read_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
220 return (in32(__ppc_ba(t, h, o)));
223 #if 0 /* Cause a link error for bus_space_read_stream_8 */
224 #define bus_space_read_stream_8(t, h, o) !!! unimplemented !!!
228 * void bus_space_read_multi_N(bus_space_tag_t tag,
229 * bus_space_handle_t bsh, bus_size_t offset,
230 * u_intN_t *addr, size_t count));
232 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
233 * described by tag/handle/offset and copy into buffer provided.
237 bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
238 u_int8_t *a, size_t c)
240 ins8(__ppc_ba(t, h, o), a, c);
244 bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
245 u_int16_t *a, size_t c)
247 ins16rb(__ppc_ba(t, h, o), a, c);
251 bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
252 u_int32_t *a, size_t c)
254 ins32rb(__ppc_ba(t, h, o), a, c);
257 #if 0 /* Cause a link error for bus_space_read_multi_8 */
258 #define bus_space_read_multi_8 !!! unimplemented !!!
262 bus_space_read_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
263 bus_size_t o, u_int8_t *a, size_t c)
265 ins8(__ppc_ba(t, h, o), a, c);
269 bus_space_read_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
270 bus_size_t o, u_int16_t *a, size_t c)
272 ins16(__ppc_ba(t, h, o), a, c);
276 bus_space_read_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
277 bus_size_t o, u_int32_t *a, size_t c)
279 ins32(__ppc_ba(t, h, o), a, c);
282 #if 0 /* Cause a link error for bus_space_read_multi_stream_8 */
283 #define bus_space_read_multi_stream_8 !!! unimplemented !!!
287 * void bus_space_read_region_N(bus_space_tag_t tag,
288 * bus_space_handle_t bsh, bus_size_t offset,
289 * u_intN_t *addr, size_t count));
291 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
292 * described by tag/handle and starting at `offset' and copy into
297 bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
298 bus_size_t offset, u_int8_t *addr, size_t count)
300 volatile u_int8_t *s = __ppc_ba(tag, bsh, offset);
304 __asm __volatile("eieio; sync");
308 bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
309 bus_size_t offset, u_int16_t *addr, size_t count)
311 volatile u_int16_t *s = __ppc_ba(tag, bsh, offset);
314 __asm __volatile("lhbrx %0, 0, %1" :
315 "=r"(*addr++) : "r"(s++));
316 __asm __volatile("eieio; sync");
320 bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
321 bus_size_t offset, u_int32_t *addr, size_t count)
323 volatile u_int32_t *s = __ppc_ba(tag, bsh, offset);
326 __asm __volatile("lwbrx %0, 0, %1" :
327 "=r"(*addr++) : "r"(s++));
328 __asm __volatile("eieio; sync");
331 #if 0 /* Cause a link error for bus_space_read_region_8 */
332 #define bus_space_read_region_8 !!! unimplemented !!!
336 bus_space_read_region_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
337 bus_size_t offset, u_int16_t *addr, size_t count)
339 volatile u_int16_t *s = __ppc_ba(tag, bsh, offset);
343 __asm __volatile("eieio; sync");
347 bus_space_read_region_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
348 bus_size_t offset, u_int32_t *addr, size_t count)
350 volatile u_int32_t *s = __ppc_ba(tag, bsh, offset);
354 __asm __volatile("eieio; sync");
357 #if 0 /* Cause a link error */
358 #define bus_space_read_region_stream_8 !!! unimplemented !!!
362 * void bus_space_write_N(bus_space_tag_t tag,
363 * bus_space_handle_t bsh, bus_size_t offset,
366 * Write the 1, 2, 4, or 8 byte value `value' to bus space
367 * described by tag/handle/offset.
371 bus_space_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
374 out8(__ppc_ba(t, h, o), v);
378 bus_space_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
381 out16rb(__ppc_ba(t, h, o), v);
385 bus_space_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
388 out32rb(__ppc_ba(t, h, o), v);
391 #if 0 /* Cause a link error for bus_space_write_8 */
392 #define bus_space_write_8 !!! unimplemented !!!
396 bus_space_write_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
399 out8(__ppc_ba(t, h, o), v);
403 bus_space_write_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
406 out16(__ppc_ba(t, h, o), v);
410 bus_space_write_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
413 out32(__ppc_ba(t, h, o), v);
416 #if 0 /* Cause a link error for bus_space_write_stream_8 */
417 #define bus_space_write_stream_8 !!! unimplemented !!!
422 * void bus_space_write_multi_N(bus_space_tag_t tag,
423 * bus_space_handle_t bsh, bus_size_t offset,
424 * const u_intN_t *addr, size_t count));
426 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
427 * provided to bus space described by tag/handle/offset.
431 bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
432 uint8_t *a, size_t c)
434 outsb(__ppc_ba(t, h, o), a, c);
438 bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
439 uint16_t *a, size_t c)
441 outsw(__ppc_ba(t, h, o), a, c);
445 bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
446 uint32_t *a, size_t c)
448 outsl(__ppc_ba(t, h, o), a, c);
452 #define bus_space_write_multi_8 !!! unimplemented !!!
456 bus_space_write_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
457 bus_size_t o, const u_int8_t *a, size_t c)
459 outsb(__ppc_ba(t, h, o), a, c);
463 bus_space_write_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
464 bus_size_t o, const u_int16_t *a, size_t c)
466 outsw(__ppc_ba(t, h, o), a, c);
470 bus_space_write_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
471 bus_size_t o, const u_int32_t *a, size_t c)
473 outsl(__ppc_ba(t, h, o), a, c);
477 #define bus_space_write_multi_stream_8 !!! unimplemented !!!
481 * void bus_space_write_region_N(bus_space_tag_t tag,
482 * bus_space_handle_t bsh, bus_size_t offset,
483 * const u_intN_t *addr, size_t count));
485 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
486 * to bus space described by tag/handle starting at `offset'.
490 bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
491 bus_size_t offset, const u_int8_t *addr, size_t count)
493 volatile u_int8_t *d = __ppc_ba(tag, bsh, offset);
497 __asm __volatile("eieio; sync");
501 bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
502 bus_size_t offset, const u_int16_t *addr, size_t count)
504 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
507 __asm __volatile("sthbrx %0, 0, %1" ::
508 "r"(*addr++), "r"(d++));
509 __asm __volatile("eieio; sync");
513 bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
514 bus_size_t offset, const u_int32_t *addr, size_t count)
516 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
519 __asm __volatile("stwbrx %0, 0, %1" ::
520 "r"(*addr++), "r"(d++));
521 __asm __volatile("eieio; sync");
525 #define bus_space_write_region_8 !!! bus_space_write_region_8 unimplemented !!!
529 bus_space_write_region_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
530 bus_size_t offset, const u_int16_t *addr, size_t count)
532 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
536 __asm __volatile("eieio; sync");
540 bus_space_write_region_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
541 bus_size_t offset, const u_int32_t *addr, size_t count)
543 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
547 __asm __volatile("eieio; sync");
551 #define bus_space_write_region_stream_8 !!! unimplemented !!!
555 * void bus_space_set_multi_N(bus_space_tag_t tag,
556 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
559 * Write the 1, 2, 4, or 8 byte value `val' to bus space described
560 * by tag/handle/offset `count' times.
564 bus_space_set_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
565 bus_size_t offset, u_int8_t val, size_t count)
567 volatile u_int8_t *d = __ppc_ba(tag, bsh, offset);
571 __asm __volatile("eieio; sync");
575 bus_space_set_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
576 bus_size_t offset, u_int16_t val, size_t count)
578 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
581 __asm __volatile("sthbrx %0, 0, %1" ::
583 __asm __volatile("eieio; sync");
587 bus_space_set_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
588 bus_size_t offset, u_int32_t val, size_t count)
590 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
593 __asm __volatile("stwbrx %0, 0, %1" ::
595 __asm __volatile("eieio; sync");
599 #define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
603 bus_space_set_multi_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
604 bus_size_t offset, u_int16_t val, size_t count)
606 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
610 __asm __volatile("eieio; sync");
614 bus_space_set_multi_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
615 bus_size_t offset, u_int32_t val, size_t count)
617 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
621 __asm __volatile("eieio; sync");
625 #define bus_space_set_multi_stream_8 !!! unimplemented !!!
629 * void bus_space_set_region_N(bus_space_tag_t tag,
630 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
633 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
634 * by tag/handle starting at `offset'.
638 bus_space_set_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
639 bus_size_t offset, u_int8_t val, size_t count)
641 volatile u_int8_t *d = __ppc_ba(tag, bsh, offset);
645 __asm __volatile("eieio; sync");
649 bus_space_set_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
650 bus_size_t offset, u_int16_t val, size_t count)
652 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
655 __asm __volatile("sthbrx %0, 0, %1" ::
657 __asm __volatile("eieio; sync");
661 bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
662 bus_size_t offset, u_int32_t val, size_t count)
664 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
667 __asm __volatile("stwbrx %0, 0, %1" ::
669 __asm __volatile("eieio; sync");
673 #define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!!
677 bus_space_set_region_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
678 bus_size_t offset, u_int16_t val, size_t count)
680 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
684 __asm __volatile("eieio; sync");
688 bus_space_set_region_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
689 bus_size_t offset, u_int32_t val, size_t count)
691 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
695 __asm __volatile("eieio; sync");
699 #define bus_space_set_region_stream_8 !!! unimplemented !!!
703 * void bus_space_copy_region_N(bus_space_tag_t tag,
704 * bus_space_handle_t bsh1, bus_size_t off1,
705 * bus_space_handle_t bsh2, bus_size_t off2,
708 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
709 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
712 /* XXX IMPLEMENT bus_space_copy_N() XXX */
715 * Bus read/write barrier methods.
717 * void bus_space_barrier(bus_space_tag_t tag,
718 * bus_space_handle_t bsh, bus_size_t offset,
719 * bus_size_t len, int flags));
721 * Note: the macppc does not currently require barriers, but we must
722 * provide the flags to MI code.
725 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
726 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
729 bus_space_barrier(bus_space_tag_t tag __unused,
730 bus_space_handle_t bsh __unused, bus_size_t offset __unused,
731 bus_size_t len __unused, int flags __unused)
733 __asm __volatile("" : : : "memory");
737 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
739 #include <machine/bus_dma.h>
741 #endif /* _MACPPC_BUS_H_ */