2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 #include <sys/cdefs.h>
41 __FBSDID("$FreeBSD$");
44 #include "opt_atalk.h"
45 #include "opt_compat.h"
51 #include "opt_kstack_pages.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
58 #include <sys/param.h>
60 #include <sys/systm.h>
64 #include <sys/callout.h>
67 #include <sys/eventhandler.h>
69 #include <sys/imgact.h>
71 #include <sys/kernel.h>
73 #include <sys/linker.h>
75 #include <sys/malloc.h>
76 #include <sys/memrange.h>
77 #include <sys/msgbuf.h>
78 #include <sys/mutex.h>
80 #include <sys/ptrace.h>
81 #include <sys/reboot.h>
82 #include <sys/sched.h>
83 #include <sys/signalvar.h>
84 #include <sys/sysctl.h>
85 #include <sys/sysent.h>
86 #include <sys/sysproto.h>
87 #include <sys/ucontext.h>
88 #include <sys/vmmeter.h>
91 #include <vm/vm_extern.h>
92 #include <vm/vm_kern.h>
93 #include <vm/vm_page.h>
94 #include <vm/vm_map.h>
95 #include <vm/vm_object.h>
96 #include <vm/vm_pager.h>
97 #include <vm/vm_param.h>
101 #error KDB must be enabled in order for DDB to work!
104 #include <ddb/db_sym.h>
109 #include <net/netisr.h>
111 #include <machine/bootinfo.h>
112 #include <machine/clock.h>
113 #include <machine/cpu.h>
114 #include <machine/cputypes.h>
115 #include <machine/intr_machdep.h>
116 #include <machine/mca.h>
117 #include <machine/md_var.h>
118 #include <machine/metadata.h>
119 #include <machine/pc/bios.h>
120 #include <machine/pcb.h>
121 #include <machine/pcb_ext.h>
122 #include <machine/proc.h>
123 #include <machine/reg.h>
124 #include <machine/sigframe.h>
125 #include <machine/specialreg.h>
126 #include <machine/vm86.h>
128 #include <machine/perfmon.h>
131 #include <machine/smp.h>
135 #include <i386/isa/icu.h>
139 #include <machine/xbox.h>
141 int arch_i386_is_xbox = 0;
142 uint32_t arch_i386_xbox_memsize = 0;
147 #include <machine/xen/xen-os.h>
148 #include <xen/hypervisor.h>
149 #include <machine/xen/xen-os.h>
150 #include <machine/xen/xenvar.h>
151 #include <machine/xen/xenfunc.h>
152 #include <xen/xen_intr.h>
154 void Xhypervisor_callback(void);
155 void failsafe_callback(void);
157 extern trap_info_t trap_table[];
158 struct proc_ldt default_proc_ldt;
159 extern int init_first;
161 extern unsigned long physfree;
164 /* Sanity check for __curthread() */
165 CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
167 extern void init386(int first);
168 extern void dblfault_handler(void);
170 extern void printcpuinfo(void); /* XXX header file */
171 extern void finishidentcpu(void);
172 extern void panicifcpuunsupported(void);
173 extern void initializecpu(void);
175 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
176 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
178 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
179 #define CPU_ENABLE_SSE
182 static void cpu_startup(void *);
183 static void fpstate_drop(struct thread *td);
184 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
185 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
186 #ifdef CPU_ENABLE_SSE
187 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
188 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
189 #endif /* CPU_ENABLE_SSE */
190 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
193 extern vm_offset_t ksym_start, ksym_end;
196 /* Intel ICH registers */
197 #define ICH_PMBASE 0x400
198 #define ICH_SMI_EN ICH_PMBASE + 0x30
200 int _udatasel, _ucodesel;
206 static void osendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
208 #ifdef COMPAT_FREEBSD4
209 static void freebsd4_sendsig(sig_t catcher, ksiginfo_t *, sigset_t *mask);
216 FEATURE(pae, "Physical Address Extensions");
220 * The number of PHYSMAP entries must be one less than the number of
221 * PHYSSEG entries because the PHYSMAP entry that spans the largest
222 * physical address that is accessible by ISA DMA is split into two
225 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
227 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
228 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
230 /* must be 2 less so 0 0 can signal end of chunks */
231 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
232 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
234 struct kva_md_info kmi;
236 static struct trapframe proc0_tf;
237 struct pcpu __pcpu[MAXCPU];
241 struct mem_range_softc mem_range_softc;
251 * On MacBooks, we need to disallow the legacy USB circuit to
252 * generate an SMI# because this can cause several problems,
253 * namely: incorrect CPU frequency detection and failure to
255 * We do this by disabling a bit in the SMI_EN (SMI Control and
256 * Enable register) of the Intel ICH LPC Interface Bridge.
258 sysenv = getenv("smbios.system.product");
259 if (sysenv != NULL) {
260 if (strncmp(sysenv, "MacBook1,1", 10) == 0 ||
261 strncmp(sysenv, "MacBook3,1", 10) == 0 ||
262 strncmp(sysenv, "MacBookPro1,1", 13) == 0 ||
263 strncmp(sysenv, "MacBookPro1,2", 13) == 0 ||
264 strncmp(sysenv, "MacBookPro3,1", 13) == 0 ||
265 strncmp(sysenv, "Macmini1,1", 10) == 0) {
267 printf("Disabling LEGACY_USB_EN bit on "
269 outl(ICH_SMI_EN, inl(ICH_SMI_EN) & ~0x8);
275 * Good {morning,afternoon,evening,night}.
279 panicifcpuunsupported();
286 * Display physical memory if SMBIOS reports reasonable amount.
289 sysenv = getenv("smbios.memory.enabled");
290 if (sysenv != NULL) {
291 memsize = (uintmax_t)strtoul(sysenv, (char **)NULL, 10) << 10;
294 if (memsize < ptoa((uintmax_t)cnt.v_free_count))
295 memsize = ptoa((uintmax_t)Maxmem);
296 printf("real memory = %ju (%ju MB)\n", memsize, memsize >> 20);
299 * Display any holes after the first chunk of extended memory.
304 printf("Physical memory chunk(s):\n");
305 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
308 size = phys_avail[indx + 1] - phys_avail[indx];
310 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
311 (uintmax_t)phys_avail[indx],
312 (uintmax_t)phys_avail[indx + 1] - 1,
313 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
317 vm_ksubmap_init(&kmi);
319 printf("avail memory = %ju (%ju MB)\n",
320 ptoa((uintmax_t)cnt.v_free_count),
321 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
324 * Set up buffers, so they can be used to read disk labels.
327 vm_pager_bufferinit();
334 * Send an interrupt to process.
336 * Stack is set up to allow sigcode stored
337 * at top to call routine, followed by kcall
338 * to sigreturn routine below. After sigreturn
339 * resets the signal mask, the stack, and the
340 * frame pointer, it returns to the user
345 osendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
347 struct osigframe sf, *fp;
351 struct trapframe *regs;
357 PROC_LOCK_ASSERT(p, MA_OWNED);
358 sig = ksi->ksi_signo;
360 mtx_assert(&psp->ps_mtx, MA_OWNED);
362 oonstack = sigonstack(regs->tf_esp);
364 /* Allocate space for the signal handler context. */
365 if ((td->td_pflags & TDP_ALTSTACK) && !oonstack &&
366 SIGISMEMBER(psp->ps_sigonstack, sig)) {
367 fp = (struct osigframe *)(td->td_sigstk.ss_sp +
368 td->td_sigstk.ss_size - sizeof(struct osigframe));
369 #if defined(COMPAT_43)
370 td->td_sigstk.ss_flags |= SS_ONSTACK;
373 fp = (struct osigframe *)regs->tf_esp - 1;
375 /* Translate the signal if appropriate. */
376 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
377 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
379 /* Build the argument list for the signal handler. */
381 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
382 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
383 /* Signal handler installed with SA_SIGINFO. */
384 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
385 sf.sf_siginfo.si_signo = sig;
386 sf.sf_siginfo.si_code = ksi->ksi_code;
387 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
389 /* Old FreeBSD-style arguments. */
390 sf.sf_arg2 = ksi->ksi_code;
391 sf.sf_addr = (register_t)ksi->ksi_addr;
392 sf.sf_ahu.sf_handler = catcher;
394 mtx_unlock(&psp->ps_mtx);
397 /* Save most if not all of trap frame. */
398 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
399 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
400 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
401 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
402 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
403 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
404 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
405 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
406 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
407 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
408 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
409 sf.sf_siginfo.si_sc.sc_gs = rgs();
410 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
412 /* Build the signal context to be used by osigreturn(). */
413 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
414 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
415 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
416 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
417 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
418 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
419 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
420 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
423 * If we're a vm86 process, we want to save the segment registers.
424 * We also change eflags to be our emulated eflags, not the actual
427 if (regs->tf_eflags & PSL_VM) {
428 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
429 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
430 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
432 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
433 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
434 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
435 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
437 if (vm86->vm86_has_vme == 0)
438 sf.sf_siginfo.si_sc.sc_ps =
439 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
440 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
442 /* See sendsig() for comments. */
443 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
447 * Copy the sigframe out to the user's stack.
449 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
451 printf("process %ld has trashed its stack\n", (long)p->p_pid);
457 regs->tf_esp = (int)fp;
458 regs->tf_eip = PS_STRINGS - szosigcode;
459 regs->tf_eflags &= ~(PSL_T | PSL_D);
460 regs->tf_cs = _ucodesel;
461 regs->tf_ds = _udatasel;
462 regs->tf_es = _udatasel;
463 regs->tf_fs = _udatasel;
465 regs->tf_ss = _udatasel;
467 mtx_lock(&psp->ps_mtx);
469 #endif /* COMPAT_43 */
471 #ifdef COMPAT_FREEBSD4
473 freebsd4_sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
475 struct sigframe4 sf, *sfp;
479 struct trapframe *regs;
485 PROC_LOCK_ASSERT(p, MA_OWNED);
486 sig = ksi->ksi_signo;
488 mtx_assert(&psp->ps_mtx, MA_OWNED);
490 oonstack = sigonstack(regs->tf_esp);
492 /* Save user context. */
493 bzero(&sf, sizeof(sf));
494 sf.sf_uc.uc_sigmask = *mask;
495 sf.sf_uc.uc_stack = td->td_sigstk;
496 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
497 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
498 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
499 sf.sf_uc.uc_mcontext.mc_gs = rgs();
500 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
502 /* Allocate space for the signal handler context. */
503 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
504 SIGISMEMBER(psp->ps_sigonstack, sig)) {
505 sfp = (struct sigframe4 *)(td->td_sigstk.ss_sp +
506 td->td_sigstk.ss_size - sizeof(struct sigframe4));
507 #if defined(COMPAT_43)
508 td->td_sigstk.ss_flags |= SS_ONSTACK;
511 sfp = (struct sigframe4 *)regs->tf_esp - 1;
513 /* Translate the signal if appropriate. */
514 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
515 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
517 /* Build the argument list for the signal handler. */
519 sf.sf_ucontext = (register_t)&sfp->sf_uc;
520 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
521 /* Signal handler installed with SA_SIGINFO. */
522 sf.sf_siginfo = (register_t)&sfp->sf_si;
523 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
525 /* Fill in POSIX parts */
526 sf.sf_si.si_signo = sig;
527 sf.sf_si.si_code = ksi->ksi_code;
528 sf.sf_si.si_addr = ksi->ksi_addr;
530 /* Old FreeBSD-style arguments. */
531 sf.sf_siginfo = ksi->ksi_code;
532 sf.sf_addr = (register_t)ksi->ksi_addr;
533 sf.sf_ahu.sf_handler = catcher;
535 mtx_unlock(&psp->ps_mtx);
539 * If we're a vm86 process, we want to save the segment registers.
540 * We also change eflags to be our emulated eflags, not the actual
543 if (regs->tf_eflags & PSL_VM) {
544 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
545 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
547 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
548 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
549 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
550 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
552 if (vm86->vm86_has_vme == 0)
553 sf.sf_uc.uc_mcontext.mc_eflags =
554 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
555 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
558 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
559 * syscalls made by the signal handler. This just avoids
560 * wasting time for our lazy fixup of such faults. PSL_NT
561 * does nothing in vm86 mode, but vm86 programs can set it
562 * almost legitimately in probes for old cpu types.
564 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
568 * Copy the sigframe out to the user's stack.
570 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
572 printf("process %ld has trashed its stack\n", (long)p->p_pid);
578 regs->tf_esp = (int)sfp;
579 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
580 regs->tf_eflags &= ~(PSL_T | PSL_D);
581 regs->tf_cs = _ucodesel;
582 regs->tf_ds = _udatasel;
583 regs->tf_es = _udatasel;
584 regs->tf_fs = _udatasel;
585 regs->tf_ss = _udatasel;
587 mtx_lock(&psp->ps_mtx);
589 #endif /* COMPAT_FREEBSD4 */
592 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
594 struct sigframe sf, *sfp;
599 struct trapframe *regs;
600 struct segment_descriptor *sdp;
606 PROC_LOCK_ASSERT(p, MA_OWNED);
607 sig = ksi->ksi_signo;
609 mtx_assert(&psp->ps_mtx, MA_OWNED);
610 #ifdef COMPAT_FREEBSD4
611 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
612 freebsd4_sendsig(catcher, ksi, mask);
617 if (SIGISMEMBER(psp->ps_osigset, sig)) {
618 osendsig(catcher, ksi, mask);
623 oonstack = sigonstack(regs->tf_esp);
625 /* Save user context. */
626 bzero(&sf, sizeof(sf));
627 sf.sf_uc.uc_sigmask = *mask;
628 sf.sf_uc.uc_stack = td->td_sigstk;
629 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK)
630 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
631 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
632 sf.sf_uc.uc_mcontext.mc_gs = rgs();
633 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
634 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
635 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
638 * Unconditionally fill the fsbase and gsbase into the mcontext.
640 sdp = &td->td_pcb->pcb_fsd;
641 sf.sf_uc.uc_mcontext.mc_fsbase = sdp->sd_hibase << 24 |
643 sdp = &td->td_pcb->pcb_gsd;
644 sf.sf_uc.uc_mcontext.mc_gsbase = sdp->sd_hibase << 24 |
647 /* Allocate space for the signal handler context. */
648 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
649 SIGISMEMBER(psp->ps_sigonstack, sig)) {
650 sp = td->td_sigstk.ss_sp +
651 td->td_sigstk.ss_size - sizeof(struct sigframe);
652 #if defined(COMPAT_43)
653 td->td_sigstk.ss_flags |= SS_ONSTACK;
656 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
657 /* Align to 16 bytes. */
658 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
660 /* Translate the signal if appropriate. */
661 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
662 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
664 /* Build the argument list for the signal handler. */
666 sf.sf_ucontext = (register_t)&sfp->sf_uc;
667 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
668 /* Signal handler installed with SA_SIGINFO. */
669 sf.sf_siginfo = (register_t)&sfp->sf_si;
670 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
672 /* Fill in POSIX parts */
673 sf.sf_si = ksi->ksi_info;
674 sf.sf_si.si_signo = sig; /* maybe a translated signal */
676 /* Old FreeBSD-style arguments. */
677 sf.sf_siginfo = ksi->ksi_code;
678 sf.sf_addr = (register_t)ksi->ksi_addr;
679 sf.sf_ahu.sf_handler = catcher;
681 mtx_unlock(&psp->ps_mtx);
685 * If we're a vm86 process, we want to save the segment registers.
686 * We also change eflags to be our emulated eflags, not the actual
689 if (regs->tf_eflags & PSL_VM) {
690 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
691 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
693 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
694 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
695 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
696 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
698 if (vm86->vm86_has_vme == 0)
699 sf.sf_uc.uc_mcontext.mc_eflags =
700 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
701 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
704 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
705 * syscalls made by the signal handler. This just avoids
706 * wasting time for our lazy fixup of such faults. PSL_NT
707 * does nothing in vm86 mode, but vm86 programs can set it
708 * almost legitimately in probes for old cpu types.
710 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
714 * Copy the sigframe out to the user's stack.
716 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
718 printf("process %ld has trashed its stack\n", (long)p->p_pid);
724 regs->tf_esp = (int)sfp;
725 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
726 regs->tf_eflags &= ~(PSL_T | PSL_D);
727 regs->tf_cs = _ucodesel;
728 regs->tf_ds = _udatasel;
729 regs->tf_es = _udatasel;
730 regs->tf_fs = _udatasel;
731 regs->tf_ss = _udatasel;
733 mtx_lock(&psp->ps_mtx);
737 * System call to cleanup state after a signal
738 * has been taken. Reset signal mask and
739 * stack state from context left by sendsig (above).
740 * Return to previous pc and psl as specified by
741 * context left by sendsig. Check carefully to
742 * make sure that the user has not modified the
743 * state to gain improper privileges.
751 struct osigreturn_args /* {
752 struct osigcontext *sigcntxp;
755 struct osigcontext sc;
756 struct trapframe *regs;
757 struct osigcontext *scp;
762 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
767 if (eflags & PSL_VM) {
768 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
769 struct vm86_kernel *vm86;
772 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
773 * set up the vm86 area, and we can't enter vm86 mode.
775 if (td->td_pcb->pcb_ext == 0)
777 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
778 if (vm86->vm86_inited == 0)
781 /* Go back to user mode if both flags are set. */
782 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
783 ksiginfo_init_trap(&ksi);
784 ksi.ksi_signo = SIGBUS;
785 ksi.ksi_code = BUS_OBJERR;
786 ksi.ksi_addr = (void *)regs->tf_eip;
787 trapsignal(td, &ksi);
790 if (vm86->vm86_has_vme) {
791 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
792 (eflags & VME_USERCHANGE) | PSL_VM;
794 vm86->vm86_eflags = eflags; /* save VIF, VIP */
795 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
796 (eflags & VM_USERCHANGE) | PSL_VM;
798 tf->tf_vm86_ds = scp->sc_ds;
799 tf->tf_vm86_es = scp->sc_es;
800 tf->tf_vm86_fs = scp->sc_fs;
801 tf->tf_vm86_gs = scp->sc_gs;
802 tf->tf_ds = _udatasel;
803 tf->tf_es = _udatasel;
804 tf->tf_fs = _udatasel;
807 * Don't allow users to change privileged or reserved flags.
810 * XXX do allow users to change the privileged flag PSL_RF.
811 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
812 * should sometimes set it there too. tf_eflags is kept in
813 * the signal context during signal handling and there is no
814 * other place to remember it, so the PSL_RF bit may be
815 * corrupted by the signal handler without us knowing.
816 * Corruption of the PSL_RF bit at worst causes one more or
817 * one less debugger trap, so allowing it is fairly harmless.
819 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
824 * Don't allow users to load a valid privileged %cs. Let the
825 * hardware check for invalid selectors, excess privilege in
826 * other selectors, invalid %eip's and invalid %esp's.
828 if (!CS_SECURE(scp->sc_cs)) {
829 ksiginfo_init_trap(&ksi);
830 ksi.ksi_signo = SIGBUS;
831 ksi.ksi_code = BUS_OBJERR;
832 ksi.ksi_trapno = T_PROTFLT;
833 ksi.ksi_addr = (void *)regs->tf_eip;
834 trapsignal(td, &ksi);
837 regs->tf_ds = scp->sc_ds;
838 regs->tf_es = scp->sc_es;
839 regs->tf_fs = scp->sc_fs;
842 /* Restore remaining registers. */
843 regs->tf_eax = scp->sc_eax;
844 regs->tf_ebx = scp->sc_ebx;
845 regs->tf_ecx = scp->sc_ecx;
846 regs->tf_edx = scp->sc_edx;
847 regs->tf_esi = scp->sc_esi;
848 regs->tf_edi = scp->sc_edi;
849 regs->tf_cs = scp->sc_cs;
850 regs->tf_ss = scp->sc_ss;
851 regs->tf_isp = scp->sc_isp;
852 regs->tf_ebp = scp->sc_fp;
853 regs->tf_esp = scp->sc_sp;
854 regs->tf_eip = scp->sc_pc;
855 regs->tf_eflags = eflags;
857 #if defined(COMPAT_43)
858 if (scp->sc_onstack & 1)
859 td->td_sigstk.ss_flags |= SS_ONSTACK;
861 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
863 kern_sigprocmask(td, SIG_SETMASK, (sigset_t *)&scp->sc_mask, NULL,
865 return (EJUSTRETURN);
867 #endif /* COMPAT_43 */
869 #ifdef COMPAT_FREEBSD4
874 freebsd4_sigreturn(td, uap)
876 struct freebsd4_sigreturn_args /* {
877 const ucontext4 *sigcntxp;
881 struct trapframe *regs;
882 struct ucontext4 *ucp;
883 int cs, eflags, error;
886 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
891 eflags = ucp->uc_mcontext.mc_eflags;
892 if (eflags & PSL_VM) {
893 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
894 struct vm86_kernel *vm86;
897 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
898 * set up the vm86 area, and we can't enter vm86 mode.
900 if (td->td_pcb->pcb_ext == 0)
902 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
903 if (vm86->vm86_inited == 0)
906 /* Go back to user mode if both flags are set. */
907 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
908 ksiginfo_init_trap(&ksi);
909 ksi.ksi_signo = SIGBUS;
910 ksi.ksi_code = BUS_OBJERR;
911 ksi.ksi_addr = (void *)regs->tf_eip;
912 trapsignal(td, &ksi);
914 if (vm86->vm86_has_vme) {
915 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
916 (eflags & VME_USERCHANGE) | PSL_VM;
918 vm86->vm86_eflags = eflags; /* save VIF, VIP */
919 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
920 (eflags & VM_USERCHANGE) | PSL_VM;
922 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
923 tf->tf_eflags = eflags;
924 tf->tf_vm86_ds = tf->tf_ds;
925 tf->tf_vm86_es = tf->tf_es;
926 tf->tf_vm86_fs = tf->tf_fs;
927 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
928 tf->tf_ds = _udatasel;
929 tf->tf_es = _udatasel;
930 tf->tf_fs = _udatasel;
933 * Don't allow users to change privileged or reserved flags.
936 * XXX do allow users to change the privileged flag PSL_RF.
937 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
938 * should sometimes set it there too. tf_eflags is kept in
939 * the signal context during signal handling and there is no
940 * other place to remember it, so the PSL_RF bit may be
941 * corrupted by the signal handler without us knowing.
942 * Corruption of the PSL_RF bit at worst causes one more or
943 * one less debugger trap, so allowing it is fairly harmless.
945 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
946 uprintf("pid %d (%s): freebsd4_sigreturn eflags = 0x%x\n",
947 td->td_proc->p_pid, td->td_name, eflags);
952 * Don't allow users to load a valid privileged %cs. Let the
953 * hardware check for invalid selectors, excess privilege in
954 * other selectors, invalid %eip's and invalid %esp's.
956 cs = ucp->uc_mcontext.mc_cs;
957 if (!CS_SECURE(cs)) {
958 uprintf("pid %d (%s): freebsd4_sigreturn cs = 0x%x\n",
959 td->td_proc->p_pid, td->td_name, cs);
960 ksiginfo_init_trap(&ksi);
961 ksi.ksi_signo = SIGBUS;
962 ksi.ksi_code = BUS_OBJERR;
963 ksi.ksi_trapno = T_PROTFLT;
964 ksi.ksi_addr = (void *)regs->tf_eip;
965 trapsignal(td, &ksi);
969 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
972 #if defined(COMPAT_43)
973 if (ucp->uc_mcontext.mc_onstack & 1)
974 td->td_sigstk.ss_flags |= SS_ONSTACK;
976 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
978 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
979 return (EJUSTRETURN);
981 #endif /* COMPAT_FREEBSD4 */
989 struct sigreturn_args /* {
990 const struct __ucontext *sigcntxp;
994 struct trapframe *regs;
996 int cs, eflags, error, ret;
999 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
1003 regs = td->td_frame;
1004 eflags = ucp->uc_mcontext.mc_eflags;
1005 if (eflags & PSL_VM) {
1006 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
1007 struct vm86_kernel *vm86;
1010 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
1011 * set up the vm86 area, and we can't enter vm86 mode.
1013 if (td->td_pcb->pcb_ext == 0)
1015 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
1016 if (vm86->vm86_inited == 0)
1019 /* Go back to user mode if both flags are set. */
1020 if ((eflags & PSL_VIP) && (eflags & PSL_VIF)) {
1021 ksiginfo_init_trap(&ksi);
1022 ksi.ksi_signo = SIGBUS;
1023 ksi.ksi_code = BUS_OBJERR;
1024 ksi.ksi_addr = (void *)regs->tf_eip;
1025 trapsignal(td, &ksi);
1028 if (vm86->vm86_has_vme) {
1029 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
1030 (eflags & VME_USERCHANGE) | PSL_VM;
1032 vm86->vm86_eflags = eflags; /* save VIF, VIP */
1033 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
1034 (eflags & VM_USERCHANGE) | PSL_VM;
1036 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
1037 tf->tf_eflags = eflags;
1038 tf->tf_vm86_ds = tf->tf_ds;
1039 tf->tf_vm86_es = tf->tf_es;
1040 tf->tf_vm86_fs = tf->tf_fs;
1041 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
1042 tf->tf_ds = _udatasel;
1043 tf->tf_es = _udatasel;
1044 tf->tf_fs = _udatasel;
1047 * Don't allow users to change privileged or reserved flags.
1050 * XXX do allow users to change the privileged flag PSL_RF.
1051 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
1052 * should sometimes set it there too. tf_eflags is kept in
1053 * the signal context during signal handling and there is no
1054 * other place to remember it, so the PSL_RF bit may be
1055 * corrupted by the signal handler without us knowing.
1056 * Corruption of the PSL_RF bit at worst causes one more or
1057 * one less debugger trap, so allowing it is fairly harmless.
1059 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
1060 uprintf("pid %d (%s): sigreturn eflags = 0x%x\n",
1061 td->td_proc->p_pid, td->td_name, eflags);
1066 * Don't allow users to load a valid privileged %cs. Let the
1067 * hardware check for invalid selectors, excess privilege in
1068 * other selectors, invalid %eip's and invalid %esp's.
1070 cs = ucp->uc_mcontext.mc_cs;
1071 if (!CS_SECURE(cs)) {
1072 uprintf("pid %d (%s): sigreturn cs = 0x%x\n",
1073 td->td_proc->p_pid, td->td_name, cs);
1074 ksiginfo_init_trap(&ksi);
1075 ksi.ksi_signo = SIGBUS;
1076 ksi.ksi_code = BUS_OBJERR;
1077 ksi.ksi_trapno = T_PROTFLT;
1078 ksi.ksi_addr = (void *)regs->tf_eip;
1079 trapsignal(td, &ksi);
1083 ret = set_fpcontext(td, &ucp->uc_mcontext);
1086 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1089 #if defined(COMPAT_43)
1090 if (ucp->uc_mcontext.mc_onstack & 1)
1091 td->td_sigstk.ss_flags |= SS_ONSTACK;
1093 td->td_sigstk.ss_flags &= ~SS_ONSTACK;
1096 kern_sigprocmask(td, SIG_SETMASK, &ucp->uc_sigmask, NULL, 0);
1097 return (EJUSTRETURN);
1101 * Machine dependent boot() routine
1103 * I haven't seen anything to put here yet
1104 * Possibly some stuff might be grafted back here from boot()
1112 * Flush the D-cache for non-DMA I/O so that the I-cache can
1113 * be made coherent later.
1116 cpu_flush_dcache(void *ptr, size_t len)
1118 /* Not applicable */
1121 /* Get current clock frequency for the given cpu id. */
1123 cpu_est_clockrate(int cpu_id, uint64_t *rate)
1126 uint64_t tsc1, tsc2;
1128 if (pcpu_find(cpu_id) == NULL || rate == NULL)
1131 return (EOPNOTSUPP);
1133 /* If we're booting, trust the rate calibrated moments ago. */
1140 /* Schedule ourselves on the indicated cpu. */
1141 thread_lock(curthread);
1142 sched_bind(curthread, cpu_id);
1143 thread_unlock(curthread);
1146 /* Calibrate by measuring a short delay. */
1147 reg = intr_disable();
1154 thread_lock(curthread);
1155 sched_unbind(curthread);
1156 thread_unlock(curthread);
1160 * Calculate the difference in readings, convert to Mhz, and
1161 * subtract 0.5% of the total. Empirical testing has shown that
1162 * overhead in DELAY() works out to approximately this value.
1165 *rate = tsc2 * 1000 - tsc2 * 5;
1170 void (*cpu_idle_hook)(void) = NULL; /* ACPI idle hook. */
1177 HYPERVISOR_shutdown(SHUTDOWN_poweroff);
1180 int scheduler_running;
1183 cpu_idle_hlt(int busy)
1186 scheduler_running = 1;
1193 * Shutdown the CPU as much as possible
1203 cpu_idle_hlt(int busy)
1206 * we must absolutely guarentee that hlt is the next instruction
1207 * after sti or we introduce a timing window.
1210 if (sched_runnable())
1213 __asm __volatile("sti; hlt");
1218 cpu_idle_acpi(int busy)
1221 if (sched_runnable())
1223 else if (cpu_idle_hook)
1226 __asm __volatile("sti; hlt");
1229 static int cpu_ident_amdc1e = 0;
1232 cpu_probe_amdc1e(void)
1238 * Forget it, if we're not using local APIC timer.
1240 if (resource_disabled("apic", 0) ||
1241 (resource_int_value("apic", 0, "clock", &i) == 0 && i == 0))
1245 * Detect the presence of C1E capability mostly on latest
1246 * dual-cores (or future) k8 family.
1248 if (cpu_vendor_id == CPU_VENDOR_AMD &&
1249 (cpu_id & 0x00000f00) == 0x00000f00 &&
1250 (cpu_id & 0x0fff0000) >= 0x00040000) {
1251 cpu_ident_amdc1e = 1;
1259 * C1E renders the local APIC timer dead, so we disable it by
1260 * reading the Interrupt Pending Message register and clearing
1261 * both C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27).
1264 * "BIOS and Kernel Developer's Guide for AMD NPT Family 0Fh Processors"
1265 * #32559 revision 3.00+
1267 #define MSR_AMDK8_IPM 0xc0010055
1268 #define AMDK8_SMIONCMPHALT (1ULL << 27)
1269 #define AMDK8_C1EONCMPHALT (1ULL << 28)
1270 #define AMDK8_CMPHALT (AMDK8_SMIONCMPHALT | AMDK8_C1EONCMPHALT)
1273 cpu_idle_amdc1e(int busy)
1277 if (sched_runnable())
1282 msr = rdmsr(MSR_AMDK8_IPM);
1283 if (msr & AMDK8_CMPHALT)
1284 wrmsr(MSR_AMDK8_IPM, msr & ~AMDK8_CMPHALT);
1289 __asm __volatile("sti; hlt");
1294 cpu_idle_spin(int busy)
1300 void (*cpu_idle_fn)(int) = cpu_idle_hlt;
1302 void (*cpu_idle_fn)(int) = cpu_idle_acpi;
1308 #if defined(SMP) && !defined(XEN)
1309 if (mp_grab_cpu_hlt())
1316 * mwait cpu power states. Lower 4 bits are sub-states.
1318 #define MWAIT_C0 0xf0
1319 #define MWAIT_C1 0x00
1320 #define MWAIT_C2 0x10
1321 #define MWAIT_C3 0x20
1322 #define MWAIT_C4 0x30
1324 #define MWAIT_DISABLED 0x0
1325 #define MWAIT_WOKEN 0x1
1326 #define MWAIT_WAITING 0x2
1329 cpu_idle_mwait(int busy)
1333 mwait = (int *)PCPU_PTR(monitorbuf);
1334 *mwait = MWAIT_WAITING;
1335 if (sched_runnable())
1337 cpu_monitor(mwait, 0, 0);
1338 if (*mwait == MWAIT_WAITING)
1339 cpu_mwait(0, MWAIT_C1);
1343 cpu_idle_mwait_hlt(int busy)
1347 mwait = (int *)PCPU_PTR(monitorbuf);
1349 *mwait = MWAIT_DISABLED;
1353 *mwait = MWAIT_WAITING;
1354 if (sched_runnable())
1356 cpu_monitor(mwait, 0, 0);
1357 if (*mwait == MWAIT_WAITING)
1358 cpu_mwait(0, MWAIT_C1);
1362 cpu_idle_wakeup(int cpu)
1367 if (cpu_idle_fn == cpu_idle_spin)
1369 if (cpu_idle_fn != cpu_idle_mwait && cpu_idle_fn != cpu_idle_mwait_hlt)
1371 pcpu = pcpu_find(cpu);
1372 mwait = (int *)pcpu->pc_monitorbuf;
1374 * This doesn't need to be atomic since missing the race will
1375 * simply result in unnecessary IPIs.
1377 if (cpu_idle_fn == cpu_idle_mwait_hlt && *mwait == MWAIT_DISABLED)
1379 *mwait = MWAIT_WOKEN;
1385 * Ordered by speed/power consumption.
1391 { cpu_idle_spin, "spin" },
1392 { cpu_idle_mwait, "mwait" },
1393 { cpu_idle_mwait_hlt, "mwait_hlt" },
1394 { cpu_idle_amdc1e, "amdc1e" },
1395 { cpu_idle_hlt, "hlt" },
1396 { cpu_idle_acpi, "acpi" },
1401 idle_sysctl_available(SYSCTL_HANDLER_ARGS)
1407 avail = malloc(256, M_TEMP, M_WAITOK);
1409 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1410 if (strstr(idle_tbl[i].id_name, "mwait") &&
1411 (cpu_feature2 & CPUID2_MON) == 0)
1413 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 &&
1414 cpu_ident_amdc1e == 0)
1416 p += sprintf(p, "%s, ", idle_tbl[i].id_name);
1418 error = sysctl_handle_string(oidp, avail, 0, req);
1419 free(avail, M_TEMP);
1424 idle_sysctl(SYSCTL_HANDLER_ARGS)
1432 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1433 if (idle_tbl[i].id_fn == cpu_idle_fn) {
1434 p = idle_tbl[i].id_name;
1438 strncpy(buf, p, sizeof(buf));
1439 error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
1440 if (error != 0 || req->newptr == NULL)
1442 for (i = 0; idle_tbl[i].id_name != NULL; i++) {
1443 if (strstr(idle_tbl[i].id_name, "mwait") &&
1444 (cpu_feature2 & CPUID2_MON) == 0)
1446 if (strcmp(idle_tbl[i].id_name, "amdc1e") == 0 &&
1447 cpu_ident_amdc1e == 0)
1449 if (strcmp(idle_tbl[i].id_name, buf))
1451 cpu_idle_fn = idle_tbl[i].id_fn;
1457 SYSCTL_PROC(_machdep, OID_AUTO, idle_available, CTLTYPE_STRING | CTLFLAG_RD,
1458 0, 0, idle_sysctl_available, "A", "list of available idle functions");
1460 SYSCTL_PROC(_machdep, OID_AUTO, idle, CTLTYPE_STRING | CTLFLAG_RW, 0, 0,
1461 idle_sysctl, "A", "currently selected idle function");
1464 * Reset registers to default values on exec.
1467 exec_setregs(td, entry, stack, ps_strings)
1473 struct trapframe *regs = td->td_frame;
1474 struct pcb *pcb = td->td_pcb;
1476 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1477 pcb->pcb_gs = _udatasel;
1480 mtx_lock_spin(&dt_lock);
1481 if (td->td_proc->p_md.md_ldt)
1484 mtx_unlock_spin(&dt_lock);
1486 bzero((char *)regs, sizeof(struct trapframe));
1487 regs->tf_eip = entry;
1488 regs->tf_esp = stack;
1489 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1490 regs->tf_ss = _udatasel;
1491 regs->tf_ds = _udatasel;
1492 regs->tf_es = _udatasel;
1493 regs->tf_fs = _udatasel;
1494 regs->tf_cs = _ucodesel;
1496 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1497 regs->tf_ebx = ps_strings;
1500 * Reset the hardware debug registers if they were in use.
1501 * They won't have any meaning for the newly exec'd process.
1503 if (pcb->pcb_flags & PCB_DBREGS) {
1510 if (pcb == PCPU_GET(curpcb)) {
1512 * Clear the debug registers on the running
1513 * CPU, otherwise they will end up affecting
1514 * the next process we switch to.
1518 pcb->pcb_flags &= ~PCB_DBREGS;
1522 * Initialize the math emulator (if any) for the current process.
1523 * Actually, just clear the bit that says that the emulator has
1524 * been initialized. Initialization is delayed until the process
1525 * traps to the emulator (if it is done at all) mainly because
1526 * emulators don't provide an entry point for initialization.
1528 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1529 pcb->pcb_initial_npxcw = __INITIAL_NPXCW__;
1532 * Drop the FP state if we hold it, so that the process gets a
1533 * clean FP state if it uses the FPU again.
1538 * XXX - Linux emulator
1539 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1542 td->td_retval[1] = 0;
1553 * CR0_MP, CR0_NE and CR0_TS are set for NPX (FPU) support:
1555 * Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
1556 * instructions. We must set the CR0_MP bit and use the CR0_TS
1557 * bit to control the trap, because setting the CR0_EM bit does
1558 * not cause WAIT instructions to trap. It's important to trap
1559 * WAIT instructions - otherwise the "wait" variants of no-wait
1560 * control instructions would degenerate to the "no-wait" variants
1561 * after FP context switches but work correctly otherwise. It's
1562 * particularly important to trap WAITs when there is no NPX -
1563 * otherwise the "wait" variants would always degenerate.
1565 * Try setting CR0_NE to get correct error reporting on 486DX's.
1566 * Setting it should fail or do nothing on lesser processors.
1568 cr0 |= CR0_MP | CR0_NE | CR0_TS | CR0_WP | CR0_AM;
1573 u_long bootdev; /* not a struct cdev *- encoding is different */
1574 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1575 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in struct cdev *format)");
1578 * Initialize 386 and configure to run kernel
1582 * Initialize segments & interrupt table
1588 union descriptor *gdt;
1589 union descriptor *ldt;
1591 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1592 union descriptor ldt[NLDT]; /* local descriptor table */
1594 static struct gate_descriptor idt0[NIDT];
1595 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1596 struct region_descriptor r_gdt, r_idt; /* table descriptors */
1597 struct mtx dt_lock; /* lock for GDT and LDT */
1599 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1600 extern int has_f00f_bug;
1603 static struct i386tss dblfault_tss;
1604 static char dblfault_stack[PAGE_SIZE];
1606 extern vm_offset_t proc0kstack;
1610 * software prototypes -- in more palatable form.
1612 * GCODE_SEL through GUDATA_SEL must be in this order for syscall/sysret
1613 * GUFS_SEL and GUGS_SEL must be in this order (swtch.s knows it)
1615 struct soft_segment_descriptor gdt_segs[] = {
1616 /* GNULL_SEL 0 Null Descriptor */
1622 .ssd_xx = 0, .ssd_xx1 = 0,
1625 /* GPRIV_SEL 1 SMP Per-Processor Private Data Descriptor */
1627 .ssd_limit = 0xfffff,
1628 .ssd_type = SDT_MEMRWA,
1631 .ssd_xx = 0, .ssd_xx1 = 0,
1634 /* GUFS_SEL 2 %fs Descriptor for user */
1636 .ssd_limit = 0xfffff,
1637 .ssd_type = SDT_MEMRWA,
1640 .ssd_xx = 0, .ssd_xx1 = 0,
1643 /* GUGS_SEL 3 %gs Descriptor for user */
1645 .ssd_limit = 0xfffff,
1646 .ssd_type = SDT_MEMRWA,
1649 .ssd_xx = 0, .ssd_xx1 = 0,
1652 /* GCODE_SEL 4 Code Descriptor for kernel */
1654 .ssd_limit = 0xfffff,
1655 .ssd_type = SDT_MEMERA,
1658 .ssd_xx = 0, .ssd_xx1 = 0,
1661 /* GDATA_SEL 5 Data Descriptor for kernel */
1663 .ssd_limit = 0xfffff,
1664 .ssd_type = SDT_MEMRWA,
1667 .ssd_xx = 0, .ssd_xx1 = 0,
1670 /* GUCODE_SEL 6 Code Descriptor for user */
1672 .ssd_limit = 0xfffff,
1673 .ssd_type = SDT_MEMERA,
1676 .ssd_xx = 0, .ssd_xx1 = 0,
1679 /* GUDATA_SEL 7 Data Descriptor for user */
1681 .ssd_limit = 0xfffff,
1682 .ssd_type = SDT_MEMRWA,
1685 .ssd_xx = 0, .ssd_xx1 = 0,
1688 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1689 { .ssd_base = 0x400,
1690 .ssd_limit = 0xfffff,
1691 .ssd_type = SDT_MEMRWA,
1694 .ssd_xx = 0, .ssd_xx1 = 0,
1698 /* GPROC0_SEL 9 Proc 0 Tss Descriptor */
1701 .ssd_limit = sizeof(struct i386tss)-1,
1702 .ssd_type = SDT_SYS386TSS,
1705 .ssd_xx = 0, .ssd_xx1 = 0,
1708 /* GLDT_SEL 10 LDT Descriptor */
1709 { .ssd_base = (int) ldt,
1710 .ssd_limit = sizeof(ldt)-1,
1711 .ssd_type = SDT_SYSLDT,
1714 .ssd_xx = 0, .ssd_xx1 = 0,
1717 /* GUSERLDT_SEL 11 User LDT Descriptor per process */
1718 { .ssd_base = (int) ldt,
1719 .ssd_limit = (512 * sizeof(union descriptor)-1),
1720 .ssd_type = SDT_SYSLDT,
1723 .ssd_xx = 0, .ssd_xx1 = 0,
1726 /* GPANIC_SEL 12 Panic Tss Descriptor */
1727 { .ssd_base = (int) &dblfault_tss,
1728 .ssd_limit = sizeof(struct i386tss)-1,
1729 .ssd_type = SDT_SYS386TSS,
1732 .ssd_xx = 0, .ssd_xx1 = 0,
1735 /* GBIOSCODE32_SEL 13 BIOS 32-bit interface (32bit Code) */
1737 .ssd_limit = 0xfffff,
1738 .ssd_type = SDT_MEMERA,
1741 .ssd_xx = 0, .ssd_xx1 = 0,
1744 /* GBIOSCODE16_SEL 14 BIOS 32-bit interface (16bit Code) */
1746 .ssd_limit = 0xfffff,
1747 .ssd_type = SDT_MEMERA,
1750 .ssd_xx = 0, .ssd_xx1 = 0,
1753 /* GBIOSDATA_SEL 15 BIOS 32-bit interface (Data) */
1755 .ssd_limit = 0xfffff,
1756 .ssd_type = SDT_MEMRWA,
1759 .ssd_xx = 0, .ssd_xx1 = 0,
1762 /* GBIOSUTIL_SEL 16 BIOS 16-bit interface (Utility) */
1764 .ssd_limit = 0xfffff,
1765 .ssd_type = SDT_MEMRWA,
1768 .ssd_xx = 0, .ssd_xx1 = 0,
1771 /* GBIOSARGS_SEL 17 BIOS 16-bit interface (Arguments) */
1773 .ssd_limit = 0xfffff,
1774 .ssd_type = SDT_MEMRWA,
1777 .ssd_xx = 0, .ssd_xx1 = 0,
1780 /* GNDIS_SEL 18 NDIS Descriptor */
1786 .ssd_xx = 0, .ssd_xx1 = 0,
1792 static struct soft_segment_descriptor ldt_segs[] = {
1793 /* Null Descriptor - overwritten by call gate */
1799 .ssd_xx = 0, .ssd_xx1 = 0,
1802 /* Null Descriptor - overwritten by call gate */
1808 .ssd_xx = 0, .ssd_xx1 = 0,
1811 /* Null Descriptor - overwritten by call gate */
1817 .ssd_xx = 0, .ssd_xx1 = 0,
1820 /* Code Descriptor for user */
1822 .ssd_limit = 0xfffff,
1823 .ssd_type = SDT_MEMERA,
1826 .ssd_xx = 0, .ssd_xx1 = 0,
1829 /* Null Descriptor - overwritten by call gate */
1835 .ssd_xx = 0, .ssd_xx1 = 0,
1838 /* Data Descriptor for user */
1840 .ssd_limit = 0xfffff,
1841 .ssd_type = SDT_MEMRWA,
1844 .ssd_xx = 0, .ssd_xx1 = 0,
1850 setidt(idx, func, typ, dpl, selec)
1857 struct gate_descriptor *ip;
1860 ip->gd_looffset = (int)func;
1861 ip->gd_selector = selec;
1867 ip->gd_hioffset = ((int)func)>>16 ;
1871 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1872 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1873 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1874 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1875 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1879 * Display the index and function name of any IDT entries that don't use
1880 * the default 'rsvd' entry point.
1882 DB_SHOW_COMMAND(idt, db_show_idt)
1884 struct gate_descriptor *ip;
1889 for (idx = 0; idx < NIDT && !db_pager_quit; idx++) {
1890 func = (ip->gd_hioffset << 16 | ip->gd_looffset);
1891 if (func != (uintptr_t)&IDTVEC(rsvd)) {
1892 db_printf("%3d\t", idx);
1893 db_printsym(func, DB_STGY_PROC);
1900 /* Show privileged registers. */
1901 DB_SHOW_COMMAND(sysregs, db_show_sysregs)
1903 uint64_t idtr, gdtr;
1906 db_printf("idtr\t0x%08x/%04x\n",
1907 (u_int)(idtr >> 16), (u_int)idtr & 0xffff);
1909 db_printf("gdtr\t0x%08x/%04x\n",
1910 (u_int)(gdtr >> 16), (u_int)gdtr & 0xffff);
1911 db_printf("ldtr\t0x%04x\n", rldt());
1912 db_printf("tr\t0x%04x\n", rtr());
1913 db_printf("cr0\t0x%08x\n", rcr0());
1914 db_printf("cr2\t0x%08x\n", rcr2());
1915 db_printf("cr3\t0x%08x\n", rcr3());
1916 db_printf("cr4\t0x%08x\n", rcr4());
1922 struct segment_descriptor *sd;
1923 struct soft_segment_descriptor *ssd;
1925 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1926 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1927 ssd->ssd_type = sd->sd_type;
1928 ssd->ssd_dpl = sd->sd_dpl;
1929 ssd->ssd_p = sd->sd_p;
1930 ssd->ssd_def32 = sd->sd_def32;
1931 ssd->ssd_gran = sd->sd_gran;
1936 add_smap_entry(struct bios_smap *smap, vm_paddr_t *physmap, int *physmap_idxp)
1938 int i, insert_idx, physmap_idx;
1940 physmap_idx = *physmap_idxp;
1942 if (boothowto & RB_VERBOSE)
1943 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1944 smap->type, smap->base, smap->length);
1946 if (smap->type != SMAP_TYPE_MEMORY)
1949 if (smap->length == 0)
1953 if (smap->base > 0xffffffff) {
1954 printf("%uK of memory above 4GB ignored\n",
1955 (u_int)(smap->length / 1024));
1961 * Find insertion point while checking for overlap. Start off by
1962 * assuming the new entry will be added to the end.
1964 insert_idx = physmap_idx + 2;
1965 for (i = 0; i <= physmap_idx; i += 2) {
1966 if (smap->base < physmap[i + 1]) {
1967 if (smap->base + smap->length <= physmap[i]) {
1971 if (boothowto & RB_VERBOSE)
1973 "Overlapping memory regions, ignoring second region\n");
1978 /* See if we can prepend to the next entry. */
1979 if (insert_idx <= physmap_idx &&
1980 smap->base + smap->length == physmap[insert_idx]) {
1981 physmap[insert_idx] = smap->base;
1985 /* See if we can append to the previous entry. */
1986 if (insert_idx > 0 && smap->base == physmap[insert_idx - 1]) {
1987 physmap[insert_idx - 1] += smap->length;
1992 *physmap_idxp = physmap_idx;
1993 if (physmap_idx == PHYSMAP_SIZE) {
1995 "Too many segments in the physical address map, giving up\n");
2000 * Move the last 'N' entries down to make room for the new
2003 for (i = physmap_idx; i > insert_idx; i -= 2) {
2004 physmap[i] = physmap[i - 2];
2005 physmap[i + 1] = physmap[i - 1];
2008 /* Insert the new entry. */
2009 physmap[insert_idx] = smap->base;
2010 physmap[insert_idx + 1] = smap->base + smap->length;
2021 if (basemem > 640) {
2022 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
2028 * XXX if biosbasemem is now < 640, there is a `hole'
2029 * between the end of base memory and the start of
2030 * ISA memory. The hole may be empty or it may
2031 * contain BIOS code or data. Map it read/write so
2032 * that the BIOS can write to it. (Memory from 0 to
2033 * the physical end of the kernel is mapped read-only
2034 * to begin with and then parts of it are remapped.
2035 * The parts that aren't remapped form holes that
2036 * remain read-only and are unused by the kernel.
2037 * The base memory area is below the physical end of
2038 * the kernel and right now forms a read-only hole.
2039 * The part of it from PAGE_SIZE to
2040 * (trunc_page(biosbasemem * 1024) - 1) will be
2041 * remapped and used by the kernel later.)
2043 * This code is similar to the code used in
2044 * pmap_mapdev, but since no memory needs to be
2045 * allocated we simply change the mapping.
2047 for (pa = trunc_page(basemem * 1024);
2048 pa < ISA_HOLE_START; pa += PAGE_SIZE)
2049 pmap_kenter(KERNBASE + pa, pa);
2052 * Map pages between basemem and ISA_HOLE_START, if any, r/w into
2053 * the vm86 page table so that vm86 can scribble on them using
2054 * the vm86 map too. XXX: why 2 ways for this and only 1 way for
2055 * page 0, at least as initialized here?
2057 pte = (pt_entry_t *)vm86paddr;
2058 for (i = basemem / 4; i < 160; i++)
2059 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
2064 * Populate the (physmap) array with base/bound pairs describing the
2065 * available physical memory in the system, then test this memory and
2066 * build the phys_avail array describing the actually-available memory.
2068 * If we cannot accurately determine the physical memory map, then use
2069 * value from the 0xE801 call, and failing that, the RTC.
2071 * Total memory size may be set by the kernel environment variable
2072 * hw.physmem or the compile-time define MAXMEM.
2074 * XXX first should be vm_paddr_t.
2077 getmemsize(int first)
2079 int has_smap, off, physmap_idx, pa_indx, da_indx;
2080 u_long physmem_tunable;
2081 vm_paddr_t physmap[PHYSMAP_SIZE];
2083 quad_t dcons_addr, dcons_size;
2085 int hasbrokenint12, i;
2087 struct vm86frame vmf;
2088 struct vm86context vmc;
2090 struct bios_smap *smap, *smapbase, *smapend;
2097 Maxmem = xen_start_info->nr_pages - init_first;
2100 physmap[0] = init_first << PAGE_SHIFT;
2101 physmap[1] = ptoa(Maxmem) - round_page(MSGBUF_SIZE);
2105 if (arch_i386_is_xbox) {
2107 * We queried the memory size before, so chop off 4MB for
2108 * the framebuffer and inform the OS of this.
2111 physmap[1] = (arch_i386_xbox_memsize * 1024 * 1024) - XBOX_FB_SIZE;
2116 bzero(&vmf, sizeof(vmf));
2117 bzero(physmap, sizeof(physmap));
2121 * Check if the loader supplied an SMAP memory map. If so,
2122 * use that and do not make any VM86 calls.
2126 kmdp = preload_search_by_type("elf kernel");
2128 kmdp = preload_search_by_type("elf32 kernel");
2130 smapbase = (struct bios_smap *)preload_search_info(kmdp,
2131 MODINFO_METADATA | MODINFOMD_SMAP);
2132 if (smapbase != NULL) {
2134 * subr_module.c says:
2135 * "Consumer may safely assume that size value precedes data."
2136 * ie: an int32_t immediately precedes SMAP.
2138 smapsize = *((u_int32_t *)smapbase - 1);
2139 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
2142 for (smap = smapbase; smap < smapend; smap++)
2143 if (!add_smap_entry(smap, physmap, &physmap_idx))
2149 * Some newer BIOSes have a broken INT 12H implementation
2150 * which causes a kernel panic immediately. In this case, we
2151 * need use the SMAP to determine the base memory size.
2154 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
2155 if (hasbrokenint12 == 0) {
2156 /* Use INT12 to determine base memory size. */
2157 vm86_intcall(0x12, &vmf);
2158 basemem = vmf.vmf_ax;
2163 * Fetch the memory map with INT 15:E820. Map page 1 R/W into
2164 * the kernel page table so we can use it as a buffer. The
2165 * kernel will unmap this page later.
2167 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
2169 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
2170 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
2174 vmf.vmf_eax = 0xE820;
2175 vmf.vmf_edx = SMAP_SIG;
2176 vmf.vmf_ecx = sizeof(struct bios_smap);
2177 i = vm86_datacall(0x15, &vmf, &vmc);
2178 if (i || vmf.vmf_eax != SMAP_SIG)
2181 if (!add_smap_entry(smap, physmap, &physmap_idx))
2183 } while (vmf.vmf_ebx != 0);
2187 * If we didn't fetch the "base memory" size from INT12,
2188 * figure it out from the SMAP (or just guess).
2191 for (i = 0; i <= physmap_idx; i += 2) {
2192 if (physmap[i] == 0x00000000) {
2193 basemem = physmap[i + 1] / 1024;
2198 /* XXX: If we couldn't find basemem from SMAP, just guess. */
2204 if (physmap[1] != 0)
2208 * If we failed to find an SMAP, figure out the extended
2209 * memory size. We will then build a simple memory map with
2210 * two segments, one for "base memory" and the second for
2211 * "extended memory". Note that "extended memory" starts at a
2212 * physical address of 1MB and that both basemem and extmem
2213 * are in units of 1KB.
2215 * First, try to fetch the extended memory size via INT 15:E801.
2217 vmf.vmf_ax = 0xE801;
2218 if (vm86_intcall(0x15, &vmf) == 0) {
2219 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
2222 * If INT15:E801 fails, this is our last ditch effort
2223 * to determine the extended memory size. Currently
2224 * we prefer the RTC value over INT15:88.
2228 vm86_intcall(0x15, &vmf);
2229 extmem = vmf.vmf_ax;
2231 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
2236 * Special hack for chipsets that still remap the 384k hole when
2237 * there's 16MB of memory - this really confuses people that
2238 * are trying to use bus mastering ISA controllers with the
2239 * "16MB limit"; they only have 16MB, but the remapping puts
2240 * them beyond the limit.
2242 * If extended memory is between 15-16MB (16-17MB phys address range),
2245 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
2249 physmap[1] = basemem * 1024;
2251 physmap[physmap_idx] = 0x100000;
2252 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
2257 * Now, physmap contains a map of physical memory.
2261 /* make hole for AP bootstrap code */
2262 physmap[1] = mp_bootaddress(physmap[1]);
2266 * Maxmem isn't the "maximum memory", it's one larger than the
2267 * highest page of the physical address space. It should be
2268 * called something like "Maxphyspage". We may adjust this
2269 * based on ``hw.physmem'' and the results of the memory test.
2271 Maxmem = atop(physmap[physmap_idx + 1]);
2274 Maxmem = MAXMEM / 4;
2277 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
2278 Maxmem = atop(physmem_tunable);
2281 * If we have an SMAP, don't allow MAXMEM or hw.physmem to extend
2282 * the amount of memory in the system.
2284 if (has_smap && Maxmem > atop(physmap[physmap_idx + 1]))
2285 Maxmem = atop(physmap[physmap_idx + 1]);
2287 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
2288 (boothowto & RB_VERBOSE))
2289 printf("Physical memory use set to %ldK\n", Maxmem * 4);
2292 * If Maxmem has been increased beyond what the system has detected,
2293 * extend the last memory segment to the new limit.
2295 if (atop(physmap[physmap_idx + 1]) < Maxmem)
2296 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
2298 /* call pmap initialization to make new kernel address space */
2299 pmap_bootstrap(first);
2302 * Size up each available chunk of physical memory.
2304 physmap[0] = PAGE_SIZE; /* mask off page 0 */
2307 phys_avail[pa_indx++] = physmap[0];
2308 phys_avail[pa_indx] = physmap[0];
2309 dump_avail[da_indx] = physmap[0];
2313 * Get dcons buffer address
2315 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
2316 getenv_quad("dcons.size", &dcons_size) == 0)
2321 * physmap is in bytes, so when converting to page boundaries,
2322 * round up the start address and round down the end address.
2324 for (i = 0; i <= physmap_idx; i += 2) {
2327 end = ptoa((vm_paddr_t)Maxmem);
2328 if (physmap[i + 1] < end)
2329 end = trunc_page(physmap[i + 1]);
2330 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
2331 int tmp, page_bad, full;
2332 int *ptr = (int *)CADDR1;
2336 * block out kernel memory as not available.
2338 if (pa >= KERNLOAD && pa < first)
2342 * block out dcons buffer
2345 && pa >= trunc_page(dcons_addr)
2346 && pa < dcons_addr + dcons_size)
2352 * map page into kernel: valid, read/write,non-cacheable
2354 *pte = pa | PG_V | PG_RW | PG_N;
2359 * Test for alternating 1's and 0's
2361 *(volatile int *)ptr = 0xaaaaaaaa;
2362 if (*(volatile int *)ptr != 0xaaaaaaaa)
2365 * Test for alternating 0's and 1's
2367 *(volatile int *)ptr = 0x55555555;
2368 if (*(volatile int *)ptr != 0x55555555)
2373 *(volatile int *)ptr = 0xffffffff;
2374 if (*(volatile int *)ptr != 0xffffffff)
2379 *(volatile int *)ptr = 0x0;
2380 if (*(volatile int *)ptr != 0x0)
2383 * Restore original value.
2388 * Adjust array of valid/good pages.
2390 if (page_bad == TRUE)
2393 * If this good page is a continuation of the
2394 * previous set of good pages, then just increase
2395 * the end pointer. Otherwise start a new chunk.
2396 * Note that "end" points one higher than end,
2397 * making the range >= start and < end.
2398 * If we're also doing a speculative memory
2399 * test and we at or past the end, bump up Maxmem
2400 * so that we keep going. The first bad page
2401 * will terminate the loop.
2403 if (phys_avail[pa_indx] == pa) {
2404 phys_avail[pa_indx] += PAGE_SIZE;
2407 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
2409 "Too many holes in the physical address space, giving up\n");
2414 phys_avail[pa_indx++] = pa; /* start */
2415 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
2419 if (dump_avail[da_indx] == pa) {
2420 dump_avail[da_indx] += PAGE_SIZE;
2423 if (da_indx == DUMP_AVAIL_ARRAY_END) {
2427 dump_avail[da_indx++] = pa; /* start */
2428 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
2438 phys_avail[0] = physfree;
2439 phys_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2441 dump_avail[1] = xen_start_info->nr_pages*PAGE_SIZE;
2447 * The last chunk must contain at least one page plus the message
2448 * buffer to avoid complicating other code (message buffer address
2449 * calculation, etc.).
2451 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
2452 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
2453 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
2454 phys_avail[pa_indx--] = 0;
2455 phys_avail[pa_indx--] = 0;
2458 Maxmem = atop(phys_avail[pa_indx]);
2460 /* Trim off space for the message buffer. */
2461 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
2463 /* Map the message buffer. */
2464 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2465 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
2472 #define MTOPSIZE (1<<(14 + PAGE_SHIFT))
2478 unsigned long gdtmachpfn;
2479 int error, gsel_tss, metadata_missing, x, pa;
2481 struct callback_register event = {
2482 .type = CALLBACKTYPE_event,
2483 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)Xhypervisor_callback },
2485 struct callback_register failsafe = {
2486 .type = CALLBACKTYPE_failsafe,
2487 .address = {GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback },
2490 thread0.td_kstack = proc0kstack;
2491 thread0.td_pcb = (struct pcb *)
2492 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2495 * This may be done better later if it gets more high level
2496 * components in it. If so just link td->td_proc here.
2498 proc_linkup0(&proc0, &thread0);
2500 metadata_missing = 0;
2501 if (xen_start_info->mod_start) {
2502 preload_metadata = (caddr_t)xen_start_info->mod_start;
2503 preload_bootstrap_relocate(KERNBASE);
2505 metadata_missing = 1;
2508 kern_envp = static_env;
2509 else if ((caddr_t)xen_start_info->cmd_line)
2510 kern_envp = xen_setbootenv((caddr_t)xen_start_info->cmd_line);
2512 boothowto |= xen_boothowto(kern_envp);
2514 /* Init basic tunables, hz etc */
2518 * XEN occupies a portion of the upper virtual address space
2519 * At its base it manages an array mapping machine page frames
2520 * to physical page frames - hence we need to be able to
2521 * access 4GB - (64MB - 4MB + 64k)
2523 gdt_segs[GPRIV_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2524 gdt_segs[GUFS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2525 gdt_segs[GUGS_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2526 gdt_segs[GCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2527 gdt_segs[GDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2528 gdt_segs[GUCODE_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2529 gdt_segs[GUDATA_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2530 gdt_segs[GBIOSLOWMEM_SEL].ssd_limit = atop(HYPERVISOR_VIRT_START + MTOPSIZE);
2533 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2534 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2536 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V | PG_RW);
2537 bzero(gdt, PAGE_SIZE);
2538 for (x = 0; x < NGDT; x++)
2539 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2541 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2543 gdtmachpfn = vtomach(gdt) >> PAGE_SHIFT;
2544 PT_SET_MA(gdt, xpmap_ptom(VTOP(gdt)) | PG_V);
2545 PANIC_IF(HYPERVISOR_set_gdt(&gdtmachpfn, 512) != 0);
2549 if ((error = HYPERVISOR_set_trap_table(trap_table)) != 0) {
2550 panic("set_trap_table failed - error %d\n", error);
2553 error = HYPERVISOR_callback_op(CALLBACKOP_register, &event);
2555 error = HYPERVISOR_callback_op(CALLBACKOP_register, &failsafe);
2556 #if CONFIG_XEN_COMPAT <= 0x030002
2557 if (error == -ENOXENSYS)
2558 HYPERVISOR_set_callbacks(GSEL(GCODE_SEL, SEL_KPL),
2559 (unsigned long)Xhypervisor_callback,
2560 GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
2562 pcpu_init(pc, 0, sizeof(struct pcpu));
2563 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2564 pmap_kenter(pa + KERNBASE, pa);
2565 dpcpu_init((void *)(first + KERNBASE), 0);
2566 first += DPCPU_SIZE;
2567 physfree += DPCPU_SIZE;
2568 init_first += DPCPU_SIZE / PAGE_SIZE;
2570 PCPU_SET(prvspace, pc);
2571 PCPU_SET(curthread, &thread0);
2572 PCPU_SET(curpcb, thread0.td_pcb);
2575 * Initialize mutexes.
2577 * icu_lock: in order to allow an interrupt to occur in a critical
2578 * section, to set pcpu->ipending (etc...) properly, we
2579 * must be able to get the icu lock, so it can't be
2583 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2585 /* make ldt memory segments */
2586 PT_SET_MA(ldt, xpmap_ptom(VTOP(ldt)) | PG_V | PG_RW);
2587 bzero(ldt, PAGE_SIZE);
2588 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2589 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2590 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2591 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2593 default_proc_ldt.ldt_base = (caddr_t)ldt;
2594 default_proc_ldt.ldt_len = 6;
2595 _default_ldt = (int)&default_proc_ldt;
2596 PCPU_SET(currentldt, _default_ldt);
2597 PT_SET_MA(ldt, *vtopte((unsigned long)ldt) & ~PG_RW);
2598 xen_set_ldt((unsigned long) ldt, (sizeof ldt_segs / sizeof ldt_segs[0]));
2600 #if defined(XEN_PRIVILEGED)
2602 * Initialize the i8254 before the console so that console
2603 * initialization can use DELAY().
2609 * Initialize the console before we print anything out.
2613 if (metadata_missing)
2614 printf("WARNING: loader(8) metadata is missing!\n");
2622 ksym_start = bootinfo.bi_symtab;
2623 ksym_end = bootinfo.bi_esymtab;
2629 if (boothowto & RB_KDB)
2630 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2633 finishidentcpu(); /* Final stage of CPU initialization */
2634 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2635 GSEL(GCODE_SEL, SEL_KPL));
2636 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2637 GSEL(GCODE_SEL, SEL_KPL));
2638 initializecpu(); /* Initialize CPU registers */
2640 /* make an initial tss so cpu can get interrupt stack on syscall! */
2641 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2642 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2643 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2644 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2645 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2646 HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL),
2647 PCPU_GET(common_tss.tss_esp0));
2649 /* pointer to selector slot for %fs/%gs */
2650 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2652 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2653 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2654 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2655 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2657 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2659 dblfault_tss.tss_cr3 = (int)IdlePTD;
2661 dblfault_tss.tss_eip = (int)dblfault_handler;
2662 dblfault_tss.tss_eflags = PSL_KERNEL;
2663 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2664 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2665 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2666 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2667 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2671 init_param2(physmem);
2673 /* now running on new page tables, configured,and u/iom is accessible */
2675 msgbufinit(msgbufp, MSGBUF_SIZE);
2676 /* transfer to user mode */
2678 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2679 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2681 /* setup proc 0's pcb */
2682 thread0.td_pcb->pcb_flags = 0;
2684 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2686 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2688 thread0.td_pcb->pcb_ext = 0;
2689 thread0.td_frame = &proc0_tf;
2690 thread0.td_pcb->pcb_fsd = PCPU_GET(fsgs_gdt)[0];
2691 thread0.td_pcb->pcb_gsd = PCPU_GET(fsgs_gdt)[1];
2693 if (cpu_probe_amdc1e())
2694 cpu_idle_fn = cpu_idle_amdc1e;
2702 struct gate_descriptor *gdp;
2703 int gsel_tss, metadata_missing, x, pa;
2706 thread0.td_kstack = proc0kstack;
2707 thread0.td_pcb = (struct pcb *)
2708 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
2711 * This may be done better later if it gets more high level
2712 * components in it. If so just link td->td_proc here.
2714 proc_linkup0(&proc0, &thread0);
2716 metadata_missing = 0;
2717 if (bootinfo.bi_modulep) {
2718 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2719 preload_bootstrap_relocate(KERNBASE);
2721 metadata_missing = 1;
2724 kern_envp = static_env;
2725 else if (bootinfo.bi_envp)
2726 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2728 /* Init basic tunables, hz etc */
2732 * Make gdt memory segments. All segments cover the full 4GB
2733 * of address space and permissions are enforced at page level.
2735 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2736 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2737 gdt_segs[GUCODE_SEL].ssd_limit = atop(0 - 1);
2738 gdt_segs[GUDATA_SEL].ssd_limit = atop(0 - 1);
2739 gdt_segs[GUFS_SEL].ssd_limit = atop(0 - 1);
2740 gdt_segs[GUGS_SEL].ssd_limit = atop(0 - 1);
2743 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
2744 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2745 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2747 for (x = 0; x < NGDT; x++)
2748 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2750 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2751 r_gdt.rd_base = (int) gdt;
2752 mtx_init(&dt_lock, "descriptor tables", NULL, MTX_SPIN);
2755 pcpu_init(pc, 0, sizeof(struct pcpu));
2756 for (pa = first; pa < first + DPCPU_SIZE; pa += PAGE_SIZE)
2757 pmap_kenter(pa + KERNBASE, pa);
2758 dpcpu_init((void *)(first + KERNBASE), 0);
2759 first += DPCPU_SIZE;
2760 PCPU_SET(prvspace, pc);
2761 PCPU_SET(curthread, &thread0);
2762 PCPU_SET(curpcb, thread0.td_pcb);
2765 * Initialize mutexes.
2767 * icu_lock: in order to allow an interrupt to occur in a critical
2768 * section, to set pcpu->ipending (etc...) properly, we
2769 * must be able to get the icu lock, so it can't be
2773 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS | MTX_NOPROFILE);
2775 /* make ldt memory segments */
2776 ldt_segs[LUCODE_SEL].ssd_limit = atop(0 - 1);
2777 ldt_segs[LUDATA_SEL].ssd_limit = atop(0 - 1);
2778 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2779 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2781 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2783 PCPU_SET(currentldt, _default_ldt);
2786 for (x = 0; x < NIDT; x++)
2787 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2788 GSEL(GCODE_SEL, SEL_KPL));
2789 setidt(IDT_DE, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2790 GSEL(GCODE_SEL, SEL_KPL));
2791 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2792 GSEL(GCODE_SEL, SEL_KPL));
2793 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYS386IGT, SEL_KPL,
2794 GSEL(GCODE_SEL, SEL_KPL));
2795 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2796 GSEL(GCODE_SEL, SEL_KPL));
2797 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2798 GSEL(GCODE_SEL, SEL_KPL));
2799 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2800 GSEL(GCODE_SEL, SEL_KPL));
2801 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2802 GSEL(GCODE_SEL, SEL_KPL));
2803 setidt(IDT_NM, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2804 , GSEL(GCODE_SEL, SEL_KPL));
2805 setidt(IDT_DF, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2806 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2807 GSEL(GCODE_SEL, SEL_KPL));
2808 setidt(IDT_TS, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2809 GSEL(GCODE_SEL, SEL_KPL));
2810 setidt(IDT_NP, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2811 GSEL(GCODE_SEL, SEL_KPL));
2812 setidt(IDT_SS, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2813 GSEL(GCODE_SEL, SEL_KPL));
2814 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2815 GSEL(GCODE_SEL, SEL_KPL));
2816 setidt(IDT_PF, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2817 GSEL(GCODE_SEL, SEL_KPL));
2818 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2819 GSEL(GCODE_SEL, SEL_KPL));
2820 setidt(IDT_AC, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2821 GSEL(GCODE_SEL, SEL_KPL));
2822 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2823 GSEL(GCODE_SEL, SEL_KPL));
2824 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2825 GSEL(GCODE_SEL, SEL_KPL));
2826 setidt(IDT_SYSCALL, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2827 GSEL(GCODE_SEL, SEL_KPL));
2829 r_idt.rd_limit = sizeof(idt0) - 1;
2830 r_idt.rd_base = (int) idt;
2835 * The following code queries the PCI ID of 0:0:0. For the XBOX,
2836 * This should be 0x10de / 0x02a5.
2838 * This is exactly what Linux does.
2840 outl(0xcf8, 0x80000000);
2841 if (inl(0xcfc) == 0x02a510de) {
2842 arch_i386_is_xbox = 1;
2843 pic16l_setled(XBOX_LED_GREEN);
2846 * We are an XBOX, but we may have either 64MB or 128MB of
2847 * memory. The PCI host bridge should be programmed for this,
2848 * so we just query it.
2850 outl(0xcf8, 0x80000084);
2851 arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
2856 * Initialize the i8254 before the console so that console
2857 * initialization can use DELAY().
2862 * Initialize the console before we print anything out.
2866 if (metadata_missing)
2867 printf("WARNING: loader(8) metadata is missing!\n");
2875 ksym_start = bootinfo.bi_symtab;
2876 ksym_end = bootinfo.bi_esymtab;
2882 if (boothowto & RB_KDB)
2883 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
2886 finishidentcpu(); /* Final stage of CPU initialization */
2887 setidt(IDT_UD, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2888 GSEL(GCODE_SEL, SEL_KPL));
2889 setidt(IDT_GP, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2890 GSEL(GCODE_SEL, SEL_KPL));
2891 initializecpu(); /* Initialize CPU registers */
2893 /* make an initial tss so cpu can get interrupt stack on syscall! */
2894 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2895 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2896 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2897 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2898 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2899 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2900 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2901 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2904 /* pointer to selector slot for %fs/%gs */
2905 PCPU_SET(fsgs_gdt, &gdt[GUFS_SEL].sd);
2907 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2908 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2909 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2910 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2912 dblfault_tss.tss_cr3 = (int)IdlePDPT;
2914 dblfault_tss.tss_cr3 = (int)IdlePTD;
2916 dblfault_tss.tss_eip = (int)dblfault_handler;
2917 dblfault_tss.tss_eflags = PSL_KERNEL;
2918 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2919 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2920 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2921 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2922 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2926 init_param2(physmem);
2928 /* now running on new page tables, configured,and u/iom is accessible */
2930 msgbufinit(msgbufp, MSGBUF_SIZE);
2932 /* make a call gate to reenter kernel with */
2933 gdp = &ldt[LSYS5CALLS_SEL].gd;
2935 x = (int) &IDTVEC(lcall_syscall);
2936 gdp->gd_looffset = x;
2937 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2939 gdp->gd_type = SDT_SYS386CGT;
2940 gdp->gd_dpl = SEL_UPL;
2942 gdp->gd_hioffset = x >> 16;
2944 /* XXX does this work? */
2946 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2947 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2949 /* transfer to user mode */
2951 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
2952 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
2954 /* setup proc 0's pcb */
2955 thread0.td_pcb->pcb_flags = 0;
2957 thread0.td_pcb->pcb_cr3 = (int)IdlePDPT;
2959 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2961 thread0.td_pcb->pcb_ext = 0;
2962 thread0.td_frame = &proc0_tf;
2964 if (cpu_probe_amdc1e())
2965 cpu_idle_fn = cpu_idle_amdc1e;
2970 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2973 pcpu->pc_acpi_id = 0xffffffff;
2977 spinlock_enter(void)
2982 if (td->td_md.md_spinlock_count == 0)
2983 td->td_md.md_saved_flags = intr_disable();
2984 td->td_md.md_spinlock_count++;
2995 td->td_md.md_spinlock_count--;
2996 if (td->td_md.md_spinlock_count == 0)
2997 intr_restore(td->td_md.md_saved_flags);
3000 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
3001 static void f00f_hack(void *unused);
3002 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
3005 f00f_hack(void *unused)
3007 struct gate_descriptor *new_idt;
3015 printf("Intel Pentium detected, installing workaround for F00F bug\n");
3017 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
3019 panic("kmem_alloc returned 0");
3021 /* Put the problematic entry (#6) at the end of the lower page. */
3022 new_idt = (struct gate_descriptor*)
3023 (tmp + PAGE_SIZE - 7 * sizeof(struct gate_descriptor));
3024 bcopy(idt, new_idt, sizeof(idt0));
3025 r_idt.rd_base = (u_int)new_idt;
3028 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
3029 VM_PROT_READ, FALSE) != KERN_SUCCESS)
3030 panic("vm_map_protect failed");
3032 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
3035 * Construct a PCB from a trapframe. This is called from kdb_trap() where
3036 * we want to start a backtrace from the function that caused us to enter
3037 * the debugger. We have the context in the trapframe, but base the trace
3038 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
3039 * enough for a backtrace.
3042 makectx(struct trapframe *tf, struct pcb *pcb)
3045 pcb->pcb_edi = tf->tf_edi;
3046 pcb->pcb_esi = tf->tf_esi;
3047 pcb->pcb_ebp = tf->tf_ebp;
3048 pcb->pcb_ebx = tf->tf_ebx;
3049 pcb->pcb_eip = tf->tf_eip;
3050 pcb->pcb_esp = (ISPL(tf->tf_cs)) ? tf->tf_esp : (int)(tf + 1) - 8;
3054 ptrace_set_pc(struct thread *td, u_long addr)
3057 td->td_frame->tf_eip = addr;
3062 ptrace_single_step(struct thread *td)
3064 td->td_frame->tf_eflags |= PSL_T;
3069 ptrace_clear_single_step(struct thread *td)
3071 td->td_frame->tf_eflags &= ~PSL_T;
3076 fill_regs(struct thread *td, struct reg *regs)
3079 struct trapframe *tp;
3083 regs->r_fs = tp->tf_fs;
3084 regs->r_es = tp->tf_es;
3085 regs->r_ds = tp->tf_ds;
3086 regs->r_edi = tp->tf_edi;
3087 regs->r_esi = tp->tf_esi;
3088 regs->r_ebp = tp->tf_ebp;
3089 regs->r_ebx = tp->tf_ebx;
3090 regs->r_edx = tp->tf_edx;
3091 regs->r_ecx = tp->tf_ecx;
3092 regs->r_eax = tp->tf_eax;
3093 regs->r_eip = tp->tf_eip;
3094 regs->r_cs = tp->tf_cs;
3095 regs->r_eflags = tp->tf_eflags;
3096 regs->r_esp = tp->tf_esp;
3097 regs->r_ss = tp->tf_ss;
3098 regs->r_gs = pcb->pcb_gs;
3103 set_regs(struct thread *td, struct reg *regs)
3106 struct trapframe *tp;
3109 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
3110 !CS_SECURE(regs->r_cs))
3113 tp->tf_fs = regs->r_fs;
3114 tp->tf_es = regs->r_es;
3115 tp->tf_ds = regs->r_ds;
3116 tp->tf_edi = regs->r_edi;
3117 tp->tf_esi = regs->r_esi;
3118 tp->tf_ebp = regs->r_ebp;
3119 tp->tf_ebx = regs->r_ebx;
3120 tp->tf_edx = regs->r_edx;
3121 tp->tf_ecx = regs->r_ecx;
3122 tp->tf_eax = regs->r_eax;
3123 tp->tf_eip = regs->r_eip;
3124 tp->tf_cs = regs->r_cs;
3125 tp->tf_eflags = regs->r_eflags;
3126 tp->tf_esp = regs->r_esp;
3127 tp->tf_ss = regs->r_ss;
3128 pcb->pcb_gs = regs->r_gs;
3132 #ifdef CPU_ENABLE_SSE
3134 fill_fpregs_xmm(sv_xmm, sv_87)
3135 struct savexmm *sv_xmm;
3136 struct save87 *sv_87;
3138 register struct env87 *penv_87 = &sv_87->sv_env;
3139 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3142 bzero(sv_87, sizeof(*sv_87));
3144 /* FPU control/status */
3145 penv_87->en_cw = penv_xmm->en_cw;
3146 penv_87->en_sw = penv_xmm->en_sw;
3147 penv_87->en_tw = penv_xmm->en_tw;
3148 penv_87->en_fip = penv_xmm->en_fip;
3149 penv_87->en_fcs = penv_xmm->en_fcs;
3150 penv_87->en_opcode = penv_xmm->en_opcode;
3151 penv_87->en_foo = penv_xmm->en_foo;
3152 penv_87->en_fos = penv_xmm->en_fos;
3155 for (i = 0; i < 8; ++i)
3156 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
3160 set_fpregs_xmm(sv_87, sv_xmm)
3161 struct save87 *sv_87;
3162 struct savexmm *sv_xmm;
3164 register struct env87 *penv_87 = &sv_87->sv_env;
3165 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
3168 /* FPU control/status */
3169 penv_xmm->en_cw = penv_87->en_cw;
3170 penv_xmm->en_sw = penv_87->en_sw;
3171 penv_xmm->en_tw = penv_87->en_tw;
3172 penv_xmm->en_fip = penv_87->en_fip;
3173 penv_xmm->en_fcs = penv_87->en_fcs;
3174 penv_xmm->en_opcode = penv_87->en_opcode;
3175 penv_xmm->en_foo = penv_87->en_foo;
3176 penv_xmm->en_fos = penv_87->en_fos;
3179 for (i = 0; i < 8; ++i)
3180 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
3182 #endif /* CPU_ENABLE_SSE */
3185 fill_fpregs(struct thread *td, struct fpreg *fpregs)
3188 KASSERT(td == curthread || TD_IS_SUSPENDED(td),
3189 ("not suspended thread %p", td));
3191 #ifdef CPU_ENABLE_SSE
3193 fill_fpregs_xmm(&td->td_pcb->pcb_user_save.sv_xmm,
3194 (struct save87 *)fpregs);
3196 #endif /* CPU_ENABLE_SSE */
3197 bcopy(&td->td_pcb->pcb_user_save.sv_87, fpregs,
3203 set_fpregs(struct thread *td, struct fpreg *fpregs)
3206 #ifdef CPU_ENABLE_SSE
3208 set_fpregs_xmm((struct save87 *)fpregs,
3209 &td->td_pcb->pcb_user_save.sv_xmm);
3211 #endif /* CPU_ENABLE_SSE */
3212 bcopy(fpregs, &td->td_pcb->pcb_user_save.sv_87,
3219 * Get machine context.
3222 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
3224 struct trapframe *tp;
3225 struct segment_descriptor *sdp;
3229 PROC_LOCK(curthread->td_proc);
3230 mcp->mc_onstack = sigonstack(tp->tf_esp);
3231 PROC_UNLOCK(curthread->td_proc);
3232 mcp->mc_gs = td->td_pcb->pcb_gs;
3233 mcp->mc_fs = tp->tf_fs;
3234 mcp->mc_es = tp->tf_es;
3235 mcp->mc_ds = tp->tf_ds;
3236 mcp->mc_edi = tp->tf_edi;
3237 mcp->mc_esi = tp->tf_esi;
3238 mcp->mc_ebp = tp->tf_ebp;
3239 mcp->mc_isp = tp->tf_isp;
3240 mcp->mc_eflags = tp->tf_eflags;
3241 if (flags & GET_MC_CLEAR_RET) {
3244 mcp->mc_eflags &= ~PSL_C;
3246 mcp->mc_eax = tp->tf_eax;
3247 mcp->mc_edx = tp->tf_edx;
3249 mcp->mc_ebx = tp->tf_ebx;
3250 mcp->mc_ecx = tp->tf_ecx;
3251 mcp->mc_eip = tp->tf_eip;
3252 mcp->mc_cs = tp->tf_cs;
3253 mcp->mc_esp = tp->tf_esp;
3254 mcp->mc_ss = tp->tf_ss;
3255 mcp->mc_len = sizeof(*mcp);
3256 get_fpcontext(td, mcp);
3257 sdp = &td->td_pcb->pcb_fsd;
3258 mcp->mc_fsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3259 sdp = &td->td_pcb->pcb_gsd;
3260 mcp->mc_gsbase = sdp->sd_hibase << 24 | sdp->sd_lobase;
3266 * Set machine context.
3268 * However, we don't set any but the user modifiable flags, and we won't
3269 * touch the cs selector.
3272 set_mcontext(struct thread *td, const mcontext_t *mcp)
3274 struct trapframe *tp;
3278 if (mcp->mc_len != sizeof(*mcp))
3280 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
3281 (tp->tf_eflags & ~PSL_USERCHANGE);
3282 if ((ret = set_fpcontext(td, mcp)) == 0) {
3283 tp->tf_fs = mcp->mc_fs;
3284 tp->tf_es = mcp->mc_es;
3285 tp->tf_ds = mcp->mc_ds;
3286 tp->tf_edi = mcp->mc_edi;
3287 tp->tf_esi = mcp->mc_esi;
3288 tp->tf_ebp = mcp->mc_ebp;
3289 tp->tf_ebx = mcp->mc_ebx;
3290 tp->tf_edx = mcp->mc_edx;
3291 tp->tf_ecx = mcp->mc_ecx;
3292 tp->tf_eax = mcp->mc_eax;
3293 tp->tf_eip = mcp->mc_eip;
3294 tp->tf_eflags = eflags;
3295 tp->tf_esp = mcp->mc_esp;
3296 tp->tf_ss = mcp->mc_ss;
3297 td->td_pcb->pcb_gs = mcp->mc_gs;
3304 get_fpcontext(struct thread *td, mcontext_t *mcp)
3308 mcp->mc_fpformat = _MC_FPFMT_NODEV;
3309 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
3311 mcp->mc_ownedfp = npxgetregs(td);
3312 bcopy(&td->td_pcb->pcb_user_save, &mcp->mc_fpstate,
3313 sizeof(mcp->mc_fpstate));
3314 mcp->mc_fpformat = npxformat();
3319 set_fpcontext(struct thread *td, const mcontext_t *mcp)
3322 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
3324 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
3325 mcp->mc_fpformat != _MC_FPFMT_XMM)
3327 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
3328 /* We don't care what state is left in the FPU or PCB. */
3330 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
3331 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
3333 #ifdef CPU_ENABLE_SSE
3335 ((union savefpu *)&mcp->mc_fpstate)->sv_xmm.sv_env.
3336 en_mxcsr &= cpu_mxcsr_mask;
3338 npxsetregs(td, (union savefpu *)&mcp->mc_fpstate);
3346 fpstate_drop(struct thread *td)
3349 KASSERT(PCB_USER_FPU(td->td_pcb), ("fpstate_drop: kernel-owned fpu"));
3352 if (PCPU_GET(fpcurthread) == td)
3356 * XXX force a full drop of the npx. The above only drops it if we
3357 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
3359 * XXX I don't much like npxgetregs()'s semantics of doing a full
3360 * drop. Dropping only to the pcb matches fnsave's behaviour.
3361 * We only need to drop to !PCB_INITDONE in sendsig(). But
3362 * sendsig() is the only caller of npxgetregs()... perhaps we just
3363 * have too many layers.
3365 curthread->td_pcb->pcb_flags &= ~(PCB_NPXINITDONE |
3366 PCB_NPXUSERINITDONE);
3371 fill_dbregs(struct thread *td, struct dbreg *dbregs)
3376 dbregs->dr[0] = rdr0();
3377 dbregs->dr[1] = rdr1();
3378 dbregs->dr[2] = rdr2();
3379 dbregs->dr[3] = rdr3();
3380 dbregs->dr[4] = rdr4();
3381 dbregs->dr[5] = rdr5();
3382 dbregs->dr[6] = rdr6();
3383 dbregs->dr[7] = rdr7();
3386 dbregs->dr[0] = pcb->pcb_dr0;
3387 dbregs->dr[1] = pcb->pcb_dr1;
3388 dbregs->dr[2] = pcb->pcb_dr2;
3389 dbregs->dr[3] = pcb->pcb_dr3;
3392 dbregs->dr[6] = pcb->pcb_dr6;
3393 dbregs->dr[7] = pcb->pcb_dr7;
3399 set_dbregs(struct thread *td, struct dbreg *dbregs)
3405 load_dr0(dbregs->dr[0]);
3406 load_dr1(dbregs->dr[1]);
3407 load_dr2(dbregs->dr[2]);
3408 load_dr3(dbregs->dr[3]);
3409 load_dr4(dbregs->dr[4]);
3410 load_dr5(dbregs->dr[5]);
3411 load_dr6(dbregs->dr[6]);
3412 load_dr7(dbregs->dr[7]);
3415 * Don't let an illegal value for dr7 get set. Specifically,
3416 * check for undefined settings. Setting these bit patterns
3417 * result in undefined behaviour and can lead to an unexpected
3420 for (i = 0; i < 4; i++) {
3421 if (DBREG_DR7_ACCESS(dbregs->dr[7], i) == 0x02)
3423 if (DBREG_DR7_LEN(dbregs->dr[7], i) == 0x02)
3430 * Don't let a process set a breakpoint that is not within the
3431 * process's address space. If a process could do this, it
3432 * could halt the system by setting a breakpoint in the kernel
3433 * (if ddb was enabled). Thus, we need to check to make sure
3434 * that no breakpoints are being enabled for addresses outside
3435 * process's address space.
3437 * XXX - what about when the watched area of the user's
3438 * address space is written into from within the kernel
3439 * ... wouldn't that still cause a breakpoint to be generated
3440 * from within kernel mode?
3443 if (DBREG_DR7_ENABLED(dbregs->dr[7], 0)) {
3444 /* dr0 is enabled */
3445 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
3449 if (DBREG_DR7_ENABLED(dbregs->dr[7], 1)) {
3450 /* dr1 is enabled */
3451 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
3455 if (DBREG_DR7_ENABLED(dbregs->dr[7], 2)) {
3456 /* dr2 is enabled */
3457 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
3461 if (DBREG_DR7_ENABLED(dbregs->dr[7], 3)) {
3462 /* dr3 is enabled */
3463 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
3467 pcb->pcb_dr0 = dbregs->dr[0];
3468 pcb->pcb_dr1 = dbregs->dr[1];
3469 pcb->pcb_dr2 = dbregs->dr[2];
3470 pcb->pcb_dr3 = dbregs->dr[3];
3471 pcb->pcb_dr6 = dbregs->dr[6];
3472 pcb->pcb_dr7 = dbregs->dr[7];
3474 pcb->pcb_flags |= PCB_DBREGS;
3481 * Return > 0 if a hardware breakpoint has been hit, and the
3482 * breakpoint was in user space. Return 0, otherwise.
3485 user_dbreg_trap(void)
3487 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
3488 u_int32_t bp; /* breakpoint bits extracted from dr6 */
3489 int nbp; /* number of breakpoints that triggered */
3490 caddr_t addr[4]; /* breakpoint addresses */
3494 if ((dr7 & 0x000000ff) == 0) {
3496 * all GE and LE bits in the dr7 register are zero,
3497 * thus the trap couldn't have been caused by the
3498 * hardware debug registers
3505 bp = dr6 & 0x0000000f;
3509 * None of the breakpoint bits are set meaning this
3510 * trap was not caused by any of the debug registers
3516 * at least one of the breakpoints were hit, check to see
3517 * which ones and if any of them are user space addresses
3521 addr[nbp++] = (caddr_t)rdr0();
3524 addr[nbp++] = (caddr_t)rdr1();
3527 addr[nbp++] = (caddr_t)rdr2();
3530 addr[nbp++] = (caddr_t)rdr3();
3533 for (i = 0; i < nbp; i++) {
3534 if (addr[i] < (caddr_t)VM_MAXUSER_ADDRESS) {
3536 * addr[i] is in user space
3543 * None of the breakpoints are in user space.
3549 #include <machine/apicvar.h>
3552 * Provide stub functions so that the MADT APIC enumerator in the acpi
3553 * kernel module will link against a kernel without 'device apic'.
3555 * XXX - This is a gross hack.
3558 apic_register_enumerator(struct apic_enumerator *enumerator)
3563 ioapic_create(vm_paddr_t addr, int32_t apic_id, int intbase)
3569 ioapic_disable_pin(void *cookie, u_int pin)
3575 ioapic_get_vector(void *cookie, u_int pin)
3581 ioapic_register(void *cookie)
3586 ioapic_remap_vector(void *cookie, u_int pin, int vector)
3592 ioapic_set_extint(void *cookie, u_int pin)
3598 ioapic_set_nmi(void *cookie, u_int pin)
3604 ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol)
3610 ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger)
3616 lapic_create(u_int apic_id, int boot_cpu)
3621 lapic_init(vm_paddr_t addr)
3626 lapic_set_lvt_mode(u_int apic_id, u_int lvt, u_int32_t mode)
3632 lapic_set_lvt_polarity(u_int apic_id, u_int lvt, enum intr_polarity pol)
3638 lapic_set_lvt_triggermode(u_int apic_id, u_int lvt, enum intr_trigger trigger)
3647 * Provide inb() and outb() as functions. They are normally only available as
3648 * inline functions, thus cannot be called from the debugger.
3651 /* silence compiler warnings */
3652 u_char inb_(u_short);
3653 void outb_(u_short, u_char);
3662 outb_(u_short port, u_char data)