2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
8 * Copyright (c) 2005 Alan L. Cox <alc@cs.rice.edu>
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
46 * Copyright (c) 2003 Networks Associates Technology, Inc.
47 * All rights reserved.
49 * This software was developed for the FreeBSD Project by Jake Burkholder,
50 * Safeport Network Services, and Network Associates Laboratories, the
51 * Security Research Division of Network Associates, Inc. under
52 * DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the DARPA
53 * CHATS research program.
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
58 * 1. Redistributions of source code must retain the above copyright
59 * notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 * notice, this list of conditions and the following disclaimer in the
62 * documentation and/or other materials provided with the distribution.
64 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
65 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
66 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
67 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
68 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
69 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
70 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
71 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
72 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
73 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
77 #include <sys/cdefs.h>
78 __FBSDID("$FreeBSD$");
81 * Manages physical address maps.
83 * In addition to hardware address maps, this
84 * module is called upon to provide software-use-only
85 * maps which may or may not be stored in the same
86 * form as hardware maps. These pseudo-maps are
87 * used to store intermediate results from copy
88 * operations to and from address spaces.
90 * Since the information managed by this module is
91 * also stored by the logical address mapping module,
92 * this module may throw away valid virtual-to-physical
93 * mappings at almost any time. However, invalidations
94 * of virtual-to-physical mappings must be done as
97 * In order to cope with hardware architectures which
98 * make virtual-to-physical map invalidates expensive,
99 * this module may delay invalidate or reduced protection
100 * operations until such time as they are actually
101 * necessary. This module is given full information as
102 * to which processors are currently using which maps,
103 * and to when physical maps must be made correct.
106 #define PMAP_DIAGNOSTIC
109 #include "opt_pmap.h"
110 #include "opt_msgbuf.h"
112 #include "opt_xbox.h"
114 #include <sys/param.h>
115 #include <sys/systm.h>
116 #include <sys/kernel.h>
118 #include <sys/lock.h>
119 #include <sys/malloc.h>
120 #include <sys/mman.h>
121 #include <sys/msgbuf.h>
122 #include <sys/mutex.h>
123 #include <sys/proc.h>
124 #include <sys/sf_buf.h>
126 #include <sys/vmmeter.h>
127 #include <sys/sched.h>
128 #include <sys/sysctl.h>
134 #include <vm/vm_param.h>
135 #include <vm/vm_kern.h>
136 #include <vm/vm_page.h>
137 #include <vm/vm_map.h>
138 #include <vm/vm_object.h>
139 #include <vm/vm_extern.h>
140 #include <vm/vm_pageout.h>
141 #include <vm/vm_pager.h>
144 #include <machine/cpu.h>
145 #include <machine/cputypes.h>
146 #include <machine/md_var.h>
147 #include <machine/pcb.h>
148 #include <machine/specialreg.h>
150 #include <machine/smp.h>
154 #include <machine/xbox.h>
157 #include <xen/interface/xen.h>
158 #include <xen/hypervisor.h>
159 #include <machine/xen/hypercall.h>
160 #include <machine/xen/xenvar.h>
161 #include <machine/xen/xenfunc.h>
163 #if !defined(CPU_DISABLE_SSE) && defined(I686_CPU)
164 #define CPU_ENABLE_SSE
167 #ifndef PMAP_SHPGPERPROC
168 #define PMAP_SHPGPERPROC 200
171 #if defined(DIAGNOSTIC)
172 #define PMAP_DIAGNOSTIC
175 #if !defined(PMAP_DIAGNOSTIC)
176 #define PMAP_INLINE __gnu89_inline
183 #define PV_STAT(x) do { x ; } while (0)
185 #define PV_STAT(x) do { } while (0)
188 #define pa_index(pa) ((pa) >> PDRSHIFT)
189 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
192 * Get PDEs and PTEs for user/kernel address space
194 #define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
195 #define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
197 #define pmap_pde_v(pte) ((*(int *)pte & PG_V) != 0)
198 #define pmap_pte_w(pte) ((*(int *)pte & PG_W) != 0)
199 #define pmap_pte_m(pte) ((*(int *)pte & PG_M) != 0)
200 #define pmap_pte_u(pte) ((*(int *)pte & PG_A) != 0)
201 #define pmap_pte_v(pte) ((*(int *)pte & PG_V) != 0)
203 #define pmap_pte_set_prot(pte, v) ((*(int *)pte &= ~PG_PROT), (*(int *)pte |= (v)))
205 struct pmap kernel_pmap_store;
206 LIST_HEAD(pmaplist, pmap);
207 static struct pmaplist allpmaps;
208 static struct mtx allpmaps_lock;
210 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
211 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
212 int pgeflag = 0; /* PG_G or-in */
213 int pseflag = 0; /* PG_PS or-in */
216 vm_offset_t kernel_vm_end;
217 extern u_int32_t KERNend;
222 static uma_zone_t pdptzone;
226 static int pat_works; /* Is page attribute table sane? */
229 * Data for the pv entry allocation mechanism
231 static int pv_entry_count = 0, pv_entry_max = 0, pv_entry_high_water = 0;
232 static struct md_page *pv_table;
233 static int shpgperproc = PMAP_SHPGPERPROC;
235 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
236 int pv_maxchunks; /* How many chunks we have KVA for */
237 vm_offset_t pv_vafree; /* freelist stored in the PTE */
240 * All those kernel PT submaps that BSD is so fond of
249 static struct sysmaps sysmaps_pcpu[MAXCPU];
250 pt_entry_t *CMAP1 = 0;
251 static pt_entry_t *CMAP3;
252 caddr_t CADDR1 = 0, ptvmmap = 0;
253 static caddr_t CADDR3;
254 struct msgbuf *msgbufp = 0;
259 static caddr_t crashdumpmap;
261 static pt_entry_t *PMAP1 = 0, *PMAP2;
262 static pt_entry_t *PADDR1 = 0, *PADDR2;
265 static int PMAP1changedcpu;
266 SYSCTL_INT(_debug, OID_AUTO, PMAP1changedcpu, CTLFLAG_RD,
268 "Number of times pmap_pte_quick changed CPU with same PMAP1");
270 static int PMAP1changed;
271 SYSCTL_INT(_debug, OID_AUTO, PMAP1changed, CTLFLAG_RD,
273 "Number of times pmap_pte_quick changed PMAP1");
274 static int PMAP1unchanged;
275 SYSCTL_INT(_debug, OID_AUTO, PMAP1unchanged, CTLFLAG_RD,
277 "Number of times pmap_pte_quick didn't change PMAP1");
278 static struct mtx PMAP2mutex;
280 SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
281 static int pg_ps_enabled;
282 SYSCTL_INT(_vm_pmap, OID_AUTO, pg_ps_enabled, CTLFLAG_RDTUN, &pg_ps_enabled, 0,
283 "Are large page mappings enabled?");
285 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
286 "Max number of PV entries");
287 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
288 "Page share factor per proc");
290 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
291 static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try);
293 static vm_page_t pmap_enter_quick_locked(multicall_entry_t **mcl, int *count, pmap_t pmap, vm_offset_t va,
294 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
295 static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva,
297 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va,
299 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m,
301 static void pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m);
302 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va,
305 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
307 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
308 static int _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free);
309 static pt_entry_t *pmap_pte_quick(pmap_t pmap, vm_offset_t va);
310 static void pmap_pte_release(pt_entry_t *pte);
311 static int pmap_unuse_pt(pmap_t, vm_offset_t, vm_page_t *);
312 static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
313 static boolean_t pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr);
314 static void pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode);
316 static __inline void pagezero(void *page);
318 #if defined(PAE) && !defined(XEN)
319 static void *pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait);
322 CTASSERT(1 << PDESHIFT == sizeof(pd_entry_t));
323 CTASSERT(1 << PTESHIFT == sizeof(pt_entry_t));
326 * If you get an error here, then you set KVA_PAGES wrong! See the
327 * description of KVA_PAGES in sys/i386/include/pmap.h. It must be
328 * multiple of 4 for a normal kernel, or a multiple of 8 for a PAE.
330 CTASSERT(KERNBASE % (1 << 24) == 0);
335 pd_set(struct pmap *pmap, int ptepindex, vm_paddr_t val, int type)
337 vm_paddr_t pdir_ma = vtomach(&pmap->pm_pdir[ptepindex]);
342 xen_queue_pt_update(shadow_pdir_ma,
343 xpmap_ptom(val & ~(PG_RW)));
345 xen_queue_pt_update(pdir_ma,
348 case SH_PD_SET_VA_MA:
350 xen_queue_pt_update(shadow_pdir_ma,
353 xen_queue_pt_update(pdir_ma, val);
355 case SH_PD_SET_VA_CLEAR:
357 xen_queue_pt_update(shadow_pdir_ma, 0);
359 xen_queue_pt_update(pdir_ma, 0);
365 * Move the kernel virtual free pointer to the next
366 * 4MB. This is used to help improve performance
367 * by using a large (4MB) page for much of the kernel
368 * (.text, .data, .bss)
371 pmap_kmem_choose(vm_offset_t addr)
373 vm_offset_t newaddr = addr;
376 if (cpu_feature & CPUID_PSE)
377 newaddr = (addr + PDRMASK) & ~PDRMASK;
383 * Bootstrap the system enough to run with virtual memory.
385 * On the i386 this is called after mapping has already been enabled
386 * and just syncs the pmap module with what has already been done.
387 * [We can't call it easily with mapping off since the kernel is not
388 * mapped with PA == VA, hence we would have to relocate every address
389 * from the linked base (virtual) address "KERNBASE" to the actual
390 * (physical) address starting relative to 0]
393 pmap_bootstrap(vm_paddr_t firstaddr)
396 pt_entry_t *pte, *unused;
397 struct sysmaps *sysmaps;
401 * XXX The calculation of virtual_avail is wrong. It's NKPT*PAGE_SIZE too
402 * large. It should instead be correctly calculated in locore.s and
403 * not based on 'first' (which is a physical address, not a virtual
404 * address, for the start of unused physical memory). The kernel
405 * page tables are NOT double mapped and thus should not be included
406 * in this calculation.
408 virtual_avail = (vm_offset_t) KERNBASE + firstaddr;
409 virtual_avail = pmap_kmem_choose(virtual_avail);
411 virtual_end = VM_MAX_KERNEL_ADDRESS;
414 * Initialize the kernel pmap (which is statically allocated).
416 PMAP_LOCK_INIT(kernel_pmap);
417 kernel_pmap->pm_pdir = (pd_entry_t *) (KERNBASE + (u_int)IdlePTD);
419 kernel_pmap->pm_pdpt = (pdpt_entry_t *) (KERNBASE + (u_int)IdlePDPT);
421 kernel_pmap->pm_active = -1; /* don't allow deactivation */
422 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
423 LIST_INIT(&allpmaps);
424 mtx_init(&allpmaps_lock, "allpmaps", NULL, MTX_SPIN);
425 mtx_lock_spin(&allpmaps_lock);
426 LIST_INSERT_HEAD(&allpmaps, kernel_pmap, pm_list);
427 mtx_unlock_spin(&allpmaps_lock);
432 * Reserve some special page table entries/VA space for temporary
435 #define SYSMAP(c, p, v, n) \
436 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
442 * CMAP1/CMAP2 are used for zeroing and copying pages.
443 * CMAP3 is used for the idle process page zeroing.
445 for (i = 0; i < MAXCPU; i++) {
446 sysmaps = &sysmaps_pcpu[i];
447 mtx_init(&sysmaps->lock, "SYSMAPS", NULL, MTX_DEF);
448 SYSMAP(caddr_t, sysmaps->CMAP1, sysmaps->CADDR1, 1)
449 SYSMAP(caddr_t, sysmaps->CMAP2, sysmaps->CADDR2, 1)
451 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
452 SYSMAP(caddr_t, CMAP3, CADDR3, 1)
453 PT_SET_MA(CADDR3, 0);
458 SYSMAP(caddr_t, unused, crashdumpmap, MAXDUMPPGS)
461 * ptvmmap is used for reading arbitrary physical pages via /dev/mem.
463 SYSMAP(caddr_t, unused, ptvmmap, 1)
466 * msgbufp is used to map the system message buffer.
468 SYSMAP(struct msgbuf *, unused, msgbufp, atop(round_page(MSGBUF_SIZE)))
471 * ptemap is used for pmap_pte_quick
473 SYSMAP(pt_entry_t *, PMAP1, PADDR1, 1);
474 SYSMAP(pt_entry_t *, PMAP2, PADDR2, 1);
476 mtx_init(&PMAP2mutex, "PMAP2", NULL, MTX_DEF);
479 PT_SET_MA(CADDR1, 0);
482 * Leave in place an identity mapping (virt == phys) for the low 1 MB
483 * physical memory region that is used by the ACPI wakeup code. This
484 * mapping must not have PG_G set.
488 * leave here deliberately to show that this is not supported
491 /* FIXME: This is gross, but needed for the XBOX. Since we are in such
492 * an early stadium, we cannot yet neatly map video memory ... :-(
493 * Better fixes are very welcome! */
494 if (!arch_i386_is_xbox)
496 for (i = 1; i < NKPT; i++)
499 /* Initialize the PAT MSR if present. */
502 /* Turn on PG_G on kernel page(s) */
515 /* Bail if this CPU doesn't implement PAT. */
516 if (!(cpu_feature & CPUID_PAT))
519 if (cpu_vendor_id != CPU_VENDOR_INTEL ||
520 (CPUID_TO_FAMILY(cpu_id) == 6 && CPUID_TO_MODEL(cpu_id) >= 0xe)) {
522 * Leave the indices 0-3 at the default of WB, WT, UC, and UC-.
523 * Program 4 and 5 as WP and WC.
524 * Leave 6 and 7 as UC and UC-.
526 pat_msr = rdmsr(MSR_PAT);
527 pat_msr &= ~(PAT_MASK(4) | PAT_MASK(5));
528 pat_msr |= PAT_VALUE(4, PAT_WRITE_PROTECTED) |
529 PAT_VALUE(5, PAT_WRITE_COMBINING);
533 * Due to some Intel errata, we can only safely use the lower 4
534 * PAT entries. Thus, just replace PAT Index 2 with WC instead
537 * Intel Pentium III Processor Specification Update
538 * Errata E.27 (Upper Four PAT Entries Not Usable With Mode B
541 * Intel Pentium IV Processor Specification Update
542 * Errata N46 (PAT Index MSB May Be Calculated Incorrectly)
544 pat_msr = rdmsr(MSR_PAT);
545 pat_msr &= ~PAT_MASK(2);
546 pat_msr |= PAT_VALUE(2, PAT_WRITE_COMBINING);
549 wrmsr(MSR_PAT, pat_msr);
553 * Set PG_G on kernel pages. Only the BSP calls this when SMP is turned on.
560 vm_offset_t va, endva;
567 endva = KERNBASE + KERNend;
570 va = KERNBASE + KERNLOAD;
572 pdir = kernel_pmap->pm_pdir[KPTDI+i];
574 kernel_pmap->pm_pdir[KPTDI+i] = PTD[KPTDI+i] = pdir;
575 invltlb(); /* Play it safe, invltlb() every time */
580 va = (vm_offset_t)btext;
585 invltlb(); /* Play it safe, invltlb() every time */
592 * Initialize a vm_page's machine-dependent fields.
595 pmap_page_init(vm_page_t m)
598 TAILQ_INIT(&m->md.pv_list);
599 m->md.pat_mode = PAT_WRITE_BACK;
602 #if defined(PAE) && !defined(XEN)
604 pmap_pdpt_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait)
607 /* Inform UMA that this allocator uses kernel_map/object. */
608 *flags = UMA_SLAB_KERNEL;
609 return ((void *)kmem_alloc_contig(kernel_map, bytes, wait, 0x0ULL,
610 0xffffffffULL, 1, 0, VM_MEMATTR_DEFAULT));
615 * ABuse the pte nodes for unmapped kva to thread a kva freelist through.
617 * - Must deal with pages in order to ensure that none of the PG_* bits
618 * are ever set, PG_V in particular.
619 * - Assumes we can write to ptes without pte_store() atomic ops, even
620 * on PAE systems. This should be ok.
621 * - Assumes nothing will ever test these addresses for 0 to indicate
622 * no mapping instead of correctly checking PG_V.
623 * - Assumes a vm_offset_t will fit in a pte (true for i386).
624 * Because PG_V is never set, there can be no mappings to invalidate.
626 static int ptelist_count = 0;
628 pmap_ptelist_alloc(vm_offset_t *head)
631 vm_offset_t *phead = (vm_offset_t *)*head;
633 if (ptelist_count == 0) {
634 printf("out of memory!!!!!!\n");
635 return (0); /* Out of memory */
638 va = phead[ptelist_count];
643 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
645 vm_offset_t *phead = (vm_offset_t *)*head;
647 phead[ptelist_count++] = va;
651 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
657 nstackpages = (npages + PAGE_SIZE/sizeof(vm_offset_t) - 1)/ (PAGE_SIZE/sizeof(vm_offset_t));
658 for (i = 0; i < nstackpages; i++) {
659 va = (vm_offset_t)base + i * PAGE_SIZE;
660 m = vm_page_alloc(NULL, i,
661 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
663 pmap_qenter(va, &m, 1);
666 *head = (vm_offset_t)base;
667 for (i = npages - 1; i >= nstackpages; i--) {
668 va = (vm_offset_t)base + i * PAGE_SIZE;
669 pmap_ptelist_free(head, va);
675 * Initialize the pmap module.
676 * Called by vm_init, to initialize any structures that the pmap
677 * system needs to map virtual memory.
687 * Initialize the vm page array entries for the kernel pmap's
690 for (i = 0; i < nkpt; i++) {
691 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(PTD[i + KPTDI] & PG_FRAME));
692 KASSERT(mpte >= vm_page_array &&
693 mpte < &vm_page_array[vm_page_array_size],
694 ("pmap_init: page table page is out of range"));
695 mpte->pindex = i + KPTDI;
696 mpte->phys_addr = xpmap_mtop(PTD[i + KPTDI] & PG_FRAME);
700 * Initialize the address space (zone) for the pv entries. Set a
701 * high water mark so that the system can recover from excessive
702 * numbers of pv entries.
704 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
705 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
706 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
707 pv_entry_max = roundup(pv_entry_max, _NPCPV);
708 pv_entry_high_water = 9 * (pv_entry_max / 10);
711 * Are large page mappings enabled?
713 TUNABLE_INT_FETCH("vm.pmap.pg_ps_enabled", &pg_ps_enabled);
716 * Calculate the size of the pv head table for superpages.
718 for (i = 0; phys_avail[i + 1]; i += 2);
719 pv_npg = round_4mpage(phys_avail[(i - 2) + 1]) / NBPDR;
722 * Allocate memory for the pv head table for superpages.
724 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
726 pv_table = (struct md_page *)kmem_alloc(kernel_map, s);
727 for (i = 0; i < pv_npg; i++)
728 TAILQ_INIT(&pv_table[i].pv_list);
730 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
731 pv_chunkbase = (struct pv_chunk *)kmem_alloc_nofault(kernel_map,
732 PAGE_SIZE * pv_maxchunks);
733 if (pv_chunkbase == NULL)
734 panic("pmap_init: not enough kvm for pv chunks");
735 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
736 #if defined(PAE) && !defined(XEN)
737 pdptzone = uma_zcreate("PDPT", NPGPTD * sizeof(pdpt_entry_t), NULL,
738 NULL, NULL, NULL, (NPGPTD * sizeof(pdpt_entry_t)) - 1,
739 UMA_ZONE_VM | UMA_ZONE_NOFREE);
740 uma_zone_set_allocf(pdptzone, pmap_pdpt_allocf);
745 /***************************************************
746 * Low level helper routines.....
747 ***************************************************/
750 * Determine the appropriate bits to set in a PTE or PDE for a specified
754 pmap_cache_bits(int mode, boolean_t is_pde)
756 int pat_flag, pat_index, cache_bits;
758 /* The PAT bit is different for PTE's and PDE's. */
759 pat_flag = is_pde ? PG_PDE_PAT : PG_PTE_PAT;
761 /* If we don't support PAT, map extended modes to older ones. */
762 if (!(cpu_feature & CPUID_PAT)) {
764 case PAT_UNCACHEABLE:
765 case PAT_WRITE_THROUGH:
769 case PAT_WRITE_COMBINING:
770 case PAT_WRITE_PROTECTED:
771 mode = PAT_UNCACHEABLE;
776 /* Map the caching mode to a PAT index. */
779 case PAT_UNCACHEABLE:
782 case PAT_WRITE_THROUGH:
791 case PAT_WRITE_COMBINING:
794 case PAT_WRITE_PROTECTED:
798 panic("Unknown caching mode %d\n", mode);
803 case PAT_UNCACHEABLE:
804 case PAT_WRITE_PROTECTED:
807 case PAT_WRITE_THROUGH:
813 case PAT_WRITE_COMBINING:
817 panic("Unknown caching mode %d\n", mode);
821 /* Map the 3-bit index value into the PAT, PCD, and PWT bits. */
824 cache_bits |= pat_flag;
826 cache_bits |= PG_NC_PCD;
828 cache_bits |= PG_NC_PWT;
833 * For SMP, these functions have to use the IPI mechanism for coherence.
835 * N.B.: Before calling any of the following TLB invalidation functions,
836 * the calling processor must ensure that all stores updating a non-
837 * kernel page table are globally performed. Otherwise, another
838 * processor could cache an old, pre-update entry without being
839 * invalidated. This can happen one of two ways: (1) The pmap becomes
840 * active on another processor after its pm_active field is checked by
841 * one of the following functions but before a store updating the page
842 * table is globally performed. (2) The pmap becomes active on another
843 * processor before its pm_active field is checked but due to
844 * speculative loads one of the following functions stills reads the
845 * pmap as inactive on the other processor.
847 * The kernel page table is exempt because its pm_active field is
848 * immutable. The kernel page table is always active on every
852 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
854 cpumask_t cpumask, other_cpus;
856 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
860 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
864 cpumask = PCPU_GET(cpumask);
865 other_cpus = PCPU_GET(other_cpus);
866 if (pmap->pm_active & cpumask)
868 if (pmap->pm_active & other_cpus)
869 smp_masked_invlpg(pmap->pm_active & other_cpus, va);
876 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
878 cpumask_t cpumask, other_cpus;
881 CTR3(KTR_PMAP, "pmap_invalidate_page: pmap=%p eva=0x%x sva=0x%x",
885 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
886 for (addr = sva; addr < eva; addr += PAGE_SIZE)
888 smp_invlpg_range(sva, eva);
890 cpumask = PCPU_GET(cpumask);
891 other_cpus = PCPU_GET(other_cpus);
892 if (pmap->pm_active & cpumask)
893 for (addr = sva; addr < eva; addr += PAGE_SIZE)
895 if (pmap->pm_active & other_cpus)
896 smp_masked_invlpg_range(pmap->pm_active & other_cpus,
904 pmap_invalidate_all(pmap_t pmap)
906 cpumask_t cpumask, other_cpus;
908 CTR1(KTR_PMAP, "pmap_invalidate_page: pmap=%p", pmap);
911 if (pmap == kernel_pmap || pmap->pm_active == all_cpus) {
915 cpumask = PCPU_GET(cpumask);
916 other_cpus = PCPU_GET(other_cpus);
917 if (pmap->pm_active & cpumask)
919 if (pmap->pm_active & other_cpus)
920 smp_masked_invltlb(pmap->pm_active & other_cpus);
926 pmap_invalidate_cache(void)
936 * Normal, non-SMP, 486+ invalidation functions.
937 * We inline these within pmap.c for speed.
940 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
942 CTR2(KTR_PMAP, "pmap_invalidate_page: pmap=%p va=0x%x",
945 if (pmap == kernel_pmap || pmap->pm_active)
951 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
955 if (eva - sva > PAGE_SIZE)
956 CTR3(KTR_PMAP, "pmap_invalidate_range: pmap=%p sva=0x%x eva=0x%x",
959 if (pmap == kernel_pmap || pmap->pm_active)
960 for (addr = sva; addr < eva; addr += PAGE_SIZE)
966 pmap_invalidate_all(pmap_t pmap)
969 CTR1(KTR_PMAP, "pmap_invalidate_all: pmap=%p", pmap);
971 if (pmap == kernel_pmap || pmap->pm_active)
976 pmap_invalidate_cache(void)
984 pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
987 KASSERT((sva & PAGE_MASK) == 0,
988 ("pmap_invalidate_cache_range: sva not page-aligned"));
989 KASSERT((eva & PAGE_MASK) == 0,
990 ("pmap_invalidate_cache_range: eva not page-aligned"));
992 if (cpu_feature & CPUID_SS)
993 ; /* If "Self Snoop" is supported, do nothing. */
994 else if (cpu_feature & CPUID_CLFSH) {
997 * Otherwise, do per-cache line flush. Use the mfence
998 * instruction to insure that previous stores are
999 * included in the write-back. The processor
1000 * propagates flush to other processors in the cache
1004 for (; sva < eva; sva += cpu_clflush_line_size)
1010 * No targeted cache flush methods are supported by CPU,
1011 * globally invalidate cache as a last resort.
1013 pmap_invalidate_cache();
1018 * Are we current address space or kernel? N.B. We return FALSE when
1019 * a pmap's page table is in use because a kernel thread is borrowing
1020 * it. The borrowed page table can change spontaneously, making any
1021 * dependence on its continued use subject to a race condition.
1024 pmap_is_current(pmap_t pmap)
1027 return (pmap == kernel_pmap ||
1028 (pmap == vmspace_pmap(curthread->td_proc->p_vmspace) &&
1029 (pmap->pm_pdir[PTDPTDI] & PG_FRAME) == (PTDpde[0] & PG_FRAME)));
1033 * If the given pmap is not the current or kernel pmap, the returned pte must
1034 * be released by passing it to pmap_pte_release().
1037 pmap_pte(pmap_t pmap, vm_offset_t va)
1042 pde = pmap_pde(pmap, va);
1046 /* are we current address space or kernel? */
1047 if (pmap_is_current(pmap))
1048 return (vtopte(va));
1049 mtx_lock(&PMAP2mutex);
1050 newpf = *pde & PG_FRAME;
1051 if ((*PMAP2 & PG_FRAME) != newpf) {
1052 PT_SET_MA(PADDR2, newpf | PG_V | PG_A | PG_M);
1053 CTR3(KTR_PMAP, "pmap_pte: pmap=%p va=0x%x newpte=0x%08x",
1054 pmap, va, (*PMAP2 & 0xffffffff));
1057 return (PADDR2 + (i386_btop(va) & (NPTEPG - 1)));
1063 * Releases a pte that was obtained from pmap_pte(). Be prepared for the pte
1066 static __inline void
1067 pmap_pte_release(pt_entry_t *pte)
1070 if ((pt_entry_t *)((vm_offset_t)pte & ~PAGE_MASK) == PADDR2) {
1071 CTR1(KTR_PMAP, "pmap_pte_release: pte=0x%jx",
1073 vm_page_lock_queues();
1074 PT_SET_VA(PMAP2, 0, TRUE);
1075 vm_page_unlock_queues();
1076 mtx_unlock(&PMAP2mutex);
1080 static __inline void
1081 invlcaddr(void *caddr)
1084 invlpg((u_int)caddr);
1089 * Super fast pmap_pte routine best used when scanning
1090 * the pv lists. This eliminates many coarse-grained
1091 * invltlb calls. Note that many of the pv list
1092 * scans are across different pmaps. It is very wasteful
1093 * to do an entire invltlb for checking a single mapping.
1095 * If the given pmap is not the current pmap, vm_page_queue_mtx
1096 * must be held and curthread pinned to a CPU.
1099 pmap_pte_quick(pmap_t pmap, vm_offset_t va)
1104 pde = pmap_pde(pmap, va);
1108 /* are we current address space or kernel? */
1109 if (pmap_is_current(pmap))
1110 return (vtopte(va));
1111 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
1112 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
1113 newpf = *pde & PG_FRAME;
1114 if ((*PMAP1 & PG_FRAME) != newpf) {
1115 PT_SET_MA(PADDR1, newpf | PG_V | PG_A | PG_M);
1116 CTR3(KTR_PMAP, "pmap_pte_quick: pmap=%p va=0x%x newpte=0x%08x",
1117 pmap, va, (u_long)*PMAP1);
1120 PMAP1cpu = PCPU_GET(cpuid);
1125 if (PMAP1cpu != PCPU_GET(cpuid)) {
1126 PMAP1cpu = PCPU_GET(cpuid);
1132 return (PADDR1 + (i386_btop(va) & (NPTEPG - 1)));
1138 * Routine: pmap_extract
1140 * Extract the physical page address associated
1141 * with the given map/virtual_address pair.
1144 pmap_extract(pmap_t pmap, vm_offset_t va)
1153 pde = pmap->pm_pdir[va >> PDRSHIFT];
1155 if ((pde & PG_PS) != 0) {
1156 rtval = xpmap_mtop(pde & PG_PS_FRAME) | (va & PDRMASK);
1160 pte = pmap_pte(pmap, va);
1161 pteval = *pte ? xpmap_mtop(*pte) : 0;
1162 rtval = (pteval & PG_FRAME) | (va & PAGE_MASK);
1163 pmap_pte_release(pte);
1170 * Routine: pmap_extract_ma
1172 * Like pmap_extract, but returns machine address
1175 pmap_extract_ma(pmap_t pmap, vm_offset_t va)
1183 pde = pmap->pm_pdir[va >> PDRSHIFT];
1185 if ((pde & PG_PS) != 0) {
1186 rtval = (pde & ~PDRMASK) | (va & PDRMASK);
1190 pte = pmap_pte(pmap, va);
1191 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
1192 pmap_pte_release(pte);
1199 * Routine: pmap_extract_and_hold
1201 * Atomically extract and hold the physical page
1202 * with the given pmap and virtual address pair
1203 * if that mapping permits the given protection.
1206 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1213 vm_page_lock_queues();
1215 pde = PT_GET(pmap_pde(pmap, va));
1218 if ((pde & PG_RW) || (prot & VM_PROT_WRITE) == 0) {
1219 m = PHYS_TO_VM_PAGE((pde & PG_PS_FRAME) |
1225 pte = PT_GET(pmap_pte_quick(pmap, va));
1227 PT_SET_MA(PADDR1, 0);
1229 ((pte & PG_RW) || (prot & VM_PROT_WRITE) == 0)) {
1230 m = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1236 vm_page_unlock_queues();
1241 /***************************************************
1242 * Low level mapping routines.....
1243 ***************************************************/
1246 * Add a wired page to the kva.
1247 * Note: not SMP coherent.
1250 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1252 PT_SET_MA(va, xpmap_ptom(pa)| PG_RW | PG_V | pgeflag);
1256 pmap_kenter_ma(vm_offset_t va, vm_paddr_t ma)
1261 pte_store_ma(pte, ma | PG_RW | PG_V | pgeflag);
1265 static __inline void
1266 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int mode)
1268 PT_SET_MA(va, pa | PG_RW | PG_V | pgeflag | pmap_cache_bits(mode, 0));
1272 * Remove a page from the kernel pagetables.
1273 * Note: not SMP coherent.
1276 pmap_kremove(vm_offset_t va)
1281 PT_CLEAR_VA(pte, FALSE);
1285 * Used to map a range of physical addresses into kernel
1286 * virtual address space.
1288 * The value passed in '*virt' is a suggested virtual address for
1289 * the mapping. Architectures which can support a direct-mapped
1290 * physical to virtual region can return the appropriate address
1291 * within that region, leaving '*virt' unchanged. Other
1292 * architectures should map the pages starting at '*virt' and
1293 * update '*virt' with the first usable address after the mapped
1297 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
1299 vm_offset_t va, sva;
1302 CTR4(KTR_PMAP, "pmap_map: va=0x%x start=0x%jx end=0x%jx prot=0x%x",
1303 va, start, end, prot);
1304 while (start < end) {
1305 pmap_kenter(va, start);
1309 pmap_invalidate_range(kernel_pmap, sva, va);
1316 * Add a list of wired pages to the kva
1317 * this routine is only used for temporary
1318 * kernel mappings that do not need to have
1319 * page modification or references recorded.
1320 * Note that old mappings are simply written
1321 * over. The page *must* be wired.
1322 * Note: SMP coherent. Uses a ranged shootdown IPI.
1325 pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
1327 pt_entry_t *endpte, *pte;
1329 vm_offset_t va = sva;
1331 multicall_entry_t mcl[16];
1332 multicall_entry_t *mclp = mcl;
1335 CTR2(KTR_PMAP, "pmap_qenter:sva=0x%x count=%d", va, count);
1337 endpte = pte + count;
1338 while (pte < endpte) {
1339 pa = xpmap_ptom(VM_PAGE_TO_PHYS(*ma)) | pgeflag | PG_RW | PG_V | PG_M | PG_A;
1341 mclp->op = __HYPERVISOR_update_va_mapping;
1343 mclp->args[1] = (uint32_t)(pa & 0xffffffff);
1344 mclp->args[2] = (uint32_t)(pa >> 32);
1345 mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0;
1352 if (mclcount == 16) {
1353 error = HYPERVISOR_multicall(mcl, mclcount);
1356 KASSERT(error == 0, ("bad multicall %d", error));
1360 error = HYPERVISOR_multicall(mcl, mclcount);
1361 KASSERT(error == 0, ("bad multicall %d", error));
1365 for (pte = vtopte(sva), mclcount = 0; mclcount < count; mclcount++, pte++)
1366 KASSERT(*pte, ("pte not set for va=0x%x", sva + mclcount*PAGE_SIZE));
1372 * This routine tears out page mappings from the
1373 * kernel -- it is meant only for temporary mappings.
1374 * Note: SMP coherent. Uses a ranged shootdown IPI.
1377 pmap_qremove(vm_offset_t sva, int count)
1381 CTR2(KTR_PMAP, "pmap_qremove: sva=0x%x count=%d", sva, count);
1383 vm_page_lock_queues();
1385 while (count-- > 0) {
1390 pmap_invalidate_range(kernel_pmap, sva, va);
1392 vm_page_unlock_queues();
1395 /***************************************************
1396 * Page table page management routines.....
1397 ***************************************************/
1398 static __inline void
1399 pmap_free_zero_pages(vm_page_t free)
1403 while (free != NULL) {
1406 vm_page_free_zero(m);
1411 * This routine unholds page table pages, and if the hold count
1412 * drops to zero, then it decrements the wire count.
1415 pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1419 if (m->wire_count == 0)
1420 return _pmap_unwire_pte_hold(pmap, m, free);
1426 _pmap_unwire_pte_hold(pmap_t pmap, vm_page_t m, vm_page_t *free)
1432 * unmap the page table page
1434 xen_pt_unpin(pmap->pm_pdir[m->pindex]);
1436 * page *might* contain residual mapping :-/
1438 PD_CLEAR_VA(pmap, m->pindex, TRUE);
1440 --pmap->pm_stats.resident_count;
1443 * This is a release store so that the ordinary store unmapping
1444 * the page table page is globally performed before TLB shoot-
1447 atomic_subtract_rel_int(&cnt.v_wire_count, 1);
1450 * Do an invltlb to make the invalidated mapping
1451 * take effect immediately.
1453 pteva = VM_MAXUSER_ADDRESS + i386_ptob(m->pindex);
1454 pmap_invalidate_page(pmap, pteva);
1457 * Put page on a list so that it is released after
1458 * *ALL* TLB shootdown is done
1467 * After removing a page table entry, this routine is used to
1468 * conditionally free the page, and manage the hold/wire counts.
1471 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t *free)
1476 if (va >= VM_MAXUSER_ADDRESS)
1478 ptepde = PT_GET(pmap_pde(pmap, va));
1479 mpte = PHYS_TO_VM_PAGE(ptepde & PG_FRAME);
1480 return pmap_unwire_pte_hold(pmap, mpte, free);
1484 pmap_pinit0(pmap_t pmap)
1487 PMAP_LOCK_INIT(pmap);
1488 pmap->pm_pdir = (pd_entry_t *)(KERNBASE + (vm_offset_t)IdlePTD);
1490 pmap->pm_pdpt = (pdpt_entry_t *)(KERNBASE + (vm_offset_t)IdlePDPT);
1492 pmap->pm_active = 0;
1493 PCPU_SET(curpmap, pmap);
1494 TAILQ_INIT(&pmap->pm_pvchunk);
1495 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1496 mtx_lock_spin(&allpmaps_lock);
1497 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1498 mtx_unlock_spin(&allpmaps_lock);
1502 * Initialize a preallocated and zeroed pmap structure,
1503 * such as one in a vmspace structure.
1506 pmap_pinit(pmap_t pmap)
1508 vm_page_t m, ptdpg[NPGPTD + 1];
1509 int npgptd = NPGPTD + 1;
1513 PMAP_LOCK_INIT(pmap);
1516 * No need to allocate page table space yet but we do need a valid
1517 * page directory table.
1519 if (pmap->pm_pdir == NULL) {
1520 pmap->pm_pdir = (pd_entry_t *)kmem_alloc_nofault(kernel_map,
1522 if (pmap->pm_pdir == NULL) {
1523 PMAP_LOCK_DESTROY(pmap);
1526 #if defined(XEN) && defined(PAE)
1527 pmap->pm_pdpt = (pd_entry_t *)kmem_alloc_nofault(kernel_map, 1);
1530 #if defined(PAE) && !defined(XEN)
1531 pmap->pm_pdpt = uma_zalloc(pdptzone, M_WAITOK | M_ZERO);
1532 KASSERT(((vm_offset_t)pmap->pm_pdpt &
1533 ((NPGPTD * sizeof(pdpt_entry_t)) - 1)) == 0,
1534 ("pmap_pinit: pdpt misaligned"));
1535 KASSERT(pmap_kextract((vm_offset_t)pmap->pm_pdpt) < (4ULL<<30),
1536 ("pmap_pinit: pdpt above 4g"));
1541 * allocate the page directory page(s)
1543 for (i = 0; i < npgptd;) {
1544 m = vm_page_alloc(NULL, color++,
1545 VM_ALLOC_NORMAL | VM_ALLOC_NOOBJ | VM_ALLOC_WIRED |
1553 pmap_qenter((vm_offset_t)pmap->pm_pdir, ptdpg, NPGPTD);
1554 for (i = 0; i < NPGPTD; i++) {
1555 if ((ptdpg[i]->flags & PG_ZERO) == 0)
1556 pagezero(&pmap->pm_pdir[i*NPTEPG]);
1559 mtx_lock_spin(&allpmaps_lock);
1560 LIST_INSERT_HEAD(&allpmaps, pmap, pm_list);
1561 mtx_unlock_spin(&allpmaps_lock);
1562 /* Wire in kernel global address entries. */
1564 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * sizeof(pd_entry_t));
1567 pmap_qenter((vm_offset_t)pmap->pm_pdpt, &ptdpg[NPGPTD], 1);
1568 if ((ptdpg[NPGPTD]->flags & PG_ZERO) == 0)
1569 bzero(pmap->pm_pdpt, PAGE_SIZE);
1571 for (i = 0; i < NPGPTD; i++) {
1574 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i]));
1575 pmap->pm_pdpt[i] = ma | PG_V;
1580 for (i = 0; i < NPGPTD; i++) {
1584 ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i]));
1585 pd = pmap->pm_pdir + (i * NPDEPG);
1586 PT_SET_MA(pd, *vtopte((vm_offset_t)pd) & ~(PG_M|PG_A|PG_U|PG_RW));
1593 PT_SET_MA(pmap->pm_pdpt, *vtopte((vm_offset_t)pmap->pm_pdpt) & ~PG_RW);
1595 vm_page_lock_queues();
1597 xen_pgdpt_pin(xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[NPGPTD])));
1598 for (i = 0; i < NPGPTD; i++) {
1599 vm_paddr_t ma = xpmap_ptom(VM_PAGE_TO_PHYS(ptdpg[i]));
1600 PT_SET_VA_MA(&pmap->pm_pdir[PTDPTDI + i], ma | PG_V | PG_A, FALSE);
1603 vm_page_unlock_queues();
1605 pmap->pm_active = 0;
1606 TAILQ_INIT(&pmap->pm_pvchunk);
1607 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1613 * this routine is called if the page table page is not
1617 _pmap_allocpte(pmap_t pmap, unsigned int ptepindex, int flags)
1622 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1623 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1624 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1627 * Allocate a page table page.
1629 if ((m = vm_page_alloc(NULL, ptepindex, VM_ALLOC_NOOBJ |
1630 VM_ALLOC_WIRED | VM_ALLOC_ZERO)) == NULL) {
1631 if (flags & M_WAITOK) {
1633 vm_page_unlock_queues();
1635 vm_page_lock_queues();
1640 * Indicate the need to retry. While waiting, the page table
1641 * page may have been allocated.
1645 if ((m->flags & PG_ZERO) == 0)
1649 * Map the pagetable page into the process address space, if
1650 * it isn't already there.
1652 pmap->pm_stats.resident_count++;
1654 ptema = xpmap_ptom(VM_PAGE_TO_PHYS(m));
1656 PT_SET_VA_MA(&pmap->pm_pdir[ptepindex],
1657 (ptema | PG_U | PG_RW | PG_V | PG_A | PG_M), TRUE);
1659 KASSERT(pmap->pm_pdir[ptepindex],
1660 ("_pmap_allocpte: ptepindex=%d did not get mapped", ptepindex));
1665 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1671 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1672 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1673 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1676 * Calculate pagetable page index
1678 ptepindex = va >> PDRSHIFT;
1681 * Get the page directory entry
1683 ptema = pmap->pm_pdir[ptepindex];
1686 * This supports switching from a 4MB page to a
1689 if (ptema & PG_PS) {
1693 pmap->pm_pdir[ptepindex] = 0;
1695 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
1696 pmap_invalidate_all(kernel_pmap);
1700 * If the page table page is mapped, we just increment the
1701 * hold count, and activate it.
1704 m = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME);
1708 * Here if the pte page isn't mapped, or if it has
1711 CTR3(KTR_PMAP, "pmap_allocpte: pmap=%p va=0x%08x flags=0x%x",
1713 m = _pmap_allocpte(pmap, ptepindex, flags);
1714 if (m == NULL && (flags & M_WAITOK))
1717 KASSERT(pmap->pm_pdir[ptepindex], ("ptepindex=%d did not get mapped", ptepindex));
1723 /***************************************************
1724 * Pmap allocation/deallocation routines.
1725 ***************************************************/
1729 * Deal with a SMP shootdown of other users of the pmap that we are
1730 * trying to dispose of. This can be a bit hairy.
1732 static cpumask_t *lazymask;
1733 static u_int lazyptd;
1734 static volatile u_int lazywait;
1736 void pmap_lazyfix_action(void);
1739 pmap_lazyfix_action(void)
1741 cpumask_t mymask = PCPU_GET(cpumask);
1744 (*ipi_lazypmap_counts[PCPU_GET(cpuid)])++;
1746 if (rcr3() == lazyptd)
1747 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1748 atomic_clear_int(lazymask, mymask);
1749 atomic_store_rel_int(&lazywait, 1);
1753 pmap_lazyfix_self(cpumask_t mymask)
1756 if (rcr3() == lazyptd)
1757 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1758 atomic_clear_int(lazymask, mymask);
1763 pmap_lazyfix(pmap_t pmap)
1765 cpumask_t mymask, mask;
1768 while ((mask = pmap->pm_active) != 0) {
1770 mask = mask & -mask; /* Find least significant set bit */
1771 mtx_lock_spin(&smp_ipi_mtx);
1773 lazyptd = vtophys(pmap->pm_pdpt);
1775 lazyptd = vtophys(pmap->pm_pdir);
1777 mymask = PCPU_GET(cpumask);
1778 if (mask == mymask) {
1779 lazymask = &pmap->pm_active;
1780 pmap_lazyfix_self(mymask);
1782 atomic_store_rel_int((u_int *)&lazymask,
1783 (u_int)&pmap->pm_active);
1784 atomic_store_rel_int(&lazywait, 0);
1785 ipi_selected(mask, IPI_LAZYPMAP);
1786 while (lazywait == 0) {
1792 mtx_unlock_spin(&smp_ipi_mtx);
1794 printf("pmap_lazyfix: spun for 50000000\n");
1801 * Cleaning up on uniprocessor is easy. For various reasons, we're
1802 * unlikely to have to even execute this code, including the fact
1803 * that the cleanup is deferred until the parent does a wait(2), which
1804 * means that another userland process has run.
1807 pmap_lazyfix(pmap_t pmap)
1811 cr3 = vtophys(pmap->pm_pdir);
1812 if (cr3 == rcr3()) {
1813 load_cr3(PCPU_GET(curpcb)->pcb_cr3);
1814 pmap->pm_active &= ~(PCPU_GET(cpumask));
1820 * Release any resources held by the given physical map.
1821 * Called when a pmap initialized by pmap_pinit is being released.
1822 * Should only be called if the map contains no valid mappings.
1825 pmap_release(pmap_t pmap)
1827 vm_page_t m, ptdpg[2*NPGPTD+1];
1832 int npgptd = NPGPTD + 1;
1834 int npgptd = NPGPTD;
1837 int npgptd = NPGPTD;
1839 KASSERT(pmap->pm_stats.resident_count == 0,
1840 ("pmap_release: pmap resident count %ld != 0",
1841 pmap->pm_stats.resident_count));
1845 mtx_lock_spin(&allpmaps_lock);
1846 LIST_REMOVE(pmap, pm_list);
1847 mtx_unlock_spin(&allpmaps_lock);
1849 for (i = 0; i < NPGPTD; i++)
1850 ptdpg[i] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdir + (i*NPDEPG)) & PG_FRAME);
1851 pmap_qremove((vm_offset_t)pmap->pm_pdir, NPGPTD);
1852 #if defined(PAE) && defined(XEN)
1853 ptdpg[NPGPTD] = PHYS_TO_VM_PAGE(vtophys(pmap->pm_pdpt));
1856 for (i = 0; i < npgptd; i++) {
1858 ma = xpmap_ptom(VM_PAGE_TO_PHYS(m));
1859 /* unpinning L1 and L2 treated the same */
1868 KASSERT(xpmap_ptom(VM_PAGE_TO_PHYS(m)) == (pmap->pm_pdpt[i] & PG_FRAME),
1869 ("pmap_release: got wrong ptd page"));
1872 atomic_subtract_int(&cnt.v_wire_count, 1);
1876 pmap_qremove((vm_offset_t)pmap->pm_pdpt, 1);
1878 PMAP_LOCK_DESTROY(pmap);
1882 kvm_size(SYSCTL_HANDLER_ARGS)
1884 unsigned long ksize = VM_MAX_KERNEL_ADDRESS - KERNBASE;
1886 return sysctl_handle_long(oidp, &ksize, 0, req);
1888 SYSCTL_PROC(_vm, OID_AUTO, kvm_size, CTLTYPE_LONG|CTLFLAG_RD,
1889 0, 0, kvm_size, "IU", "Size of KVM");
1892 kvm_free(SYSCTL_HANDLER_ARGS)
1894 unsigned long kfree = VM_MAX_KERNEL_ADDRESS - kernel_vm_end;
1896 return sysctl_handle_long(oidp, &kfree, 0, req);
1898 SYSCTL_PROC(_vm, OID_AUTO, kvm_free, CTLTYPE_LONG|CTLFLAG_RD,
1899 0, 0, kvm_free, "IU", "Amount of KVM free");
1902 * grow the number of kernel page table entries, if needed
1905 pmap_growkernel(vm_offset_t addr)
1908 vm_paddr_t ptppaddr;
1912 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1913 if (kernel_vm_end == 0) {
1914 kernel_vm_end = KERNBASE;
1916 while (pdir_pde(PTD, kernel_vm_end)) {
1917 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1919 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1920 kernel_vm_end = kernel_map->max_offset;
1925 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1926 if (addr - 1 >= kernel_map->max_offset)
1927 addr = kernel_map->max_offset;
1928 while (kernel_vm_end < addr) {
1929 if (pdir_pde(PTD, kernel_vm_end)) {
1930 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1931 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1932 kernel_vm_end = kernel_map->max_offset;
1939 * This index is bogus, but out of the way
1941 nkpg = vm_page_alloc(NULL, nkpt,
1942 VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM | VM_ALLOC_WIRED);
1944 panic("pmap_growkernel: no memory to grow kernel");
1948 pmap_zero_page(nkpg);
1949 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1950 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
1951 vm_page_lock_queues();
1952 PD_SET_VA(kernel_pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1953 mtx_lock_spin(&allpmaps_lock);
1954 LIST_FOREACH(pmap, &allpmaps, pm_list)
1955 PD_SET_VA(pmap, (kernel_vm_end >> PDRSHIFT), newpdir, TRUE);
1957 mtx_unlock_spin(&allpmaps_lock);
1958 vm_page_unlock_queues();
1960 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1961 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1962 kernel_vm_end = kernel_map->max_offset;
1969 /***************************************************
1970 * page management routines.
1971 ***************************************************/
1973 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1974 CTASSERT(_NPCM == 11);
1976 static __inline struct pv_chunk *
1977 pv_to_chunk(pv_entry_t pv)
1980 return (struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK);
1983 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1985 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
1986 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
1988 static uint32_t pc_freemask[11] = {
1989 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1990 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1991 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1992 PC_FREE0_9, PC_FREE10
1995 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1996 "Current number of pv entries");
1999 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
2001 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
2002 "Current number of pv entry chunks");
2003 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
2004 "Current number of pv entry chunks allocated");
2005 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
2006 "Current number of pv entry chunks frees");
2007 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
2008 "Number of times tried to get a chunk page but failed.");
2010 static long pv_entry_frees, pv_entry_allocs;
2011 static int pv_entry_spare;
2013 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
2014 "Current number of pv entry frees");
2015 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
2016 "Current number of pv entry allocs");
2017 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
2018 "Current number of spare pv entries");
2020 static int pmap_collect_inactive, pmap_collect_active;
2022 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_inactive, CTLFLAG_RD, &pmap_collect_inactive, 0,
2023 "Current number times pmap_collect called on inactive queue");
2024 SYSCTL_INT(_vm_pmap, OID_AUTO, pmap_collect_active, CTLFLAG_RD, &pmap_collect_active, 0,
2025 "Current number times pmap_collect called on active queue");
2029 * We are in a serious low memory condition. Resort to
2030 * drastic measures to free some pages so we can allocate
2031 * another pv entry chunk. This is normally called to
2032 * unmap inactive pages, and if necessary, active pages.
2035 pmap_collect(pmap_t locked_pmap, struct vpgqueues *vpq)
2038 pt_entry_t *pte, tpte;
2039 pv_entry_t next_pv, pv;
2044 TAILQ_FOREACH(m, &vpq->pl, pageq) {
2045 if (m->hold_count || m->busy)
2047 TAILQ_FOREACH_SAFE(pv, &m->md.pv_list, pv_list, next_pv) {
2050 /* Avoid deadlock and lock recursion. */
2051 if (pmap > locked_pmap)
2053 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap))
2055 pmap->pm_stats.resident_count--;
2056 pte = pmap_pte_quick(pmap, va);
2057 tpte = pte_load_clear(pte);
2058 KASSERT((tpte & PG_W) == 0,
2059 ("pmap_collect: wired pte %#jx", (uintmax_t)tpte));
2061 vm_page_flag_set(m, PG_REFERENCED);
2063 KASSERT((tpte & PG_RW),
2064 ("pmap_collect: modified page not writable: va: %#x, pte: %#jx",
2065 va, (uintmax_t)tpte));
2069 pmap_unuse_pt(pmap, va, &free);
2070 pmap_invalidate_page(pmap, va);
2071 pmap_free_zero_pages(free);
2072 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2073 if (TAILQ_EMPTY(&m->md.pv_list))
2074 vm_page_flag_clear(m, PG_WRITEABLE);
2075 free_pv_entry(pmap, pv);
2076 if (pmap != locked_pmap)
2085 * free the pv_entry back to the free list
2088 free_pv_entry(pmap_t pmap, pv_entry_t pv)
2091 struct pv_chunk *pc;
2092 int idx, field, bit;
2094 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2095 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2096 PV_STAT(pv_entry_frees++);
2097 PV_STAT(pv_entry_spare++);
2099 pc = pv_to_chunk(pv);
2100 idx = pv - &pc->pc_pventry[0];
2103 pc->pc_map[field] |= 1ul << bit;
2104 /* move to head of list */
2105 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2106 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2107 for (idx = 0; idx < _NPCM; idx++)
2108 if (pc->pc_map[idx] != pc_freemask[idx])
2110 PV_STAT(pv_entry_spare -= _NPCPV);
2111 PV_STAT(pc_chunk_count--);
2112 PV_STAT(pc_chunk_frees++);
2113 /* entire chunk is free, return it */
2114 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2115 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
2116 pmap_qremove((vm_offset_t)pc, 1);
2117 vm_page_unwire(m, 0);
2119 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
2123 * get a new pv_entry, allocating a block from the system
2127 get_pv_entry(pmap_t pmap, int try)
2129 static const struct timeval printinterval = { 60, 0 };
2130 static struct timeval lastprint;
2131 static vm_pindex_t colour;
2132 struct vpgqueues *pq;
2135 struct pv_chunk *pc;
2138 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2139 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2140 PV_STAT(pv_entry_allocs++);
2142 if (pv_entry_count > pv_entry_high_water)
2143 if (ratecheck(&lastprint, &printinterval))
2144 printf("Approaching the limit on PV entries, consider "
2145 "increasing either the vm.pmap.shpgperproc or the "
2146 "vm.pmap.pv_entry_max tunable.\n");
2149 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
2151 for (field = 0; field < _NPCM; field++) {
2152 if (pc->pc_map[field]) {
2153 bit = bsfl(pc->pc_map[field]);
2157 if (field < _NPCM) {
2158 pv = &pc->pc_pventry[field * 32 + bit];
2159 pc->pc_map[field] &= ~(1ul << bit);
2160 /* If this was the last item, move it to tail */
2161 for (field = 0; field < _NPCM; field++)
2162 if (pc->pc_map[field] != 0) {
2163 PV_STAT(pv_entry_spare--);
2164 return (pv); /* not full, return */
2166 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2167 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
2168 PV_STAT(pv_entry_spare--);
2173 * Access to the ptelist "pv_vafree" is synchronized by the page
2174 * queues lock. If "pv_vafree" is currently non-empty, it will
2175 * remain non-empty until pmap_ptelist_alloc() completes.
2177 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, colour, (pq ==
2178 &vm_page_queues[PQ_ACTIVE] ? VM_ALLOC_SYSTEM : VM_ALLOC_NORMAL) |
2179 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
2182 PV_STAT(pc_chunk_tryfail++);
2186 * Reclaim pv entries: At first, destroy mappings to
2187 * inactive pages. After that, if a pv chunk entry
2188 * is still needed, destroy mappings to active pages.
2191 PV_STAT(pmap_collect_inactive++);
2192 pq = &vm_page_queues[PQ_INACTIVE];
2193 } else if (pq == &vm_page_queues[PQ_INACTIVE]) {
2194 PV_STAT(pmap_collect_active++);
2195 pq = &vm_page_queues[PQ_ACTIVE];
2197 panic("get_pv_entry: increase vm.pmap.shpgperproc");
2198 pmap_collect(pmap, pq);
2201 PV_STAT(pc_chunk_count++);
2202 PV_STAT(pc_chunk_allocs++);
2204 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
2205 pmap_qenter((vm_offset_t)pc, &m, 1);
2206 if ((m->flags & PG_ZERO) == 0)
2209 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
2210 for (field = 1; field < _NPCM; field++)
2211 pc->pc_map[field] = pc_freemask[field];
2212 pv = &pc->pc_pventry[0];
2213 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
2214 PV_STAT(pv_entry_spare += _NPCPV - 1);
2219 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
2223 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2224 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2225 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2226 if (pmap == PV_PMAP(pv) && va == pv->pv_va)
2229 KASSERT(pv != NULL, ("pmap_remove_entry: pv not found"));
2230 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2231 if (TAILQ_EMPTY(&m->md.pv_list))
2232 vm_page_flag_clear(m, PG_WRITEABLE);
2233 free_pv_entry(pmap, pv);
2237 * Create a pv entry for page at pa for
2241 pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2245 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2246 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2247 pv = get_pv_entry(pmap, FALSE);
2249 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2253 * Conditionally create a pv entry.
2256 pmap_try_insert_pv_entry(pmap_t pmap, vm_offset_t va, vm_page_t m)
2260 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2261 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2262 if (pv_entry_count < pv_entry_high_water &&
2263 (pv = get_pv_entry(pmap, TRUE)) != NULL) {
2265 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2272 * pmap_remove_pte: do the things to unmap a page in a process
2275 pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t va, vm_page_t *free)
2280 CTR3(KTR_PMAP, "pmap_remove_pte: pmap=%p *ptq=0x%x va=0x%x",
2281 pmap, (u_long)*ptq, va);
2283 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2284 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2286 PT_SET_VA_MA(ptq, 0, TRUE);
2288 pmap->pm_stats.wired_count -= 1;
2290 * Machines that don't support invlpg, also don't support
2294 pmap_invalidate_page(kernel_pmap, va);
2295 pmap->pm_stats.resident_count -= 1;
2296 if (oldpte & PG_MANAGED) {
2297 m = PHYS_TO_VM_PAGE(xpmap_mtop(oldpte) & PG_FRAME);
2298 if (oldpte & PG_M) {
2299 KASSERT((oldpte & PG_RW),
2300 ("pmap_remove_pte: modified page not writable: va: %#x, pte: %#jx",
2301 va, (uintmax_t)oldpte));
2305 vm_page_flag_set(m, PG_REFERENCED);
2306 pmap_remove_entry(pmap, m, va);
2308 return (pmap_unuse_pt(pmap, va, free));
2312 * Remove a single page from a process address space
2315 pmap_remove_page(pmap_t pmap, vm_offset_t va, vm_page_t *free)
2319 CTR2(KTR_PMAP, "pmap_remove_page: pmap=%p va=0x%x",
2322 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2323 KASSERT(curthread->td_pinned > 0, ("curthread not pinned"));
2324 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2325 if ((pte = pmap_pte_quick(pmap, va)) == NULL || (*pte & PG_V) == 0)
2327 pmap_remove_pte(pmap, pte, va, free);
2328 pmap_invalidate_page(pmap, va);
2330 PT_SET_MA(PADDR1, 0);
2335 * Remove the given range of addresses from the specified map.
2337 * It is assumed that the start and end are properly
2338 * rounded to the page size.
2341 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
2346 vm_page_t free = NULL;
2349 CTR3(KTR_PMAP, "pmap_remove: pmap=%p sva=0x%x eva=0x%x",
2353 * Perform an unsynchronized read. This is, however, safe.
2355 if (pmap->pm_stats.resident_count == 0)
2360 vm_page_lock_queues();
2365 * special handling of removing one page. a very
2366 * common operation and easy to short circuit some
2369 if ((sva + PAGE_SIZE == eva) &&
2370 ((pmap->pm_pdir[(sva >> PDRSHIFT)] & PG_PS) == 0)) {
2371 pmap_remove_page(pmap, sva, &free);
2375 for (; sva < eva; sva = pdnxt) {
2379 * Calculate index for next page table.
2381 pdnxt = (sva + NBPDR) & ~PDRMASK;
2382 if (pmap->pm_stats.resident_count == 0)
2385 pdirindex = sva >> PDRSHIFT;
2386 ptpaddr = pmap->pm_pdir[pdirindex];
2389 * Weed out invalid mappings. Note: we assume that the page
2390 * directory table is always allocated, and in kernel virtual.
2396 * Check for large page.
2398 if ((ptpaddr & PG_PS) != 0) {
2399 PD_CLEAR_VA(pmap, pdirindex, TRUE);
2400 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2406 * Limit our scan to either the end of the va represented
2407 * by the current page table page, or to the end of the
2408 * range being removed.
2413 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2415 if ((*pte & PG_V) == 0)
2419 * The TLB entry for a PG_G mapping is invalidated
2420 * by pmap_remove_pte().
2422 if ((*pte & PG_G) == 0)
2424 if (pmap_remove_pte(pmap, pte, sva, &free))
2430 PT_SET_VA_MA(PMAP1, 0, TRUE);
2433 pmap_invalidate_all(pmap);
2435 vm_page_unlock_queues();
2437 pmap_free_zero_pages(free);
2441 * Routine: pmap_remove_all
2443 * Removes this physical page from
2444 * all physical maps in which it resides.
2445 * Reflects back modify bits to the pager.
2448 * Original versions of this routine were very
2449 * inefficient because they iteratively called
2450 * pmap_remove (slow...)
2454 pmap_remove_all(vm_page_t m)
2458 pt_entry_t *pte, tpte;
2461 #if defined(PMAP_DIAGNOSTIC)
2463 * XXX This makes pmap_remove_all() illegal for non-managed pages!
2465 if (m->flags & PG_FICTITIOUS) {
2466 panic("pmap_remove_all: illegal for unmanaged page, va: 0x%jx",
2467 VM_PAGE_TO_PHYS(m) & 0xffffffff);
2470 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2472 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2475 pmap->pm_stats.resident_count--;
2476 pte = pmap_pte_quick(pmap, pv->pv_va);
2479 PT_SET_VA_MA(pte, 0, TRUE);
2481 pmap->pm_stats.wired_count--;
2483 vm_page_flag_set(m, PG_REFERENCED);
2486 * Update the vm_page_t clean and reference bits.
2489 KASSERT((tpte & PG_RW),
2490 ("pmap_remove_all: modified page not writable: va: %#x, pte: %#jx",
2491 pv->pv_va, (uintmax_t)tpte));
2495 pmap_unuse_pt(pmap, pv->pv_va, &free);
2496 pmap_invalidate_page(pmap, pv->pv_va);
2497 pmap_free_zero_pages(free);
2498 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2499 free_pv_entry(pmap, pv);
2502 vm_page_flag_clear(m, PG_WRITEABLE);
2505 PT_SET_MA(PADDR1, 0);
2510 * Set the physical protection on the
2511 * specified range of this map as requested.
2514 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2521 CTR4(KTR_PMAP, "pmap_protect: pmap=%p sva=0x%x eva=0x%x prot=0x%x",
2522 pmap, sva, eva, prot);
2524 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2525 pmap_remove(pmap, sva, eva);
2530 if ((prot & (VM_PROT_WRITE|VM_PROT_EXECUTE)) ==
2531 (VM_PROT_WRITE|VM_PROT_EXECUTE))
2534 if (prot & VM_PROT_WRITE)
2540 vm_page_lock_queues();
2543 for (; sva < eva; sva = pdnxt) {
2544 pt_entry_t obits, pbits;
2547 pdnxt = (sva + NBPDR) & ~PDRMASK;
2549 pdirindex = sva >> PDRSHIFT;
2550 ptpaddr = pmap->pm_pdir[pdirindex];
2553 * Weed out invalid mappings. Note: we assume that the page
2554 * directory table is always allocated, and in kernel virtual.
2560 * Check for large page.
2562 if ((ptpaddr & PG_PS) != 0) {
2563 if ((prot & VM_PROT_WRITE) == 0)
2564 pmap->pm_pdir[pdirindex] &= ~(PG_M|PG_RW);
2566 if ((prot & VM_PROT_EXECUTE) == 0)
2567 pmap->pm_pdir[pdirindex] |= pg_nx;
2576 for (pte = pmap_pte_quick(pmap, sva); sva != pdnxt; pte++,
2582 * Regardless of whether a pte is 32 or 64 bits in
2583 * size, PG_RW, PG_A, and PG_M are among the least
2584 * significant 32 bits.
2586 obits = pbits = *pte;
2587 if ((pbits & PG_V) == 0)
2589 if (pbits & PG_MANAGED) {
2592 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME);
2593 vm_page_flag_set(m, PG_REFERENCED);
2596 if ((pbits & PG_M) != 0) {
2598 m = PHYS_TO_VM_PAGE(xpmap_mtop(pbits) & PG_FRAME);
2603 if ((prot & VM_PROT_WRITE) == 0)
2604 pbits &= ~(PG_RW | PG_M);
2606 if ((prot & VM_PROT_EXECUTE) == 0)
2610 if (pbits != obits) {
2613 PT_SET_VA_MA(pte, pbits, TRUE);
2618 if (!atomic_cmpset_64(pte, obits, pbits))
2621 if (!atomic_cmpset_int((u_int *)pte, obits,
2627 pmap_invalidate_page(pmap, sva);
2635 PT_SET_VA_MA(PMAP1, 0, TRUE);
2637 pmap_invalidate_all(pmap);
2639 vm_page_unlock_queues();
2644 * Insert the given physical page (p) at
2645 * the specified virtual address (v) in the
2646 * target physical map with the protection requested.
2648 * If specified, the page will be wired down, meaning
2649 * that the related pte can not be reclaimed.
2651 * NB: This is the only routine which MAY NOT lazy-evaluate
2652 * or lose information. That is, this routine must actually
2653 * insert this page into the given map NOW.
2656 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2657 vm_prot_t prot, boolean_t wired)
2663 pt_entry_t origpte, newpte;
2667 CTR6(KTR_PMAP, "pmap_enter: pmap=%08p va=0x%08x access=0x%x ma=0x%08x prot=0x%x wired=%d",
2668 pmap, va, access, xpmap_ptom(VM_PAGE_TO_PHYS(m)), prot, wired);
2669 va = trunc_page(va);
2670 #ifdef PMAP_DIAGNOSTIC
2671 if (va > VM_MAX_KERNEL_ADDRESS)
2672 panic("pmap_enter: toobig");
2673 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
2674 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%x)", va);
2679 vm_page_lock_queues();
2684 * In the case that a page table page is not
2685 * resident, we are creating it here.
2687 if (va < VM_MAXUSER_ADDRESS) {
2688 mpte = pmap_allocpte(pmap, va, M_WAITOK);
2690 #if 0 && defined(PMAP_DIAGNOSTIC)
2692 pd_entry_t *pdeaddr = pmap_pde(pmap, va);
2694 if ((origpte & PG_V) == 0) {
2695 panic("pmap_enter: invalid kernel page table page, pdir=%p, pde=%p, va=%p\n",
2696 pmap->pm_pdir[PTDPTDI], origpte, va);
2701 pde = pmap_pde(pmap, va);
2702 if ((*pde & PG_PS) != 0)
2703 panic("pmap_enter: attempted pmap_enter on 4MB page");
2704 pte = pmap_pte_quick(pmap, va);
2707 * Page Directory table entry not valid, we need a new PT page
2710 panic("pmap_enter: invalid page directory pdir=%#jx, va=%#x\n",
2711 (uintmax_t)pmap->pm_pdir[va >> PDRSHIFT], va);
2714 pa = VM_PAGE_TO_PHYS(m);
2719 KASSERT((*pte & PG_V) || (*pte == 0), ("address set but not valid pte=%p *pte=0x%016jx",
2724 origpte = xpmap_mtop(origpte);
2725 opa = origpte & PG_FRAME;
2728 * Mapping has not changed, must be protection or wiring change.
2730 if (origpte && (opa == pa)) {
2732 * Wiring change, just update stats. We don't worry about
2733 * wiring PT pages as they remain resident as long as there
2734 * are valid mappings in them. Hence, if a user page is wired,
2735 * the PT page will be also.
2737 if (wired && ((origpte & PG_W) == 0))
2738 pmap->pm_stats.wired_count++;
2739 else if (!wired && (origpte & PG_W))
2740 pmap->pm_stats.wired_count--;
2743 * Remove extra pte reference
2749 * We might be turning off write access to the page,
2750 * so we go ahead and sense modify status.
2752 if (origpte & PG_MANAGED) {
2759 * Mapping has changed, invalidate old range and fall through to
2760 * handle validating new mapping.
2764 pmap->pm_stats.wired_count--;
2765 if (origpte & PG_MANAGED) {
2766 om = PHYS_TO_VM_PAGE(opa);
2767 pmap_remove_entry(pmap, om, va);
2768 } else if (va < VM_MAXUSER_ADDRESS)
2769 printf("va=0x%x is unmanaged :-( \n", va);
2773 KASSERT(mpte->wire_count > 0,
2774 ("pmap_enter: missing reference to page table page,"
2778 pmap->pm_stats.resident_count++;
2781 * Enter on the PV list if part of our managed memory.
2783 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0) {
2784 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
2785 ("pmap_enter: managed mapping within the clean submap"));
2786 pmap_insert_entry(pmap, va, m);
2791 * Increment counters
2794 pmap->pm_stats.wired_count++;
2798 * Now validate mapping with desired protection/wiring.
2800 newpte = (pt_entry_t)(pa | PG_V);
2801 if ((prot & VM_PROT_WRITE) != 0) {
2803 vm_page_flag_set(m, PG_WRITEABLE);
2806 if ((prot & VM_PROT_EXECUTE) == 0)
2811 if (va < VM_MAXUSER_ADDRESS)
2813 if (pmap == kernel_pmap)
2818 * if the mapping or permission bits are different, we need
2819 * to update the pte.
2821 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2825 PT_SET_VA(pte, newpte | PG_A, FALSE);
2826 if (origpte & PG_A) {
2827 if (origpte & PG_MANAGED)
2828 vm_page_flag_set(om, PG_REFERENCED);
2829 if (opa != VM_PAGE_TO_PHYS(m))
2832 if ((origpte & PG_NX) == 0 &&
2833 (newpte & PG_NX) != 0)
2837 if (origpte & PG_M) {
2838 KASSERT((origpte & PG_RW),
2839 ("pmap_enter: modified page not writable: va: %#x, pte: %#jx",
2840 va, (uintmax_t)origpte));
2841 if ((origpte & PG_MANAGED) != 0)
2843 if ((prot & VM_PROT_WRITE) == 0)
2847 pmap_invalidate_page(pmap, va);
2849 PT_SET_VA(pte, newpte | PG_A, FALSE);
2856 PT_SET_VA_MA(PMAP1, 0, TRUE);
2858 vm_page_unlock_queues();
2863 * Maps a sequence of resident pages belonging to the same object.
2864 * The sequence begins with the given page m_start. This page is
2865 * mapped at the given virtual address start. Each subsequent page is
2866 * mapped at a virtual address that is offset from start by the same
2867 * amount as the page is offset from m_start within the object. The
2868 * last page in the sequence is the page with the largest offset from
2869 * m_start that can be mapped at a virtual address less than the given
2870 * virtual address end. Not every virtual page between start and end
2871 * is mapped; only those for which a resident page exists with the
2872 * corresponding offset from m_start are mapped.
2875 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2876 vm_page_t m_start, vm_prot_t prot)
2879 vm_pindex_t diff, psize;
2880 multicall_entry_t mcl[16];
2881 multicall_entry_t *mclp = mcl;
2882 int error, count = 0;
2884 VM_OBJECT_LOCK_ASSERT(m_start->object, MA_OWNED);
2885 psize = atop(end - start);
2890 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2891 mpte = pmap_enter_quick_locked(&mclp, &count, pmap, start + ptoa(diff), m,
2893 m = TAILQ_NEXT(m, listq);
2895 error = HYPERVISOR_multicall(mcl, count);
2896 KASSERT(error == 0, ("bad multicall %d", error));
2902 error = HYPERVISOR_multicall(mcl, count);
2903 KASSERT(error == 0, ("bad multicall %d", error));
2910 * this code makes some *MAJOR* assumptions:
2911 * 1. Current pmap & pmap exists.
2914 * 4. No page table pages.
2915 * but is *MUCH* faster than pmap_enter...
2919 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2921 multicall_entry_t mcl, *mclp;
2925 CTR4(KTR_PMAP, "pmap_enter_quick: pmap=%p va=0x%x m=%p prot=0x%x",
2929 (void) pmap_enter_quick_locked(&mclp, &count, pmap, va, m, prot, NULL);
2931 HYPERVISOR_multicall(&mcl, count);
2937 pmap_enter_quick_range(pmap_t pmap, vm_offset_t *addrs, vm_page_t *pages, vm_prot_t *prots, int count)
2939 int i, error, index = 0;
2940 multicall_entry_t mcl[16];
2941 multicall_entry_t *mclp = mcl;
2944 for (i = 0; i < count; i++, addrs++, pages++, prots++) {
2945 if (!pmap_is_prefaultable_locked(pmap, *addrs))
2948 (void) pmap_enter_quick_locked(&mclp, &index, pmap, *addrs, *pages, *prots, NULL);
2950 error = HYPERVISOR_multicall(mcl, index);
2953 KASSERT(error == 0, ("bad multicall %d", error));
2957 error = HYPERVISOR_multicall(mcl, index);
2958 KASSERT(error == 0, ("bad multicall %d", error));
2966 pmap_enter_quick_locked(multicall_entry_t **mclpp, int *count, pmap_t pmap, vm_offset_t va, vm_page_t m,
2967 vm_prot_t prot, vm_page_t mpte)
2972 multicall_entry_t *mcl = *mclpp;
2974 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2975 (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0,
2976 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2977 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
2978 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2981 * In the case that a page table page is not
2982 * resident, we are creating it here.
2984 if (va < VM_MAXUSER_ADDRESS) {
2989 * Calculate pagetable page index
2991 ptepindex = va >> PDRSHIFT;
2992 if (mpte && (mpte->pindex == ptepindex)) {
2996 * Get the page directory entry
2998 ptema = pmap->pm_pdir[ptepindex];
3001 * If the page table page is mapped, we just increment
3002 * the hold count, and activate it.
3006 panic("pmap_enter_quick: unexpected mapping into 4MB page");
3007 mpte = PHYS_TO_VM_PAGE(xpmap_mtop(ptema) & PG_FRAME);
3010 mpte = _pmap_allocpte(pmap, ptepindex,
3021 * This call to vtopte makes the assumption that we are
3022 * entering the page into the current pmap. In order to support
3023 * quick entry into any pmap, one would likely use pmap_pte_quick.
3024 * But that isn't as quick as vtopte.
3026 KASSERT(pmap_is_current(pmap), ("entering pages in non-current pmap"));
3037 * Enter on the PV list if part of our managed memory.
3039 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) == 0 &&
3040 !pmap_try_insert_pv_entry(pmap, va, m)) {
3043 if (pmap_unwire_pte_hold(pmap, mpte, &free)) {
3044 pmap_invalidate_page(pmap, va);
3045 pmap_free_zero_pages(free);
3054 * Increment counters
3056 pmap->pm_stats.resident_count++;
3058 pa = VM_PAGE_TO_PHYS(m);
3060 if ((prot & VM_PROT_EXECUTE) == 0)
3066 * Now validate mapping with RO protection
3068 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
3069 pte_store(pte, pa | PG_V | PG_U);
3071 pte_store(pte, pa | PG_V | PG_U | PG_MANAGED);
3074 * Now validate mapping with RO protection
3076 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
3077 pa = xpmap_ptom(pa | PG_V | PG_U);
3079 pa = xpmap_ptom(pa | PG_V | PG_U | PG_MANAGED);
3081 mcl->op = __HYPERVISOR_update_va_mapping;
3083 mcl->args[1] = (uint32_t)(pa & 0xffffffff);
3084 mcl->args[2] = (uint32_t)(pa >> 32);
3087 *count = *count + 1;
3093 * Make a temporary mapping for a physical address. This is only intended
3094 * to be used for panic dumps.
3097 pmap_kenter_temporary(vm_paddr_t pa, int i)
3101 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
3102 PT_SET_MA(va, (pa & ~PAGE_MASK) | PG_V | pgeflag);
3104 return ((void *)crashdumpmap);
3108 * This code maps large physical mmap regions into the
3109 * processor address space. Note that some shortcuts
3110 * are taken, but the code works.
3113 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
3114 vm_object_t object, vm_pindex_t pindex,
3119 VM_OBJECT_LOCK_ASSERT(object, MA_OWNED);
3120 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
3121 ("pmap_object_init_pt: non-device object"));
3123 ((addr & (NBPDR - 1)) == 0) && ((size & (NBPDR - 1)) == 0)) {
3126 unsigned int ptepindex;
3131 if (pmap->pm_pdir[ptepindex = (addr >> PDRSHIFT)])
3135 p = vm_page_lookup(object, pindex);
3137 if (vm_page_sleep_if_busy(p, FALSE, "init4p"))
3140 p = vm_page_alloc(object, pindex, VM_ALLOC_NORMAL);
3145 if (vm_pager_get_pages(object, m, 1, 0) != VM_PAGER_OK) {
3146 vm_page_lock_queues();
3148 vm_page_unlock_queues();
3152 p = vm_page_lookup(object, pindex);
3156 ptepa = VM_PAGE_TO_PHYS(p);
3157 if (ptepa & (NBPDR - 1))
3160 p->valid = VM_PAGE_BITS_ALL;
3163 pmap->pm_stats.resident_count += size >> PAGE_SHIFT;
3164 npdes = size >> PDRSHIFT;
3166 for(i = 0; i < npdes; i++) {
3167 PD_SET_VA(pmap, ptepindex,
3168 ptepa | PG_U | PG_M | PG_RW | PG_V | PG_PS, FALSE);
3172 pmap_invalidate_all(pmap);
3180 * Routine: pmap_change_wiring
3181 * Function: Change the wiring attribute for a map/virtual-address
3183 * In/out conditions:
3184 * The mapping must already exist in the pmap.
3187 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3191 vm_page_lock_queues();
3193 pte = pmap_pte(pmap, va);
3195 if (wired && !pmap_pte_w(pte)) {
3196 PT_SET_VA_MA((pte), *(pte) | PG_W, TRUE);
3197 pmap->pm_stats.wired_count++;
3198 } else if (!wired && pmap_pte_w(pte)) {
3199 PT_SET_VA_MA((pte), *(pte) & ~PG_W, TRUE);
3200 pmap->pm_stats.wired_count--;
3204 * Wiring is not a hardware characteristic so there is no need to
3207 pmap_pte_release(pte);
3209 vm_page_unlock_queues();
3215 * Copy the range specified by src_addr/len
3216 * from the source map to the range dst_addr/len
3217 * in the destination map.
3219 * This routine is only advisory and need not do anything.
3223 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len,
3224 vm_offset_t src_addr)
3228 vm_offset_t end_addr = src_addr + len;
3231 if (dst_addr != src_addr)
3234 if (!pmap_is_current(src_pmap)) {
3236 "pmap_copy, skipping: pdir[PTDPTDI]=0x%jx PTDpde[0]=0x%jx",
3237 (src_pmap->pm_pdir[PTDPTDI] & PG_FRAME), (PTDpde[0] & PG_FRAME));
3241 CTR5(KTR_PMAP, "pmap_copy: dst_pmap=%p src_pmap=%p dst_addr=0x%x len=%d src_addr=0x%x",
3242 dst_pmap, src_pmap, dst_addr, len, src_addr);
3244 vm_page_lock_queues();
3245 if (dst_pmap < src_pmap) {
3246 PMAP_LOCK(dst_pmap);
3247 PMAP_LOCK(src_pmap);
3249 PMAP_LOCK(src_pmap);
3250 PMAP_LOCK(dst_pmap);
3253 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3254 pt_entry_t *src_pte, *dst_pte;
3255 vm_page_t dstmpte, srcmpte;
3256 pd_entry_t srcptepaddr;
3259 if (addr >= UPT_MIN_ADDRESS)
3260 panic("pmap_copy: invalid to pmap_copy page tables");
3262 pdnxt = (addr + NBPDR) & ~PDRMASK;
3263 ptepindex = addr >> PDRSHIFT;
3265 srcptepaddr = PT_GET(&src_pmap->pm_pdir[ptepindex]);
3266 if (srcptepaddr == 0)
3269 if (srcptepaddr & PG_PS) {
3270 if (dst_pmap->pm_pdir[ptepindex] == 0) {
3271 PD_SET_VA(dst_pmap, ptepindex, srcptepaddr & ~PG_W, TRUE);
3272 dst_pmap->pm_stats.resident_count +=
3278 srcmpte = PHYS_TO_VM_PAGE(srcptepaddr & PG_FRAME);
3279 if (srcmpte->wire_count == 0)
3280 panic("pmap_copy: source page table page is unused");
3282 if (pdnxt > end_addr)
3285 src_pte = vtopte(addr);
3286 while (addr < pdnxt) {
3290 * we only virtual copy managed pages
3292 if ((ptetemp & PG_MANAGED) != 0) {
3293 dstmpte = pmap_allocpte(dst_pmap, addr,
3295 if (dstmpte == NULL)
3297 dst_pte = pmap_pte_quick(dst_pmap, addr);
3298 if (*dst_pte == 0 &&
3299 pmap_try_insert_pv_entry(dst_pmap, addr,
3300 PHYS_TO_VM_PAGE(xpmap_mtop(ptetemp) & PG_FRAME))) {
3302 * Clear the wired, modified, and
3303 * accessed (referenced) bits
3306 KASSERT(ptetemp != 0, ("src_pte not set"));
3307 PT_SET_VA_MA(dst_pte, ptetemp & ~(PG_W | PG_M | PG_A), TRUE /* XXX debug */);
3308 KASSERT(*dst_pte == (ptetemp & ~(PG_W | PG_M | PG_A)),
3309 ("no pmap copy expected: 0x%jx saw: 0x%jx",
3310 ptetemp & ~(PG_W | PG_M | PG_A), *dst_pte));
3311 dst_pmap->pm_stats.resident_count++;
3314 if (pmap_unwire_pte_hold(dst_pmap,
3316 pmap_invalidate_page(dst_pmap,
3318 pmap_free_zero_pages(free);
3321 if (dstmpte->wire_count >= srcmpte->wire_count)
3330 vm_page_unlock_queues();
3331 PMAP_UNLOCK(src_pmap);
3332 PMAP_UNLOCK(dst_pmap);
3335 static __inline void
3336 pagezero(void *page)
3338 #if defined(I686_CPU)
3339 if (cpu_class == CPUCLASS_686) {
3340 #if defined(CPU_ENABLE_SSE)
3341 if (cpu_feature & CPUID_SSE2)
3342 sse2_pagezero(page);
3345 i686_pagezero(page);
3348 bzero(page, PAGE_SIZE);
3352 * pmap_zero_page zeros the specified hardware page by mapping
3353 * the page into KVM and using bzero to clear its contents.
3356 pmap_zero_page(vm_page_t m)
3358 struct sysmaps *sysmaps;
3360 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3361 mtx_lock(&sysmaps->lock);
3362 if (*sysmaps->CMAP2)
3363 panic("pmap_zero_page: CMAP2 busy");
3365 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M);
3366 pagezero(sysmaps->CADDR2);
3367 PT_SET_MA(sysmaps->CADDR2, 0);
3369 mtx_unlock(&sysmaps->lock);
3373 * pmap_zero_page_area zeros the specified hardware page by mapping
3374 * the page into KVM and using bzero to clear its contents.
3376 * off and size may not cover an area beyond a single hardware page.
3379 pmap_zero_page_area(vm_page_t m, int off, int size)
3381 struct sysmaps *sysmaps;
3383 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3384 mtx_lock(&sysmaps->lock);
3385 if (*sysmaps->CMAP2)
3386 panic("pmap_zero_page: CMAP2 busy");
3388 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M);
3390 if (off == 0 && size == PAGE_SIZE)
3391 pagezero(sysmaps->CADDR2);
3393 bzero((char *)sysmaps->CADDR2 + off, size);
3394 PT_SET_MA(sysmaps->CADDR2, 0);
3396 mtx_unlock(&sysmaps->lock);
3400 * pmap_zero_page_idle zeros the specified hardware page by mapping
3401 * the page into KVM and using bzero to clear its contents. This
3402 * is intended to be called from the vm_pagezero process only and
3406 pmap_zero_page_idle(vm_page_t m)
3410 panic("pmap_zero_page: CMAP3 busy");
3412 PT_SET_MA(CADDR3, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M);
3414 PT_SET_MA(CADDR3, 0);
3419 * pmap_copy_page copies the specified (machine independent)
3420 * page by mapping the page into virtual memory and using
3421 * bcopy to copy the page, one machine dependent page at a
3425 pmap_copy_page(vm_page_t src, vm_page_t dst)
3427 struct sysmaps *sysmaps;
3429 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3430 mtx_lock(&sysmaps->lock);
3431 if (*sysmaps->CMAP1)
3432 panic("pmap_copy_page: CMAP1 busy");
3433 if (*sysmaps->CMAP2)
3434 panic("pmap_copy_page: CMAP2 busy");
3436 PT_SET_MA(sysmaps->CADDR1, PG_V | xpmap_ptom(VM_PAGE_TO_PHYS(src)) | PG_A);
3437 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW | xpmap_ptom(VM_PAGE_TO_PHYS(dst)) | PG_A | PG_M);
3438 bcopy(sysmaps->CADDR1, sysmaps->CADDR2, PAGE_SIZE);
3439 PT_SET_MA(sysmaps->CADDR1, 0);
3440 PT_SET_MA(sysmaps->CADDR2, 0);
3442 mtx_unlock(&sysmaps->lock);
3446 * Returns true if the pmap's pv is one of the first
3447 * 16 pvs linked to from this page. This count may
3448 * be changed upwards or downwards in the future; it
3449 * is only necessary that true be returned for a small
3450 * subset of pmaps for proper page aging.
3453 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3458 if (m->flags & PG_FICTITIOUS)
3461 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3462 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3463 if (PV_PMAP(pv) == pmap) {
3474 * pmap_page_wired_mappings:
3476 * Return the number of managed mappings to the given physical page
3480 pmap_page_wired_mappings(vm_page_t m)
3488 if ((m->flags & PG_FICTITIOUS) != 0)
3490 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3492 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3495 pte = pmap_pte_quick(pmap, pv->pv_va);
3496 if ((*pte & PG_W) != 0)
3505 * Returns TRUE if the given page is mapped individually or as part of
3506 * a 4mpage. Otherwise, returns FALSE.
3509 pmap_page_is_mapped(vm_page_t m)
3511 struct md_page *pvh;
3513 if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0)
3515 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3516 if (TAILQ_EMPTY(&m->md.pv_list)) {
3517 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
3518 return (!TAILQ_EMPTY(&pvh->pv_list));
3524 * Remove all pages from specified address space
3525 * this aids process exit speeds. Also, this code
3526 * is special cased for current process only, but
3527 * can have the more generic (and slightly slower)
3528 * mode enabled. This is much faster than pmap_remove
3529 * in the case of running down an entire address space.
3532 pmap_remove_pages(pmap_t pmap)
3534 pt_entry_t *pte, tpte;
3535 vm_page_t m, free = NULL;
3537 struct pv_chunk *pc, *npc;
3540 uint32_t inuse, bitmask;
3543 CTR1(KTR_PMAP, "pmap_remove_pages: pmap=%p", pmap);
3545 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
3546 printf("warning: pmap_remove_pages called with non-current pmap\n");
3549 vm_page_lock_queues();
3550 KASSERT(pmap_is_current(pmap), ("removing pages from non-current pmap"));
3553 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
3555 for (field = 0; field < _NPCM; field++) {
3556 inuse = (~(pc->pc_map[field])) & pc_freemask[field];
3557 while (inuse != 0) {
3559 bitmask = 1UL << bit;
3560 idx = field * 32 + bit;
3561 pv = &pc->pc_pventry[idx];
3564 pte = vtopte(pv->pv_va);
3565 tpte = *pte ? xpmap_mtop(*pte) : 0;
3569 "TPTE at %p IS ZERO @ VA %08x\n",
3575 * We cannot remove wired pages from a process' mapping at this time
3582 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
3583 KASSERT(m->phys_addr == (tpte & PG_FRAME),
3584 ("vm_page_t %p phys_addr mismatch %016jx %016jx",
3585 m, (uintmax_t)m->phys_addr,
3588 KASSERT(m < &vm_page_array[vm_page_array_size],
3589 ("pmap_remove_pages: bad tpte %#jx",
3593 PT_CLEAR_VA(pte, FALSE);
3596 * Update the vm_page_t clean/reference bits.
3601 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3602 if (TAILQ_EMPTY(&m->md.pv_list))
3603 vm_page_flag_clear(m, PG_WRITEABLE);
3605 pmap_unuse_pt(pmap, pv->pv_va, &free);
3608 PV_STAT(pv_entry_frees++);
3609 PV_STAT(pv_entry_spare++);
3611 pc->pc_map[field] |= bitmask;
3612 pmap->pm_stats.resident_count--;
3617 PV_STAT(pv_entry_spare -= _NPCPV);
3618 PV_STAT(pc_chunk_count--);
3619 PV_STAT(pc_chunk_frees++);
3620 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
3621 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
3622 pmap_qremove((vm_offset_t)pc, 1);
3623 vm_page_unwire(m, 0);
3625 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
3630 PT_SET_MA(PADDR1, 0);
3633 pmap_invalidate_all(pmap);
3634 vm_page_unlock_queues();
3636 pmap_free_zero_pages(free);
3642 * Return whether or not the specified physical page was modified
3643 * in any physical maps.
3646 pmap_is_modified(vm_page_t m)
3654 if (m->flags & PG_FICTITIOUS)
3658 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3659 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3662 pte = pmap_pte_quick(pmap, pv->pv_va);
3663 rv = (*pte & PG_M) != 0;
3669 PT_SET_MA(PADDR1, 0);
3675 * pmap_is_prefaultable:
3677 * Return whether or not the specified virtual address is elgible
3681 pmap_is_prefaultable_locked(pmap_t pmap, vm_offset_t addr)
3684 boolean_t rv = FALSE;
3688 if (pmap_is_current(pmap) && *pmap_pde(pmap, addr)) {
3696 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
3701 rv = pmap_is_prefaultable_locked(pmap, addr);
3707 pmap_map_readonly(pmap_t pmap, vm_offset_t va, int len)
3709 int i, npages = round_page(len) >> PAGE_SHIFT;
3710 for (i = 0; i < npages; i++) {
3712 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3713 vm_page_lock_queues();
3714 pte_store(pte, xpmap_mtop(*pte & ~(PG_RW|PG_M)));
3715 vm_page_unlock_queues();
3716 PMAP_MARK_PRIV(xpmap_mtop(*pte));
3717 pmap_pte_release(pte);
3722 pmap_map_readwrite(pmap_t pmap, vm_offset_t va, int len)
3724 int i, npages = round_page(len) >> PAGE_SHIFT;
3725 for (i = 0; i < npages; i++) {
3727 pte = pmap_pte(pmap, (vm_offset_t)(va + i*PAGE_SIZE));
3728 PMAP_MARK_UNPRIV(xpmap_mtop(*pte));
3729 vm_page_lock_queues();
3730 pte_store(pte, xpmap_mtop(*pte) | (PG_RW|PG_M));
3731 vm_page_unlock_queues();
3732 pmap_pte_release(pte);
3737 * Clear the write and modified bits in each of the given page's mappings.
3740 pmap_remove_write(vm_page_t m)
3744 pt_entry_t oldpte, *pte;
3746 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3747 if ((m->flags & PG_FICTITIOUS) != 0 ||
3748 (m->flags & PG_WRITEABLE) == 0)
3751 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3754 pte = pmap_pte_quick(pmap, pv->pv_va);
3757 if ((oldpte & PG_RW) != 0) {
3758 vm_paddr_t newpte = oldpte & ~(PG_RW | PG_M);
3761 * Regardless of whether a pte is 32 or 64 bits
3762 * in size, PG_RW and PG_M are among the least
3763 * significant 32 bits.
3765 PT_SET_VA_MA(pte, newpte, TRUE);
3769 if ((oldpte & PG_M) != 0)
3771 pmap_invalidate_page(pmap, pv->pv_va);
3775 vm_page_flag_clear(m, PG_WRITEABLE);
3778 PT_SET_MA(PADDR1, 0);
3783 * pmap_ts_referenced:
3785 * Return a count of reference bits for a page, clearing those bits.
3786 * It is not necessary for every reference bit to be cleared, but it
3787 * is necessary that 0 only be returned when there are truly no
3788 * reference bits set.
3790 * XXX: The exact number of bits to check and clear is a matter that
3791 * should be tested and standardized at some point in the future for
3792 * optimal aging of shared pages.
3795 pmap_ts_referenced(vm_page_t m)
3797 pv_entry_t pv, pvf, pvn;
3802 if (m->flags & PG_FICTITIOUS)
3805 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3806 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3809 pvn = TAILQ_NEXT(pv, pv_list);
3810 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3811 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3814 pte = pmap_pte_quick(pmap, pv->pv_va);
3815 if ((*pte & PG_A) != 0) {
3816 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE);
3817 pmap_invalidate_page(pmap, pv->pv_va);
3823 } while ((pv = pvn) != NULL && pv != pvf);
3827 PT_SET_MA(PADDR1, 0);
3834 * Clear the modify bits on the specified physical page.
3837 pmap_clear_modify(vm_page_t m)
3843 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3844 if ((m->flags & PG_FICTITIOUS) != 0)
3847 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3850 pte = pmap_pte_quick(pmap, pv->pv_va);
3851 if ((*pte & PG_M) != 0) {
3853 * Regardless of whether a pte is 32 or 64 bits
3854 * in size, PG_M is among the least significant
3857 PT_SET_VA_MA(pte, *pte & ~PG_M, FALSE);
3858 pmap_invalidate_page(pmap, pv->pv_va);
3866 * pmap_clear_reference:
3868 * Clear the reference bit on the specified physical page.
3871 pmap_clear_reference(vm_page_t m)
3877 mtx_assert(&vm_page_queue_mtx, MA_OWNED);
3878 if ((m->flags & PG_FICTITIOUS) != 0)
3881 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3884 pte = pmap_pte_quick(pmap, pv->pv_va);
3885 if ((*pte & PG_A) != 0) {
3887 * Regardless of whether a pte is 32 or 64 bits
3888 * in size, PG_A is among the least significant
3891 PT_SET_VA_MA(pte, *pte & ~PG_A, FALSE);
3892 pmap_invalidate_page(pmap, pv->pv_va);
3900 * Miscellaneous support routines follow
3904 * Map a set of physical memory pages into the kernel virtual
3905 * address space. Return a pointer to where it is mapped. This
3906 * routine is intended to be used for mapping device memory,
3910 pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
3912 vm_offset_t va, offset;
3915 offset = pa & PAGE_MASK;
3916 size = roundup(offset + size, PAGE_SIZE);
3919 if (pa < KERNLOAD && pa + size <= KERNLOAD)
3922 va = kmem_alloc_nofault(kernel_map, size);
3924 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
3926 for (tmpsize = 0; tmpsize < size; tmpsize += PAGE_SIZE)
3927 pmap_kenter_attr(va + tmpsize, pa + tmpsize, mode);
3928 pmap_invalidate_range(kernel_pmap, va, va + tmpsize);
3929 pmap_invalidate_cache_range(va, va + size);
3930 return ((void *)(va + offset));
3934 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
3937 return (pmap_mapdev_attr(pa, size, PAT_UNCACHEABLE));
3941 pmap_mapbios(vm_paddr_t pa, vm_size_t size)
3944 return (pmap_mapdev_attr(pa, size, PAT_WRITE_BACK));
3948 pmap_unmapdev(vm_offset_t va, vm_size_t size)
3950 vm_offset_t base, offset, tmpva;
3952 if (va >= KERNBASE && va + size <= KERNBASE + KERNLOAD)
3954 base = trunc_page(va);
3955 offset = va & PAGE_MASK;
3956 size = roundup(offset + size, PAGE_SIZE);
3958 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE)
3959 pmap_kremove(tmpva);
3960 pmap_invalidate_range(kernel_pmap, va, tmpva);
3962 kmem_free(kernel_map, base, size);
3966 * Sets the memory attribute for the specified page.
3969 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
3971 struct sysmaps *sysmaps;
3972 vm_offset_t sva, eva;
3974 m->md.pat_mode = ma;
3975 if ((m->flags & PG_FICTITIOUS) != 0)
3979 * If "m" is a normal page, flush it from the cache.
3980 * See pmap_invalidate_cache_range().
3982 * First, try to find an existing mapping of the page by sf
3983 * buffer. sf_buf_invalidate_cache() modifies mapping and
3984 * flushes the cache.
3986 if (sf_buf_invalidate_cache(m))
3990 * If page is not mapped by sf buffer, but CPU does not
3991 * support self snoop, map the page transient and do
3992 * invalidation. In the worst case, whole cache is flushed by
3993 * pmap_invalidate_cache_range().
3995 if ((cpu_feature & (CPUID_SS|CPUID_CLFSH)) == CPUID_CLFSH) {
3996 sysmaps = &sysmaps_pcpu[PCPU_GET(cpuid)];
3997 mtx_lock(&sysmaps->lock);
3998 if (*sysmaps->CMAP2)
3999 panic("pmap_page_set_memattr: CMAP2 busy");
4001 PT_SET_MA(sysmaps->CADDR2, PG_V | PG_RW |
4002 xpmap_ptom(VM_PAGE_TO_PHYS(m)) | PG_A | PG_M |
4003 pmap_cache_bits(m->md.pat_mode, 0));
4004 invlcaddr(sysmaps->CADDR2);
4005 sva = (vm_offset_t)sysmaps->CADDR2;
4006 eva = sva + PAGE_SIZE;
4008 sva = eva = 0; /* gcc */
4009 pmap_invalidate_cache_range(sva, eva);
4011 PT_SET_MA(sysmaps->CADDR2, 0);
4013 mtx_unlock(&sysmaps->lock);
4018 pmap_change_attr(va, size, mode)
4023 vm_offset_t base, offset, tmpva;
4029 base = trunc_page(va);
4030 offset = va & PAGE_MASK;
4031 size = roundup(offset + size, PAGE_SIZE);
4033 /* Only supported on kernel virtual addresses. */
4034 if (base <= VM_MAXUSER_ADDRESS)
4037 /* 4MB pages and pages that aren't mapped aren't supported. */
4038 for (tmpva = base; tmpva < (base + size); tmpva += PAGE_SIZE) {
4039 pde = pmap_pde(kernel_pmap, tmpva);
4042 if ((*pde & PG_V) == 0)
4045 if ((*pte & PG_V) == 0)
4052 * Ok, all the pages exist and are 4k, so run through them updating
4055 for (tmpva = base; size > 0; ) {
4056 pte = vtopte(tmpva);
4059 * The cache mode bits are all in the low 32-bits of the
4060 * PTE, so we can just spin on updating the low 32-bits.
4063 opte = *(u_int *)pte;
4064 npte = opte & ~(PG_PTE_PAT | PG_NC_PCD | PG_NC_PWT);
4065 npte |= pmap_cache_bits(mode, 0);
4066 PT_SET_VA_MA(pte, npte, TRUE);
4067 } while (npte != opte && (*pte != npte));
4075 * Flush CPU caches to make sure any data isn't cached that shouldn't
4079 pmap_invalidate_range(kernel_pmap, base, tmpva);
4080 pmap_invalidate_cache_range(base, tmpva);
4086 * perform the pmap work for mincore
4089 pmap_mincore(pmap_t pmap, vm_offset_t addr)
4091 pt_entry_t *ptep, pte;
4096 ptep = pmap_pte(pmap, addr);
4097 pte = (ptep != NULL) ? PT_GET(ptep) : 0;
4098 pmap_pte_release(ptep);
4104 val = MINCORE_INCORE;
4105 if ((pte & PG_MANAGED) == 0)
4108 pa = pte & PG_FRAME;
4110 m = PHYS_TO_VM_PAGE(pa);
4116 val |= MINCORE_MODIFIED|MINCORE_MODIFIED_OTHER;
4119 * Modified by someone else
4121 vm_page_lock_queues();
4122 if (m->dirty || pmap_is_modified(m))
4123 val |= MINCORE_MODIFIED_OTHER;
4124 vm_page_unlock_queues();
4130 val |= MINCORE_REFERENCED|MINCORE_REFERENCED_OTHER;
4133 * Referenced by someone else
4135 vm_page_lock_queues();
4136 if ((m->flags & PG_REFERENCED) ||
4137 pmap_ts_referenced(m)) {
4138 val |= MINCORE_REFERENCED_OTHER;
4139 vm_page_flag_set(m, PG_REFERENCED);
4141 vm_page_unlock_queues();
4148 pmap_activate(struct thread *td)
4150 pmap_t pmap, oldpmap;
4154 pmap = vmspace_pmap(td->td_proc->p_vmspace);
4155 oldpmap = PCPU_GET(curpmap);
4157 atomic_clear_int(&oldpmap->pm_active, PCPU_GET(cpumask));
4158 atomic_set_int(&pmap->pm_active, PCPU_GET(cpumask));
4160 oldpmap->pm_active &= ~1;
4161 pmap->pm_active |= 1;
4164 cr3 = vtophys(pmap->pm_pdpt);
4166 cr3 = vtophys(pmap->pm_pdir);
4169 * pmap_activate is for the current thread on the current cpu
4171 td->td_pcb->pcb_cr3 = cr3;
4174 PCPU_SET(curpmap, pmap);
4179 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
4184 * Increase the starting virtual address of the given mapping if a
4185 * different alignment might result in more superpage mappings.
4188 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
4189 vm_offset_t *addr, vm_size_t size)
4191 vm_offset_t superpage_offset;
4195 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
4196 offset += ptoa(object->pg_color);
4197 superpage_offset = offset & PDRMASK;
4198 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
4199 (*addr & PDRMASK) == superpage_offset)
4201 if ((*addr & PDRMASK) < superpage_offset)
4202 *addr = (*addr & ~PDRMASK) + superpage_offset;
4204 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
4213 int i, pdir, offset;
4218 * We need to remove the recursive mapping structure from all
4219 * our pmaps so that Xen doesn't get confused when it restores
4220 * the page tables. The recursive map lives at page directory
4221 * index PTDPTDI. We assume that the suspend code has stopped
4222 * the other vcpus (if any).
4224 LIST_FOREACH(pmap, &allpmaps, pm_list) {
4225 for (i = 0; i < 4; i++) {
4227 * Figure out which page directory (L2) page
4228 * contains this bit of the recursive map and
4229 * the offset within that page of the map
4232 pdir = (PTDPTDI + i) / NPDEPG;
4233 offset = (PTDPTDI + i) % NPDEPG;
4234 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME;
4235 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t);
4238 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF);
4246 int i, pdir, offset;
4251 * Restore the recursive map that we removed on suspend.
4253 LIST_FOREACH(pmap, &allpmaps, pm_list) {
4254 for (i = 0; i < 4; i++) {
4256 * Figure out which page directory (L2) page
4257 * contains this bit of the recursive map and
4258 * the offset within that page of the map
4261 pdir = (PTDPTDI + i) / NPDEPG;
4262 offset = (PTDPTDI + i) % NPDEPG;
4263 pdirma = pmap->pm_pdpt[pdir] & PG_FRAME;
4264 mu[i].ptr = pdirma + offset * sizeof(pd_entry_t);
4265 mu[i].val = (pmap->pm_pdpt[i] & PG_FRAME) | PG_V;
4267 HYPERVISOR_mmu_update(mu, 4, NULL, DOMID_SELF);
4273 #if defined(PMAP_DEBUG)
4274 pmap_pid_dump(int pid)
4281 sx_slock(&allproc_lock);
4282 FOREACH_PROC_IN_SYSTEM(p) {
4283 if (p->p_pid != pid)
4289 pmap = vmspace_pmap(p->p_vmspace);
4290 for (i = 0; i < NPDEPTD; i++) {
4293 vm_offset_t base = i << PDRSHIFT;
4295 pde = &pmap->pm_pdir[i];
4296 if (pde && pmap_pde_v(pde)) {
4297 for (j = 0; j < NPTEPG; j++) {
4298 vm_offset_t va = base + (j << PAGE_SHIFT);
4299 if (va >= (vm_offset_t) VM_MIN_KERNEL_ADDRESS) {
4304 sx_sunlock(&allproc_lock);
4307 pte = pmap_pte(pmap, va);
4308 if (pte && pmap_pte_v(pte)) {
4312 m = PHYS_TO_VM_PAGE(pa & PG_FRAME);
4313 printf("va: 0x%x, pt: 0x%x, h: %d, w: %d, f: 0x%x",
4314 va, pa, m->hold_count, m->wire_count, m->flags);
4329 sx_sunlock(&allproc_lock);
4336 static void pads(pmap_t pm);
4337 void pmap_pvdump(vm_paddr_t pa);
4339 /* print address space of pmap*/
4347 if (pm == kernel_pmap)
4349 for (i = 0; i < NPDEPTD; i++)
4351 for (j = 0; j < NPTEPG; j++) {
4352 va = (i << PDRSHIFT) + (j << PAGE_SHIFT);
4353 if (pm == kernel_pmap && va < KERNBASE)
4355 if (pm != kernel_pmap && va > UPT_MAX_ADDRESS)
4357 ptep = pmap_pte(pm, va);
4358 if (pmap_pte_v(ptep))
4359 printf("%x:%x ", va, *ptep);
4365 pmap_pvdump(vm_paddr_t pa)
4371 printf("pa %x", pa);
4372 m = PHYS_TO_VM_PAGE(pa);
4373 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4375 printf(" -> pmap %p, va %x", (void *)pmap, pv->pv_va);