sys/arm/ti/am335x/am335x_lcd.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright 2013 Oleksandr Tymoshenko <gonzo@freebsd.org>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include "opt_syscons.h"
  33 #include <sys/param.h>
  34 #include <sys/systm.h>
  35 #include <sys/kernel.h>
  36 #include <sys/module.h>
  37 #include <sys/clock.h>
  38 #include <sys/eventhandler.h>
  39 #include <sys/time.h>
  40 #include <sys/bus.h>
  41 #include <sys/lock.h>
  42 #include <sys/mutex.h>
  43 #include <sys/resource.h>
  44 #include <sys/rman.h>
  45 #include <sys/sysctl.h>
  46 #include <vm/vm.h>
  47 #include <vm/pmap.h>
  48 #include <sys/fbio.h>
  49 #include <sys/consio.h>
  50
  51 #include <machine/bus.h>
  52
  53 #include <dev/fdt/fdt_common.h>
  54 #include <dev/ofw/openfirm.h>
  55 #include <dev/ofw/ofw_bus.h>
  56 #include <dev/ofw/ofw_bus_subr.h>
  57
  58 #include <dev/videomode/videomode.h>
  59 #include <dev/videomode/edidvar.h>
  60
  61 #include <dev/fb/fbreg.h>
  62 #ifdef DEV_SC
  63 #include <dev/syscons/syscons.h>
  64 #else /* VT */
  65 #include <dev/vt/vt.h>
  66 #endif
  67
  68 #include <arm/ti/ti_prcm.h>
  69 #include <arm/ti/ti_scm.h>
  70
  71 #include "am335x_lcd.h"
  72 #include "am335x_pwm.h"
  73
  74 #include "fb_if.h"
  75 #include "hdmi_if.h"
  76
  77 #define LCD_PID                 0x00
  78 #define LCD_CTRL                0x04
  79 #define         CTRL_DIV_MASK           0xff
  80 #define         CTRL_DIV_SHIFT          8
  81 #define         CTRL_AUTO_UFLOW_RESTART (1 << 1)
  82 #define         CTRL_RASTER_MODE        1
  83 #define         CTRL_LIDD_MODE          0
  84 #define LCD_LIDD_CTRL           0x0C
  85 #define LCD_LIDD_CS0_CONF       0x10
  86 #define LCD_LIDD_CS0_ADDR       0x14
  87 #define LCD_LIDD_CS0_DATA       0x18
  88 #define LCD_LIDD_CS1_CONF       0x1C
  89 #define LCD_LIDD_CS1_ADDR       0x20
  90 #define LCD_LIDD_CS1_DATA       0x24
  91 #define LCD_RASTER_CTRL         0x28
  92 #define         RASTER_CTRL_TFT24_UNPACKED      (1 << 26)
  93 #define         RASTER_CTRL_TFT24               (1 << 25)
  94 #define         RASTER_CTRL_STN565              (1 << 24)
  95 #define         RASTER_CTRL_TFTPMAP             (1 << 23)
  96 #define         RASTER_CTRL_NIBMODE             (1 << 22)
  97 #define         RASTER_CTRL_PALMODE_SHIFT       20
  98 #define         PALETTE_PALETTE_AND_DATA        0x00
  99 #define         PALETTE_PALETTE_ONLY            0x01
 100 #define         PALETTE_DATA_ONLY               0x02
 101 #define         RASTER_CTRL_REQDLY_SHIFT        12
 102 #define         RASTER_CTRL_MONO8B              (1 << 9)
 103 #define         RASTER_CTRL_RBORDER             (1 << 8)
 104 #define         RASTER_CTRL_LCDTFT              (1 << 7)
 105 #define         RASTER_CTRL_LCDBW               (1 << 1)
 106 #define         RASTER_CTRL_LCDEN               (1 << 0)
 107 #define LCD_RASTER_TIMING_0     0x2C
 108 #define         RASTER_TIMING_0_HBP_SHIFT       24
 109 #define         RASTER_TIMING_0_HFP_SHIFT       16
 110 #define         RASTER_TIMING_0_HSW_SHIFT       10
 111 #define         RASTER_TIMING_0_PPLLSB_SHIFT    4
 112 #define         RASTER_TIMING_0_PPLMSB_SHIFT    3
 113 #define LCD_RASTER_TIMING_1     0x30
 114 #define         RASTER_TIMING_1_VBP_SHIFT       24
 115 #define         RASTER_TIMING_1_VFP_SHIFT       16
 116 #define         RASTER_TIMING_1_VSW_SHIFT       10
 117 #define         RASTER_TIMING_1_LPP_SHIFT       0
 118 #define LCD_RASTER_TIMING_2     0x34
 119 #define         RASTER_TIMING_2_HSWHI_SHIFT     27
 120 #define         RASTER_TIMING_2_LPP_B10_SHIFT   26
 121 #define         RASTER_TIMING_2_PHSVS           (1 << 25)
 122 #define         RASTER_TIMING_2_PHSVS_RISE      (1 << 24)
 123 #define         RASTER_TIMING_2_PHSVS_FALL      (0 << 24)
 124 #define         RASTER_TIMING_2_IOE             (1 << 23)
 125 #define         RASTER_TIMING_2_IPC             (1 << 22)
 126 #define         RASTER_TIMING_2_IHS             (1 << 21)
 127 #define         RASTER_TIMING_2_IVS             (1 << 20)
 128 #define         RASTER_TIMING_2_ACBI_SHIFT      16
 129 #define         RASTER_TIMING_2_ACB_SHIFT       8
 130 #define         RASTER_TIMING_2_HBPHI_SHIFT     4
 131 #define         RASTER_TIMING_2_HFPHI_SHIFT     0
 132 #define LCD_RASTER_SUBPANEL     0x38
 133 #define LCD_RASTER_SUBPANEL2    0x3C
 134 #define LCD_LCDDMA_CTRL         0x40
 135 #define         LCDDMA_CTRL_DMA_MASTER_PRIO_SHIFT               16
 136 #define         LCDDMA_CTRL_TH_FIFO_RDY_SHIFT   8
 137 #define         LCDDMA_CTRL_BURST_SIZE_SHIFT    4
 138 #define         LCDDMA_CTRL_BYTES_SWAP          (1 << 3)
 139 #define         LCDDMA_CTRL_BE                  (1 << 1)
 140 #define         LCDDMA_CTRL_FB0_ONLY            0
 141 #define         LCDDMA_CTRL_FB0_FB1             (1 << 0)
 142 #define LCD_LCDDMA_FB0_BASE     0x44
 143 #define LCD_LCDDMA_FB0_CEILING  0x48
 144 #define LCD_LCDDMA_FB1_BASE     0x4C
 145 #define LCD_LCDDMA_FB1_CEILING  0x50
 146 #define LCD_SYSCONFIG           0x54
 147 #define         SYSCONFIG_STANDBY_FORCE         (0 << 4)
 148 #define         SYSCONFIG_STANDBY_NONE          (1 << 4)
 149 #define         SYSCONFIG_STANDBY_SMART         (2 << 4)
 150 #define         SYSCONFIG_IDLE_FORCE            (0 << 2)
 151 #define         SYSCONFIG_IDLE_NONE             (1 << 2)
 152 #define         SYSCONFIG_IDLE_SMART            (2 << 2)
 153 #define LCD_IRQSTATUS_RAW       0x58
 154 #define LCD_IRQSTATUS           0x5C
 155 #define LCD_IRQENABLE_SET       0x60
 156 #define LCD_IRQENABLE_CLEAR     0x64
 157 #define         IRQ_EOF1                (1 << 9)
 158 #define         IRQ_EOF0                (1 << 8)
 159 #define         IRQ_PL                  (1 << 6)
 160 #define         IRQ_FUF                 (1 << 5)
 161 #define         IRQ_ACB                 (1 << 3)
 162 #define         IRQ_SYNC_LOST           (1 << 2)
 163 #define         IRQ_RASTER_DONE         (1 << 1)
 164 #define         IRQ_FRAME_DONE          (1 << 0)
 165 #define LCD_END_OF_INT_IND      0x68
 166 #define LCD_CLKC_ENABLE         0x6C
 167 #define         CLKC_ENABLE_DMA         (1 << 2)
 168 #define         CLKC_ENABLE_LDID        (1 << 1)
 169 #define         CLKC_ENABLE_CORE        (1 << 0)
 170 #define LCD_CLKC_RESET          0x70
 171 #define         CLKC_RESET_MAIN         (1 << 3)
 172 #define         CLKC_RESET_DMA          (1 << 2)
 173 #define         CLKC_RESET_LDID         (1 << 1)
 174 #define         CLKC_RESET_CORE         (1 << 0)
 175
 176 #define LCD_LOCK(_sc)           mtx_lock(&(_sc)->sc_mtx)
 177 #define LCD_UNLOCK(_sc)         mtx_unlock(&(_sc)->sc_mtx)
 178 #define LCD_LOCK_INIT(_sc)      mtx_init(&(_sc)->sc_mtx, \
 179     device_get_nameunit(_sc->sc_dev), "am335x_lcd", MTX_DEF)
 180 #define LCD_LOCK_DESTROY(_sc)   mtx_destroy(&(_sc)->sc_mtx);
 181
 182 #define LCD_READ4(_sc, reg)     bus_read_4((_sc)->sc_mem_res, reg);
 183 #define LCD_WRITE4(_sc, reg, value)     \
 184     bus_write_4((_sc)->sc_mem_res, reg, value);
 185
 186 /* Backlight is controlled by eCAS interface on PWM unit 0 */
 187 #define PWM_UNIT        0
 188 #define PWM_PERIOD      100
 189
 190 #define MODE_HBP(mode)  ((mode)->htotal - (mode)->hsync_end)
 191 #define MODE_HFP(mode)  ((mode)->hsync_start - (mode)->hdisplay)
 192 #define MODE_HSW(mode)  ((mode)->hsync_end - (mode)->hsync_start)
 193 #define MODE_VBP(mode)  ((mode)->vtotal - (mode)->vsync_end)
 194 #define MODE_VFP(mode)  ((mode)->vsync_start - (mode)->vdisplay)
 195 #define MODE_VSW(mode)  ((mode)->vsync_end - (mode)->vsync_start)
 196
 197 #define MAX_PIXEL_CLOCK 126000
 198 #define MAX_BANDWIDTH   (1280*1024*60)
 199
 200 struct am335x_lcd_softc {
 201         device_t                sc_dev;
 202         struct fb_info          sc_fb_info;
 203         struct resource         *sc_mem_res;
 204         struct resource         *sc_irq_res;
 205         void                    *sc_intr_hl;
 206         struct mtx              sc_mtx;
 207         int                     sc_backlight;
 208         struct sysctl_oid       *sc_oid;
 209
 210         struct panel_info       sc_panel;
 211
 212         /* Framebuffer */
 213         bus_dma_tag_t           sc_dma_tag;
 214         bus_dmamap_t            sc_dma_map;
 215         size_t                  sc_fb_size;
 216         bus_addr_t              sc_fb_phys;
 217         uint8_t                 *sc_fb_base;
 218
 219         /* HDMI framer */
 220         phandle_t               sc_hdmi_framer;
 221         eventhandler_tag        sc_hdmi_evh;
 222 };
 223
 224 static void
 225 am335x_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
 226 {
 227         bus_addr_t *addr;
 228
 229         if (err)
 230                 return;
 231
 232         addr = (bus_addr_t*)arg;
 233         *addr = segs[0].ds_addr;
 234 }
 235
 236 static uint32_t
 237 am335x_lcd_calc_divisor(uint32_t reference, uint32_t freq)
 238 {
 239         uint32_t div, i;
 240         uint32_t delta, min_delta;
 241
 242         min_delta = freq;
 243         div = 255;
 244
 245         /* Raster mode case: divisors are in range from 2 to 255 */
 246         for (i = 2; i < 255; i++) {
 247                 delta = abs(reference/i - freq);
 248                 if (delta < min_delta) {
 249                         div = i;
 250                         min_delta = delta;
 251                 }
 252         }
 253
 254         return (div);
 255 }
 256
 257 static int
 258 am335x_lcd_sysctl_backlight(SYSCTL_HANDLER_ARGS)
 259 {
 260         struct am335x_lcd_softc *sc = (struct am335x_lcd_softc*)arg1;
 261         int error;
 262         int backlight;
 263
 264         backlight = sc->sc_backlight;
 265         error = sysctl_handle_int(oidp, &backlight, 0, req);
 266
 267         if (error != 0 || req->newptr == NULL)
 268                 return (error);
 269
 270         if (backlight < 0)
 271                 backlight = 0;
 272         if (backlight > 100)
 273                 backlight = 100;
 274
 275         LCD_LOCK(sc);
 276         error = am335x_pwm_config_ecap(PWM_UNIT, PWM_PERIOD,
 277             backlight*PWM_PERIOD/100);
 278         if (error == 0)
 279                 sc->sc_backlight = backlight;
 280         LCD_UNLOCK(sc);
 281
 282         return (error);
 283 }
 284
 285 static uint32_t
 286 am335x_mode_vrefresh(const struct videomode *mode)
 287 {
 288         uint32_t refresh;
 289
 290         /* Calculate vertical refresh rate */
 291         refresh = (mode->dot_clock * 1000 / mode->htotal);
 292         refresh = (refresh + mode->vtotal / 2) / mode->vtotal;
 293
 294         if (mode->flags & VID_INTERLACE)
 295                 refresh *= 2;
 296         if (mode->flags & VID_DBLSCAN)
 297                 refresh /= 2;
 298
 299         return refresh;
 300 }
 301
 302 static int
 303 am335x_mode_is_valid(const struct videomode *mode)
 304 {
 305         uint32_t hbp, hfp, hsw;
 306         uint32_t vbp, vfp, vsw;
 307
 308         if (mode->dot_clock > MAX_PIXEL_CLOCK)
 309                 return (0);
 310
 311         if (mode->hdisplay & 0xf)
 312                 return (0);
 313
 314         if (mode->vdisplay > 2048)
 315                 return (0);
 316
 317         /* Check ranges for timing parameters */
 318         hbp = MODE_HBP(mode) - 1;
 319         hfp = MODE_HFP(mode) - 1;
 320         hsw = MODE_HSW(mode) - 1;
 321         vbp = MODE_VBP(mode);
 322         vfp = MODE_VFP(mode);
 323         vsw = MODE_VSW(mode) - 1;
 324
 325         if (hbp > 0x3ff)
 326                 return (0);
 327         if (hfp > 0x3ff)
 328                 return (0);
 329         if (hsw > 0x3ff)
 330                 return (0);
 331
 332         if (vbp > 0xff)
 333                 return (0);
 334         if (vfp > 0xff)
 335                 return (0);
 336         if (vsw > 0x3f)
 337                 return (0);
 338         if (mode->vdisplay*mode->hdisplay*am335x_mode_vrefresh(mode)
 339             > MAX_BANDWIDTH)
 340                 return (0);
 341
 342         return (1);
 343 }
 344
 345 static void
 346 am335x_read_hdmi_property(device_t dev)
 347 {
 348         phandle_t node, xref;
 349         phandle_t endpoint;
 350         phandle_t hdmi_xref;
 351         struct am335x_lcd_softc *sc;
 352
 353         sc = device_get_softc(dev);
 354         node = ofw_bus_get_node(dev);
 355         sc->sc_hdmi_framer = 0;
 356
 357         /*
 358          * Old FreeBSD way of referencing to HDMI framer
 359          */
 360         if (OF_getencprop(node, "hdmi", &hdmi_xref, sizeof(hdmi_xref)) != -1) {
 361                 sc->sc_hdmi_framer = hdmi_xref;
 362                 return;
 363         }
 364
 365         /*
 366          * Use bindings described in Linux docs:
 367          * bindings/media/video-interfaces.txt
 368          * We assume that the only endpoint in LCDC node
 369          * is HDMI framer.
 370          */
 371         node = ofw_bus_find_child(node, "port");
 372
 373         /* No media bindings */
 374         if (node == 0)
 375                 return;
 376
 377         for (endpoint = OF_child(node); endpoint != 0; endpoint = OF_peer(endpoint)) {
 378                 if (OF_getencprop(endpoint, "remote-endpoint", &xref, sizeof(xref)) != -1) {
 379                         /* port/port@0/endpoint@0 */
 380                         node = OF_node_from_xref(xref);
 381                         /* port/port@0 */
 382                         node = OF_parent(node);
 383                         /* port */
 384                         node = OF_parent(node);
 385                         /* actual owner of port, in our case HDMI framer */
 386                         sc->sc_hdmi_framer = OF_xref_from_node(OF_parent(node));
 387                         if (sc->sc_hdmi_framer != 0)
 388                                 return;
 389                 }
 390         }
 391 }
 392
 393 static int
 394 am335x_read_property(device_t dev, phandle_t node, const char *name, uint32_t *val)
 395 {
 396         pcell_t cell;
 397
 398         if ((OF_getencprop(node, name, &cell, sizeof(cell))) <= 0) {
 399                 device_printf(dev, "missing '%s' attribute in LCD panel info\n",
 400                     name);
 401                 return (ENXIO);
 402         }
 403
 404         *val = cell;
 405
 406         return (0);
 407 }
 408
 409 static int
 410 am335x_read_timing(device_t dev, phandle_t node, struct panel_info *panel)
 411 {
 412         int error;
 413         phandle_t timings_node, timing_node, native;
 414
 415         timings_node = ofw_bus_find_child(node, "display-timings");
 416         if (timings_node == 0) {
 417                 device_printf(dev, "no \"display-timings\" node\n");
 418                 return (-1);
 419         }
 420
 421         if (OF_searchencprop(timings_node, "native-mode", &native,
 422             sizeof(native)) == -1) {
 423                 device_printf(dev, "no \"native-mode\" reference in \"timings\" node\n");
 424                 return (-1);
 425         }
 426
 427         timing_node = OF_node_from_xref(native);
 428
 429         error = 0;
 430         if ((error = am335x_read_property(dev, timing_node,
 431             "hactive", &panel->panel_width)))
 432                 goto out;
 433
 434         if ((error = am335x_read_property(dev, timing_node,
 435             "vactive", &panel->panel_height)))
 436                 goto out;
 437
 438         if ((error = am335x_read_property(dev, timing_node,
 439             "hfront-porch", &panel->panel_hfp)))
 440                 goto out;
 441
 442         if ((error = am335x_read_property(dev, timing_node,
 443             "hback-porch", &panel->panel_hbp)))
 444                 goto out;
 445
 446         if ((error = am335x_read_property(dev, timing_node,
 447             "hsync-len", &panel->panel_hsw)))
 448                 goto out;
 449
 450         if ((error = am335x_read_property(dev, timing_node,
 451             "vfront-porch", &panel->panel_vfp)))
 452                 goto out;
 453
 454         if ((error = am335x_read_property(dev, timing_node,
 455             "vback-porch", &panel->panel_vbp)))
 456                 goto out;
 457
 458         if ((error = am335x_read_property(dev, timing_node,
 459             "vsync-len", &panel->panel_vsw)))
 460                 goto out;
 461
 462         if ((error = am335x_read_property(dev, timing_node,
 463             "clock-frequency", &panel->panel_pxl_clk)))
 464                 goto out;
 465
 466         if ((error = am335x_read_property(dev, timing_node,
 467             "pixelclk-active", &panel->pixelclk_active)))
 468                 goto out;
 469
 470         if ((error = am335x_read_property(dev, timing_node,
 471             "hsync-active", &panel->hsync_active)))
 472                 goto out;
 473
 474         if ((error = am335x_read_property(dev, timing_node,
 475             "vsync-active", &panel->vsync_active)))
 476                 goto out;
 477
 478 out:
 479         return (error);
 480 }
 481
 482 static int
 483 am335x_read_panel_info(device_t dev, phandle_t node, struct panel_info *panel)
 484 {
 485         phandle_t panel_info_node;
 486
 487         panel_info_node = ofw_bus_find_child(node, "panel-info");
 488         if (panel_info_node == 0)
 489                 return (-1);
 490
 491         am335x_read_property(dev, panel_info_node,
 492             "ac-bias", &panel->ac_bias);
 493
 494         am335x_read_property(dev, panel_info_node,
 495             "ac-bias-intrpt", &panel->ac_bias_intrpt);
 496
 497         am335x_read_property(dev, panel_info_node,
 498             "dma-burst-sz", &panel->dma_burst_sz);
 499
 500         am335x_read_property(dev, panel_info_node,
 501             "bpp", &panel->bpp);
 502
 503         am335x_read_property(dev, panel_info_node,
 504             "fdd", &panel->fdd);
 505
 506         am335x_read_property(dev, panel_info_node,
 507             "sync-edge", &panel->sync_edge);
 508
 509         am335x_read_property(dev, panel_info_node,
 510             "sync-ctrl", &panel->sync_ctrl);
 511
 512         return (0);
 513 }
 514
 515 static void
 516 am335x_lcd_intr(void *arg)
 517 {
 518         struct am335x_lcd_softc *sc = arg;
 519         uint32_t reg;
 520
 521         reg = LCD_READ4(sc, LCD_IRQSTATUS);
 522         LCD_WRITE4(sc, LCD_IRQSTATUS, reg);
 523         /* Read value back to make sure it reached the hardware */
 524         reg = LCD_READ4(sc, LCD_IRQSTATUS);
 525
 526         if (reg & IRQ_SYNC_LOST) {
 527                 reg = LCD_READ4(sc, LCD_RASTER_CTRL);
 528                 reg &= ~RASTER_CTRL_LCDEN;
 529                 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
 530
 531                 reg = LCD_READ4(sc, LCD_RASTER_CTRL);
 532                 reg |= RASTER_CTRL_LCDEN;
 533                 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
 534                 goto done;
 535         }
 536
 537         if (reg & IRQ_PL) {
 538                 reg = LCD_READ4(sc, LCD_RASTER_CTRL);
 539                 reg &= ~RASTER_CTRL_LCDEN;
 540                 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
 541
 542                 reg = LCD_READ4(sc, LCD_RASTER_CTRL);
 543                 reg |= RASTER_CTRL_LCDEN;
 544                 LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
 545                 goto done;
 546         }
 547
 548         if (reg & IRQ_EOF0) {
 549                 LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys);
 550                 LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
 551                 reg &= ~IRQ_EOF0;
 552         }
 553
 554         if (reg & IRQ_EOF1) {
 555                 LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys);
 556                 LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
 557                 reg &= ~IRQ_EOF1;
 558         }
 559
 560         if (reg & IRQ_FUF) {
 561                 /* TODO: Handle FUF */
 562         }
 563
 564         if (reg & IRQ_ACB) {
 565                 /* TODO: Handle ACB */
 566         }
 567
 568 done:
 569         LCD_WRITE4(sc, LCD_END_OF_INT_IND, 0);
 570         /* Read value back to make sure it reached the hardware */
 571         reg = LCD_READ4(sc, LCD_END_OF_INT_IND);
 572 }
 573
 574 static const struct videomode *
 575 am335x_lcd_pick_mode(struct edid_info *ei)
 576 {
 577         const struct videomode *videomode;
 578         const struct videomode *m;
 579         int n;
 580
 581         /* Get standard VGA as default */
 582         videomode = NULL;
 583
 584         /*
 585          * Pick a mode.
 586          */
 587         if (ei->edid_preferred_mode != NULL) {
 588                 if (am335x_mode_is_valid(ei->edid_preferred_mode))
 589                         videomode = ei->edid_preferred_mode;
 590         }
 591
 592         if (videomode == NULL) {
 593                 m = ei->edid_modes;
 594
 595                 sort_modes(ei->edid_modes,
 596                     &ei->edid_preferred_mode,
 597                     ei->edid_nmodes);
 598                 for (n = 0; n < ei->edid_nmodes; n++)
 599                         if (am335x_mode_is_valid(&m[n])) {
 600                                 videomode = &m[n];
 601                                 break;
 602                         }
 603         }
 604
 605         return videomode;
 606 }
 607
 608 static int
 609 am335x_lcd_configure(struct am335x_lcd_softc *sc)
 610 {
 611         int div;
 612         uint32_t reg, timing0, timing1, timing2;
 613         uint32_t burst_log;
 614         size_t dma_size;
 615         uint32_t hbp, hfp, hsw;
 616         uint32_t vbp, vfp, vsw;
 617         uint32_t width, height;
 618         unsigned int ref_freq;
 619         int err;
 620
 621         /*
 622          * try to adjust clock to get double of requested frequency
 623          * HDMI/DVI displays are very sensitive to error in frequncy value
 624          */
 625         if (ti_prcm_clk_set_source_freq(LCDC_CLK, sc->sc_panel.panel_pxl_clk*2)) {
 626                 device_printf(sc->sc_dev, "can't set source frequency\n");
 627                 return (ENXIO);
 628         }
 629
 630         if (ti_prcm_clk_get_source_freq(LCDC_CLK, &ref_freq)) {
 631                 device_printf(sc->sc_dev, "can't get reference frequency\n");
 632                 return (ENXIO);
 633         }
 634
 635         /* Panle initialization */
 636         dma_size = round_page(sc->sc_panel.panel_width*sc->sc_panel.panel_height*sc->sc_panel.bpp/8);
 637
 638         /*
 639          * Now allocate framebuffer memory
 640          */
 641         err = bus_dma_tag_create(
 642             bus_get_dma_tag(sc->sc_dev),
 643             4, 0,               /* alignment, boundary */
 644             BUS_SPACE_MAXADDR_32BIT,    /* lowaddr */
 645             BUS_SPACE_MAXADDR,          /* highaddr */
 646             NULL, NULL,                 /* filter, filterarg */
 647             dma_size, 1,                        /* maxsize, nsegments */
 648             dma_size, 0,                        /* maxsegsize, flags */
 649             NULL, NULL,                 /* lockfunc, lockarg */
 650             &sc->sc_dma_tag);
 651         if (err)
 652                 goto done;
 653
 654         err = bus_dmamem_alloc(sc->sc_dma_tag, (void **)&sc->sc_fb_base,
 655             BUS_DMA_COHERENT, &sc->sc_dma_map);
 656
 657         if (err) {
 658                 device_printf(sc->sc_dev, "cannot allocate framebuffer\n");
 659                 goto done;
 660         }
 661
 662         err = bus_dmamap_load(sc->sc_dma_tag, sc->sc_dma_map, sc->sc_fb_base,
 663             dma_size, am335x_fb_dmamap_cb, &sc->sc_fb_phys, BUS_DMA_NOWAIT);
 664
 665         if (err) {
 666                 device_printf(sc->sc_dev, "cannot load DMA map\n");
 667                 goto done;
 668         }
 669
 670         /* Make sure it's blank */
 671         memset(sc->sc_fb_base, 0x0, dma_size);
 672
 673         /* Calculate actual FB Size */
 674         sc->sc_fb_size = sc->sc_panel.panel_width*sc->sc_panel.panel_height*sc->sc_panel.bpp/8;
 675
 676         /* Only raster mode is supported */
 677         reg = CTRL_RASTER_MODE;
 678         div = am335x_lcd_calc_divisor(ref_freq, sc->sc_panel.panel_pxl_clk);
 679         reg |= (div << CTRL_DIV_SHIFT);
 680         LCD_WRITE4(sc, LCD_CTRL, reg);
 681
 682         /* Set timing */
 683         timing0 = timing1 = timing2 = 0;
 684
 685         hbp = sc->sc_panel.panel_hbp - 1;
 686         hfp = sc->sc_panel.panel_hfp - 1;
 687         hsw = sc->sc_panel.panel_hsw - 1;
 688
 689         vbp = sc->sc_panel.panel_vbp;
 690         vfp = sc->sc_panel.panel_vfp;
 691         vsw = sc->sc_panel.panel_vsw - 1;
 692
 693         height = sc->sc_panel.panel_height - 1;
 694         width = sc->sc_panel.panel_width - 1;
 695
 696         /* Horizontal back porch */
 697         timing0 |= (hbp & 0xff) << RASTER_TIMING_0_HBP_SHIFT;
 698         timing2 |= ((hbp >> 8) & 3) << RASTER_TIMING_2_HBPHI_SHIFT;
 699         /* Horizontal front porch */
 700         timing0 |= (hfp & 0xff) << RASTER_TIMING_0_HFP_SHIFT;
 701         timing2 |= ((hfp >> 8) & 3) << RASTER_TIMING_2_HFPHI_SHIFT;
 702         /* Horizontal sync width */
 703         timing0 |= (hsw & 0x3f) << RASTER_TIMING_0_HSW_SHIFT;
 704         timing2 |= ((hsw >> 6) & 0xf) << RASTER_TIMING_2_HSWHI_SHIFT;
 705
 706         /* Vertical back porch, front porch, sync width */
 707         timing1 |= (vbp & 0xff) << RASTER_TIMING_1_VBP_SHIFT;
 708         timing1 |= (vfp & 0xff) << RASTER_TIMING_1_VFP_SHIFT;
 709         timing1 |= (vsw & 0x3f) << RASTER_TIMING_1_VSW_SHIFT;
 710
 711         /* Pixels per line */
 712         timing0 |= ((width >> 10) & 1)
 713             << RASTER_TIMING_0_PPLMSB_SHIFT;
 714         timing0 |= ((width >> 4) & 0x3f)
 715             << RASTER_TIMING_0_PPLLSB_SHIFT;
 716
 717         /* Lines per panel */
 718         timing1 |= (height & 0x3ff)
 719             << RASTER_TIMING_1_LPP_SHIFT;
 720         timing2 |= ((height >> 10 ) & 1)
 721             << RASTER_TIMING_2_LPP_B10_SHIFT;
 722
 723         /* clock signal settings */
 724         if (sc->sc_panel.sync_ctrl)
 725                 timing2 |= RASTER_TIMING_2_PHSVS;
 726         if (sc->sc_panel.sync_edge)
 727                 timing2 |= RASTER_TIMING_2_PHSVS_RISE;
 728         else
 729                 timing2 |= RASTER_TIMING_2_PHSVS_FALL;
 730         if (sc->sc_panel.hsync_active == 0)
 731                 timing2 |= RASTER_TIMING_2_IHS;
 732         if (sc->sc_panel.vsync_active == 0)
 733                 timing2 |= RASTER_TIMING_2_IVS;
 734         if (sc->sc_panel.pixelclk_active == 0)
 735                 timing2 |= RASTER_TIMING_2_IPC;
 736
 737         /* AC bias */
 738         timing2 |= (sc->sc_panel.ac_bias << RASTER_TIMING_2_ACB_SHIFT);
 739         timing2 |= (sc->sc_panel.ac_bias_intrpt << RASTER_TIMING_2_ACBI_SHIFT);
 740
 741         LCD_WRITE4(sc, LCD_RASTER_TIMING_0, timing0);
 742         LCD_WRITE4(sc, LCD_RASTER_TIMING_1, timing1);
 743         LCD_WRITE4(sc, LCD_RASTER_TIMING_2, timing2);
 744
 745         /* DMA settings */
 746         reg = LCDDMA_CTRL_FB0_FB1;
 747         /* Find power of 2 for current burst size */
 748         switch (sc->sc_panel.dma_burst_sz) {
 749         case 1:
 750                 burst_log = 0;
 751                 break;
 752         case 2:
 753                 burst_log = 1;
 754                 break;
 755         case 4:
 756                 burst_log = 2;
 757                 break;
 758         case 8:
 759                 burst_log = 3;
 760                 break;
 761         case 16:
 762         default:
 763                 burst_log = 4;
 764                 break;
 765         }
 766         reg |= (burst_log << LCDDMA_CTRL_BURST_SIZE_SHIFT);
 767         /* XXX: FIFO TH */
 768         reg |= (0 << LCDDMA_CTRL_TH_FIFO_RDY_SHIFT);
 769         LCD_WRITE4(sc, LCD_LCDDMA_CTRL, reg);
 770
 771         LCD_WRITE4(sc, LCD_LCDDMA_FB0_BASE, sc->sc_fb_phys);
 772         LCD_WRITE4(sc, LCD_LCDDMA_FB0_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
 773         LCD_WRITE4(sc, LCD_LCDDMA_FB1_BASE, sc->sc_fb_phys);
 774         LCD_WRITE4(sc, LCD_LCDDMA_FB1_CEILING, sc->sc_fb_phys + sc->sc_fb_size - 1);
 775
 776         /* Enable LCD */
 777         reg = RASTER_CTRL_LCDTFT;
 778         reg |= (sc->sc_panel.fdd << RASTER_CTRL_REQDLY_SHIFT);
 779         reg |= (PALETTE_DATA_ONLY << RASTER_CTRL_PALMODE_SHIFT);
 780         if (sc->sc_panel.bpp >= 24)
 781                 reg |= RASTER_CTRL_TFT24;
 782         if (sc->sc_panel.bpp == 32)
 783                 reg |= RASTER_CTRL_TFT24_UNPACKED;
 784         LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
 785
 786         LCD_WRITE4(sc, LCD_CLKC_ENABLE,
 787             CLKC_ENABLE_DMA | CLKC_ENABLE_LDID | CLKC_ENABLE_CORE);
 788
 789         LCD_WRITE4(sc, LCD_CLKC_RESET, CLKC_RESET_MAIN);
 790         DELAY(100);
 791         LCD_WRITE4(sc, LCD_CLKC_RESET, 0);
 792
 793         reg = IRQ_EOF1 | IRQ_EOF0 | IRQ_FUF | IRQ_PL |
 794             IRQ_ACB | IRQ_SYNC_LOST |  IRQ_RASTER_DONE |
 795             IRQ_FRAME_DONE;
 796         LCD_WRITE4(sc, LCD_IRQENABLE_SET, reg);
 797
 798         reg = LCD_READ4(sc, LCD_RASTER_CTRL);
 799         reg |= RASTER_CTRL_LCDEN;
 800         LCD_WRITE4(sc, LCD_RASTER_CTRL, reg);
 801
 802         LCD_WRITE4(sc, LCD_SYSCONFIG,
 803             SYSCONFIG_STANDBY_SMART | SYSCONFIG_IDLE_SMART);
 804
 805         sc->sc_fb_info.fb_name = device_get_nameunit(sc->sc_dev);
 806         sc->sc_fb_info.fb_vbase = (intptr_t)sc->sc_fb_base;
 807         sc->sc_fb_info.fb_pbase = sc->sc_fb_phys;
 808         sc->sc_fb_info.fb_size = sc->sc_fb_size;
 809         sc->sc_fb_info.fb_bpp = sc->sc_fb_info.fb_depth = sc->sc_panel.bpp;
 810         sc->sc_fb_info.fb_stride = sc->sc_panel.panel_width*sc->sc_panel.bpp / 8;
 811         sc->sc_fb_info.fb_width = sc->sc_panel.panel_width;
 812         sc->sc_fb_info.fb_height = sc->sc_panel.panel_height;
 813
 814 #ifdef  DEV_SC
 815         err = (sc_attach_unit(device_get_unit(sc->sc_dev),
 816             device_get_flags(sc->sc_dev) | SC_AUTODETECT_KBD));
 817
 818         if (err) {
 819                 device_printf(sc->sc_dev, "failed to attach syscons\n");
 820                 goto fail;
 821         }
 822
 823         am335x_lcd_syscons_setup((vm_offset_t)sc->sc_fb_base, sc->sc_fb_phys, &panel);
 824 #else /* VT */
 825         device_t fbd = device_add_child(sc->sc_dev, "fbd",
 826         device_get_unit(sc->sc_dev));
 827         if (fbd != NULL) {
 828                 if (device_probe_and_attach(fbd) != 0)
 829                         device_printf(sc->sc_dev, "failed to attach fbd device\n");
 830         } else
 831                 device_printf(sc->sc_dev, "failed to add fbd child\n");
 832 #endif
 833
 834 done:
 835         return (err);
 836 }
 837
 838 static void
 839 am335x_lcd_hdmi_event(void *arg, device_t hdmi, int event)
 840 {
 841         struct am335x_lcd_softc *sc;
 842         const struct videomode *videomode;
 843         struct videomode hdmi_mode;
 844         device_t hdmi_dev;
 845         uint8_t *edid;
 846         uint32_t edid_len;
 847         struct edid_info ei;
 848
 849         sc = arg;
 850
 851         /* Nothing to work with */
 852         if (!sc->sc_hdmi_framer) {
 853                 device_printf(sc->sc_dev, "HDMI event without HDMI framer set\n");
 854                 return;
 855         }
 856
 857         hdmi_dev = OF_device_from_xref(sc->sc_hdmi_framer);
 858         if (!hdmi_dev) {
 859                 device_printf(sc->sc_dev, "no actual device for \"hdmi\" property\n");
 860                 return;
 861         }
 862
 863         edid = NULL;
 864         edid_len = 0;
 865         if (HDMI_GET_EDID(hdmi_dev, &edid, &edid_len) != 0) {
 866                 device_printf(sc->sc_dev, "failed to get EDID info from HDMI framer\n");
 867                 return;
 868         }
 869
 870         videomode = NULL;
 871
 872         if (edid_parse(edid, &ei) == 0) {
 873                 edid_print(&ei);
 874                 videomode = am335x_lcd_pick_mode(&ei);
 875         } else
 876                 device_printf(sc->sc_dev, "failed to parse EDID\n");
 877
 878         /* Use standard VGA as fallback */
 879         if (videomode == NULL)
 880                 videomode = pick_mode_by_ref(640, 480, 60);
 881
 882         if (videomode == NULL) {
 883                 device_printf(sc->sc_dev, "failed to find usable videomode");
 884                 return;
 885         }
 886
 887         device_printf(sc->sc_dev, "detected videomode: %dx%d @ %dKHz\n", videomode->hdisplay,
 888                 videomode->vdisplay, am335x_mode_vrefresh(videomode));
 889
 890         sc->sc_panel.panel_width = videomode->hdisplay;
 891         sc->sc_panel.panel_height = videomode->vdisplay;
 892         sc->sc_panel.panel_hfp = videomode->hsync_start - videomode->hdisplay;
 893         sc->sc_panel.panel_hbp = videomode->htotal - videomode->hsync_end;
 894         sc->sc_panel.panel_hsw = videomode->hsync_end - videomode->hsync_start;
 895         sc->sc_panel.panel_vfp = videomode->vsync_start - videomode->vdisplay;
 896         sc->sc_panel.panel_vbp = videomode->vtotal - videomode->vsync_end;
 897         sc->sc_panel.panel_vsw = videomode->vsync_end - videomode->vsync_start;
 898         sc->sc_panel.pixelclk_active = 1;
 899
 900         /* logic for HSYNC should be reversed */
 901         if (videomode->flags & VID_NHSYNC)
 902                 sc->sc_panel.hsync_active = 1;
 903         else
 904                 sc->sc_panel.hsync_active = 0;
 905
 906         if (videomode->flags & VID_NVSYNC)
 907                 sc->sc_panel.vsync_active = 0;
 908         else
 909                 sc->sc_panel.vsync_active = 1;
 910
 911         sc->sc_panel.panel_pxl_clk = videomode->dot_clock * 1000;
 912
 913         am335x_lcd_configure(sc);
 914
 915         memcpy(&hdmi_mode, videomode, sizeof(hdmi_mode));
 916         hdmi_mode.hskew = videomode->hsync_end - videomode->hsync_start;
 917         hdmi_mode.flags |= VID_HSKEW;
 918
 919         HDMI_SET_VIDEOMODE(hdmi_dev, &hdmi_mode);
 920 }
 921
 922 static int
 923 am335x_lcd_probe(device_t dev)
 924 {
 925 #ifdef DEV_SC
 926         int err;
 927 #endif
 928
 929         if (!ofw_bus_status_okay(dev))
 930                 return (ENXIO);
 931
 932         if (!ofw_bus_is_compatible(dev, "ti,am33xx-tilcdc"))
 933                 return (ENXIO);
 934
 935         device_set_desc(dev, "AM335x LCD controller");
 936
 937 #ifdef DEV_SC
 938         err = sc_probe_unit(device_get_unit(dev),
 939             device_get_flags(dev) | SC_AUTODETECT_KBD);
 940         if (err != 0)
 941                 return (err);
 942 #endif
 943
 944         return (BUS_PROBE_DEFAULT);
 945 }
 946
 947 static int
 948 am335x_lcd_attach(device_t dev)
 949 {
 950         struct am335x_lcd_softc *sc;
 951
 952         int err;
 953         int rid;
 954         struct sysctl_ctx_list *ctx;
 955         struct sysctl_oid *tree;
 956         phandle_t root, panel_node;
 957
 958         err = 0;
 959         sc = device_get_softc(dev);
 960         sc->sc_dev = dev;
 961
 962         am335x_read_hdmi_property(dev);
 963
 964         root = OF_finddevice("/");
 965         if (root == -1) {
 966                 device_printf(dev, "failed to get FDT root node\n");
 967                 return (ENXIO);
 968         }
 969
 970         sc->sc_panel.ac_bias = 255;
 971         sc->sc_panel.ac_bias_intrpt = 0;
 972         sc->sc_panel.dma_burst_sz = 16;
 973         sc->sc_panel.bpp = 16;
 974         sc->sc_panel.fdd = 128;
 975         sc->sc_panel.sync_edge = 0;
 976         sc->sc_panel.sync_ctrl = 1;
 977
 978         panel_node = fdt_find_compatible(root, "ti,tilcdc,panel", 1);
 979         if (panel_node != 0) {
 980                 device_printf(dev, "using static panel info\n");
 981                 if (am335x_read_panel_info(dev, panel_node, &sc->sc_panel)) {
 982                         device_printf(dev, "failed to read panel info\n");
 983                         return (ENXIO);
 984                 }
 985
 986                 if (am335x_read_timing(dev, panel_node, &sc->sc_panel)) {
 987                         device_printf(dev, "failed to read timings\n");
 988                         return (ENXIO);
 989                 }
 990         }
 991
 992         ti_prcm_clk_enable(LCDC_CLK);
 993
 994         rid = 0;
 995         sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
 996             RF_ACTIVE);
 997         if (!sc->sc_mem_res) {
 998                 device_printf(dev, "cannot allocate memory window\n");
 999                 return (ENXIO);
1000         }
1001
1002         rid = 0;
1003         sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
1004             RF_ACTIVE);
1005         if (!sc->sc_irq_res) {
1006                 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
1007                 device_printf(dev, "cannot allocate interrupt\n");
1008                 return (ENXIO);
1009         }
1010
1011         if (bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
1012                         NULL, am335x_lcd_intr, sc,
1013                         &sc->sc_intr_hl) != 0) {
1014                 bus_release_resource(dev, SYS_RES_IRQ, rid,
1015                     sc->sc_irq_res);
1016                 bus_release_resource(dev, SYS_RES_MEMORY, rid,
1017                     sc->sc_mem_res);
1018                 device_printf(dev, "Unable to setup the irq handler.\n");
1019                 return (ENXIO);
1020         }
1021
1022         LCD_LOCK_INIT(sc);
1023
1024         /* Init backlight interface */
1025         ctx = device_get_sysctl_ctx(sc->sc_dev);
1026         tree = device_get_sysctl_tree(sc->sc_dev);
1027         sc->sc_oid = SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
1028             "backlight", CTLTYPE_INT | CTLFLAG_RW, sc, 0,
1029             am335x_lcd_sysctl_backlight, "I", "LCD backlight");
1030         sc->sc_backlight = 0;
1031         /* Check if eCAS interface is available at this point */
1032         if (am335x_pwm_config_ecap(PWM_UNIT,
1033             PWM_PERIOD, PWM_PERIOD) == 0)
1034                 sc->sc_backlight = 100;
1035
1036         if (panel_node != 0)
1037                 am335x_lcd_configure(sc);
1038         else
1039                 sc->sc_hdmi_evh = EVENTHANDLER_REGISTER(hdmi_event,
1040                     am335x_lcd_hdmi_event, sc, EVENTHANDLER_PRI_ANY);
1041
1042         return (0);
1043 }
1044
1045 static int
1046 am335x_lcd_detach(device_t dev)
1047 {
1048         /* Do not let unload driver */
1049         return (EBUSY);
1050 }
1051
1052 static struct fb_info *
1053 am335x_lcd_fb_getinfo(device_t dev)
1054 {
1055         struct am335x_lcd_softc *sc;
1056
1057         sc = device_get_softc(dev);
1058
1059         return (&sc->sc_fb_info);
1060 }
1061
1062 static device_method_t am335x_lcd_methods[] = {
1063         DEVMETHOD(device_probe,         am335x_lcd_probe),
1064         DEVMETHOD(device_attach,        am335x_lcd_attach),
1065         DEVMETHOD(device_detach,        am335x_lcd_detach),
1066
1067         /* Framebuffer service methods */
1068         DEVMETHOD(fb_getinfo,           am335x_lcd_fb_getinfo),
1069
1070         DEVMETHOD_END
1071 };
1072
1073 static driver_t am335x_lcd_driver = {
1074         "fb",
1075         am335x_lcd_methods,
1076         sizeof(struct am335x_lcd_softc),
1077 };
1078
1079 static devclass_t am335x_lcd_devclass;
1080
1081 DRIVER_MODULE(am335x_lcd, simplebus, am335x_lcd_driver, am335x_lcd_devclass, 0, 0);
1082 MODULE_VERSION(am335x_lcd, 1);
1083 MODULE_DEPEND(am335x_lcd, simplebus, 1, 1, 1);